arm64: dts: mt8183: add svs device information

Add compatible/reg/irq/clock/efuse setting in svs node.

Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20220516004311.18358-3-roger.lu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 7c0ed26..2fde0dd 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1093,6 +1093,18 @@
                        status = "disabled";
                };
 
+               svs: svs@1100b000 {
+                       compatible = "mediatek,mt8183-svs";
+                       reg = <0 0x1100b000 0 0x1000>;
+                       interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
+                       clocks = <&infracfg CLK_INFRA_THERM>;
+                       clock-names = "main";
+                       nvmem-cells = <&svs_calibration>,
+                                     <&thermal_calibration>;
+                       nvmem-cell-names = "svs-calibration-data",
+                                          "t-calibration-data";
+               };
+
                thermal: thermal@1100b000 {
                        #thermal-sensor-cells = <1>;
                        compatible = "mediatek,mt8183-thermal";
@@ -1611,6 +1623,10 @@
                        mipi_tx_calibration: calib@190 {
                                reg = <0x190 0xc>;
                        };
+
+                       svs_calibration: calib@580 {
+                               reg = <0x580 0x64>;
+                       };
                };
 
                u3phy: t-phy@11f40000 {