* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-rl78.c (rl78_elf_relocate_section): Handle weak code
references in compuated relocs.
* config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
(rl78_op): Handle %code().
(rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
(tc_gen_reloc): Likwise; convert to a computed reloc.
(md_apply_fix): Likewise.
+2013-02-27 DJ Delorie <dj@redhat.com>
+
+ * reloc.c (BFD_RELOC_RL78_CODE): Add.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Regenerate.
+ * elf32-rl78.c (rl78_elf_relocate_section): Handle weak code
+ references in compuated relocs.
+
2013-02-26 Anthony Green <green@moxielogic.com>
* config.bfd: Extend moxie-rtems target triplet name support.
BFD_RELOC_RL78_HI16,
BFD_RELOC_RL78_HI8,
BFD_RELOC_RL78_LO16,
+ BFD_RELOC_RL78_CODE,
/* Renesas RX Relocations. */
BFD_RELOC_RX_NEG8,
+ sec->output_section->vma
+ sec->output_offset
+ rel->r_addend);
+ else if (h->root.type == bfd_link_hash_undefweak)
+ RL78_STACK_PUSH (0);
else
_bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
}
"BFD_RELOC_RL78_HI16",
"BFD_RELOC_RL78_HI8",
"BFD_RELOC_RL78_LO16",
+ "BFD_RELOC_RL78_CODE",
"BFD_RELOC_RX_NEG8",
"BFD_RELOC_RX_NEG16",
"BFD_RELOC_RX_NEG24",
BFD_RELOC_RL78_HI8
ENUMX
BFD_RELOC_RL78_LO16
+ENUMX
+ BFD_RELOC_RL78_CODE
ENUMDOC
Renesas RL78 Relocations.
+2013-02-27 DJ Delorie <dj@redhat.com>
+
+ * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
+ (rl78_op): Handle %code().
+ (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
+ (tc_gen_reloc): Likwise; convert to a computed reloc.
+ (md_apply_fix): Likewise.
+
2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
* config/rl78-parse.y: Fix encoding of DIVWU insn.
}
else
{
+ if (nbytes > 2
+ && exp.X_md == BFD_RELOC_RL78_CODE)
+ exp.X_md = 0;
rl78_op_fixup (exp, rl78_bytes.n_ops * 8, nbytes * 8, type);
memset (rl78_bytes.ops + rl78_bytes.n_ops, 0, nbytes);
rl78_bytes.n_ops += nbytes;
}
reloc_functions[] =
{
+ { "code", BFD_RELOC_RL78_CODE },
{ "lo16", BFD_RELOC_RL78_LO16 },
{ "hi16", BFD_RELOC_RL78_HI16 },
{ "hi8", BFD_RELOC_RL78_HI8 },
switch (exp->X_md)
{
+ case BFD_RELOC_RL78_CODE:
+ if (size == 2)
+ type = exp->X_md;
+ break;
case BFD_RELOC_RL78_LO16:
case BFD_RELOC_RL78_HI16:
if (size != 2)
OP (ABS32);
break;
+ case BFD_RELOC_RL78_CODE:
+ SYM0 ();
+ OP (ABS16);
+ break;
+
case BFD_RELOC_RL78_LO16:
SYM0 ();
OPIMM (0xffff);
case BFD_RELOC_16:
case BFD_RELOC_16_PCREL:
+ case BFD_RELOC_RL78_CODE:
op[0] = val;
op[1] = val >> 8;
break;