VarToRegMap fromVarToRegMap = getOutVarToRegMap(fromBlock->bbNum);
VarToRegMap toVarToRegMap = getInVarToRegMap(toBlock->bbNum);
+#ifdef _TARGET_ARM_
+ regMaskTP freeRegs;
+ if (type == TYP_DOUBLE)
+ {
+ // We have to consider all float registers for TYP_DOUBLE
+ freeRegs = allRegs(TYP_FLOAT);
+ }
+ else
+ {
+ freeRegs = allRegs(type);
+ }
+#else // !_TARGET_ARM_
regMaskTP freeRegs = allRegs(type);
+#endif // !_TARGET_ARM_
+
#ifdef DEBUG
if (getStressLimitRegs() == LSRA_LIMIT_SMALL_SET)
{
assert(fromReg != REG_NA && toReg != REG_NA);
if (fromReg != REG_STK)
{
- freeRegs &= ~genRegMask(fromReg);
+ freeRegs &= ~genRegMask(fromReg, getIntervalForLocalVar(varIndex)->registerType);
}
if (toReg != REG_STK)
{
- freeRegs &= ~genRegMask(toReg);
+ freeRegs &= ~genRegMask(toReg, getIntervalForLocalVar(varIndex)->registerType);
}
}
+
+#ifdef _TARGET_ARM_
+ if (type == TYP_DOUBLE)
+ {
+ // Exclude any doubles for which the odd half isn't in freeRegs.
+ freeRegs = freeRegs & ((freeRegs << 1) & RBM_ALLDOUBLE);
+ }
+#endif
+
if (freeRegs == RBM_NONE)
{
return REG_NA;
tempRegFlt = getTempRegForResolution(fromBlock, toBlock, TYP_FLOAT);
}
#else
- tempRegFlt = getTempRegForResolution(fromBlock, toBlock, TYP_FLOAT);
+ tempRegFlt = getTempRegForResolution(fromBlock, toBlock, TYP_FLOAT);
#endif
}