<http://software.intel.com/en-us/manageability/>
config INTEL_MEI_ME
- bool "ME Enabled Intel Chipsets"
- depends on INTEL_MEI
+ tristate "ME Enabled Intel Chipsets"
+ select INTEL_MEI
depends on X86 && PCI && WATCHDOG_CORE
- default y
help
MEI support for ME Enabled Intel chipsets.
mei-objs += main.o
mei-objs += amthif.o
mei-objs += wd.o
-mei-$(CONFIG_INTEL_MEI_ME) += pci-me.o
-mei-$(CONFIG_INTEL_MEI_ME) += hw-me.o
+
+obj-$(CONFIG_INTEL_MEI_ME) += mei-me.o
+mei-me-objs := pci-me.o
+mei-me-objs += hw-me.o
*
*/
+#include <linux/export.h>
#include <linux/pci.h>
#include <linux/sched.h>
#include <linux/wait.h>
mei_io_list_init(&dev->amthif_rd_complete_list);
}
+EXPORT_SYMBOL_GPL(mei_device_init);
/**
* mei_start - initializes host and fw to start work.
mutex_unlock(&dev->device_lock);
return -ENODEV;
}
+EXPORT_SYMBOL_GPL(mei_start);
/**
* mei_reset - resets host and fw.
/* remove all waiting requests */
mei_cl_all_write_clear(dev);
}
+EXPORT_SYMBOL_GPL(mei_reset);
void mei_stop(struct mei_device *dev)
{
flush_scheduled_work();
mei_watchdog_unregister(dev);
-
}
-
+EXPORT_SYMBOL_GPL(mei_stop);
*/
+#include <linux/export.h>
#include <linux/pci.h>
#include <linux/kthread.h>
#include <linux/interrupt.h>
mei_cl_complete_handler(cl, cb);
}
}
+EXPORT_SYMBOL_GPL(mei_irq_compl_handler);
/**
* _mei_irq_thread_state_ok - checks if mei header matches file private data
*
end:
return ret;
}
+EXPORT_SYMBOL_GPL(mei_irq_read_handler);
/**
}
return 0;
}
+EXPORT_SYMBOL_GPL(mei_irq_write_handler);
mei_misc_device.parent = dev;
return misc_register(&mei_misc_device);
}
+EXPORT_SYMBOL_GPL(mei_register);
void mei_deregister(void)
{
misc_deregister(&mei_misc_device);
mei_misc_device.parent = NULL;
}
+EXPORT_SYMBOL_GPL(mei_deregister);
+MODULE_AUTHOR("Intel Corporation");
+MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
MODULE_LICENSE("GPL v2");