imx: imx8ulp: add CAAM clock entry
authorPeng Fan <peng.fan@nxp.com>
Wed, 6 Apr 2022 06:30:10 +0000 (14:30 +0800)
committerStefano Babic <sbabic@denx.de>
Tue, 12 Apr 2022 15:33:56 +0000 (17:33 +0200)
Add CAAM clock entry in PCC3

Signed-off-by: Peng Fan <peng.fan@nxp.com>
arch/arm/include/asm/arch-imx8ulp/pcc.h
arch/arm/mach-imx/imx8ulp/pcc.c

index 46386f1..d9b2d7c 100644 (file)
@@ -52,6 +52,7 @@ enum pcc3_entry {
        UPOWER_PCC3_SLOT = 40,
        WDOG3_PCC3_SLOT = 42,
        WDOG4_PCC3_SLOT = 43,
+       CAAM_PCC3_SLOT = 46,
        XRDC_MGR_PCC3_SLOT = 47,
        SEMA42_1_PCC3_SLOT = 48,
        ROMCP1_PCC3_SLOT = 49,
index 7909d77..e3c6d67 100644 (file)
@@ -135,6 +135,7 @@ static struct pcc_entry pcc3_arrays[] = {
        {PCC3_RBASE, UPOWER_PCC3_SLOT,          CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
        {PCC3_RBASE, WDOG3_PCC3_SLOT,           CLKSRC_PER_BUS, PCC_HAS_DIV, PCC_HAS_RST_B},
        {PCC3_RBASE, WDOG4_PCC3_SLOT,           CLKSRC_PER_BUS, PCC_HAS_DIV, PCC_HAS_RST_B},
+       {PCC3_RBASE, CAAM_PCC3_SLOT,            CLKSRC_NO_PCS, PCC_NO_DIV, PCC_HAS_RST_B},
        {PCC3_RBASE, XRDC_MGR_PCC3_SLOT,        CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},
        {PCC3_RBASE, SEMA42_1_PCC3_SLOT,        CLKSRC_PER_BUS, PCC_NO_DIV, PCC_NO_RST_B},
        {PCC3_RBASE, ROMCP1_PCC3_SLOT,          CLKSRC_NO_PCS, PCC_NO_DIV, PCC_NO_RST_B},