drm/mgag200: Fix PLL setup for g200wb and g200ew
authorJocelyn Falempe <jfalempe@redhat.com>
Tue, 8 Mar 2022 17:43:21 +0000 (18:43 +0100)
committerThomas Zimmermann <tzimmermann@suse.de>
Sun, 13 Mar 2022 19:35:06 +0000 (20:35 +0100)
commit f86c3ed55920 ("drm/mgag200: Split PLL setup into compute and
 update functions") introduced a regression for g200wb and g200ew.
The PLLs are not set up properly, and VGA screen stays
black, or displays "out of range" message.

MGA1064_WB_PIX_PLLC_N/M/P was mistakenly replaced with
MGA1064_PIX_PLLC_N/M/P which have different addresses.

Patch tested on a Dell T310 with g200wb

Fixes: f86c3ed55920 ("drm/mgag200: Split PLL setup into compute and update functions")
Cc: stable@vger.kernel.org
Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220308174321.225606-1-jfalempe@redhat.com
drivers/gpu/drm/mgag200/mgag200_pll.c

index e9ae22b..52be08b 100644 (file)
@@ -404,9 +404,9 @@ mgag200_pixpll_update_g200wb(struct mgag200_pll *pixpll, const struct mgag200_pl
                udelay(50);
 
                /* program pixel pll register */
-               WREG_DAC(MGA1064_PIX_PLLC_N, xpixpllcn);
-               WREG_DAC(MGA1064_PIX_PLLC_M, xpixpllcm);
-               WREG_DAC(MGA1064_PIX_PLLC_P, xpixpllcp);
+               WREG_DAC(MGA1064_WB_PIX_PLLC_N, xpixpllcn);
+               WREG_DAC(MGA1064_WB_PIX_PLLC_M, xpixpllcm);
+               WREG_DAC(MGA1064_WB_PIX_PLLC_P, xpixpllcp);
 
                udelay(50);