drm/amd/pp: Expose the smu support for SDMA PG cntl

SDMA IP can be power up/down via smu message

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index c2e5412..32f475e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1196,6 +1196,21 @@ static void pp_dpm_powergate_acp(void *handle, bool gate)
        hwmgr->hwmgr_func->powergate_acp(hwmgr, gate);
 }
 
+static void pp_dpm_powergate_sdma(void *handle, bool gate)
+{
+       struct pp_hwmgr *hwmgr = handle;
+
+       if (!hwmgr)
+               return;
+
+       if (hwmgr->hwmgr_func->powergate_sdma == NULL) {
+               pr_info("%s was not implemented.\n", __func__);
+               return;
+       }
+
+       hwmgr->hwmgr_func->powergate_sdma(hwmgr, gate);
+}
+
 static int pp_set_powergating_by_smu(void *handle,
                                uint32_t block_type, bool gate)
 {
@@ -1218,6 +1233,9 @@ static int pp_set_powergating_by_smu(void *handle,
        case AMD_IP_BLOCK_TYPE_ACP:
                pp_dpm_powergate_acp(handle, gate);
                break;
+       case AMD_IP_BLOCK_TYPE_SDMA:
+               pp_dpm_powergate_sdma(handle, gate);
+               break;
        default:
                break;
        }

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
index 5d1dae2..b7a9d0c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
@@ -1153,6 +1153,14 @@ static int smu10_powergate_mmhub(struct pp_hwmgr *hwmgr)
        return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub);
 }
 
+static int smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate)
+{
+       if (gate)
+               return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerDownSdma);
+       else
+               return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerUpSdma);
+}
+
 static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
 {
        if (bgate) {

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 8484e2d..35f2272 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -328,6 +328,7 @@ struct pp_hwmgr_func {
        int (*set_power_limit)(struct pp_hwmgr *hwmgr, uint32_t n);
        int (*powergate_mmhub)(struct pp_hwmgr *hwmgr);
        int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr);
+       int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate);
        int (*enable_mgpu_fan_boost)(struct pp_hwmgr *hwmgr);
 };