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i965: Fix the maximum grf counting in the new FS backend.
author
Eric Anholt
<eric@anholt.net>
Fri, 27 Aug 2010 19:19:30 +0000
(12:19 -0700)
committer
Eric Anholt
<eric@anholt.net>
Fri, 27 Aug 2010 19:21:40 +0000
(12:21 -0700)
glsl-algebraic-rcp-rsq managed to use 33 registers, and we claimed to
only use 32, so the write to g32 would go stomping over the precious
g0 of some other thread.
src/mesa/drivers/dri/i965/brw_fs.cpp
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diff --git
a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index
f8b0622
..
673a31c
100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/
src/mesa/drivers/dri/i965/brw_fs.cpp
@@
-1357,7
+1357,7
@@
fs_visitor::assign_regs()
last_grf = MAX2(last_grf, inst->src[1].hw_reg);
}
- this->grf_used = last_grf;
+ this->grf_used = last_grf
+ 1
;
}
static struct brw_reg brw_reg_from_fs_reg(fs_reg *reg)