arm64: dts: exynos: Reduce the clock-latency of big.LITTLE core
authorChanwoo Choi <cw00.choi@samsung.com>
Wed, 29 Apr 2015 08:21:50 +0000 (17:21 +0900)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:44:24 +0000 (13:44 +0900)
This patch reduces the clock-latency of big.LITTLE core because too much
clock-latency has the direct influence of determining the sampling rate
of CPUFREQ governor. After applied this patch, the sampling rate is 100ms
from 1000ms.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
arch/arm64/boot/dts/exynos/exynos5433.dtsi

index c7f91ce..e1a972c 100644 (file)
@@ -44,7 +44,7 @@
 
                        clocks = <&cmu_apollo CLK_SCLK_APOLLO>;
                        clock-names = "cpu-cluster.1";
-                       clock-latency = <1000000>;
+                       clock-latency = <100000>;
                        #cooling-cells = <2>;
 
                        operating-points = <
@@ -91,7 +91,7 @@
 
                        clocks = <&cmu_atlas CLK_SCLK_ATLAS>;
                        clock-names = "cpu-cluster.0";
-                       clock-latency = <1000000>;
+                       clock-latency = <100000>;
                        #cooling-cells = <2>;
 
                        operating-points = <