hdmirx: add option for scdc enable [1/1]
authorHang Cheng <hang.cheng@amlogic.com>
Thu, 5 Sep 2019 07:57:11 +0000 (15:57 +0800)
committerTao Zeng <tao.zeng@amlogic.com>
Fri, 6 Sep 2019 08:22:27 +0000 (01:22 -0700)
PD#SWPL-13667

Problem:
some devices may forcely send signal above 3.4G
even if TV announce hdmi1.4 edid, such as apple
TV box, Samsung UBD-K8500 dvd; and for QD6508 box
of TCL, it will not send signal out if scdc NAK

Solution:
add a scdc force enable option to cover this
issue. by default, scdc is enabled or not
accroding to current edid version

Verify:
X301

Change-Id: Ibdacbd3bb1edbdcb99637252530d19510fbcfb1d
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g_drm.dts
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c

index 4e3cfe7..08626d6 100644 (file)
                hpd_low_cec_off = <1>;
                /* bit4: enable feature, bit3~0: port number */
                disable_port = <0x0>;
+               /* 1: enable, 0: disable */
+               scdc_force_en = <0>;
                /* MAP_ADDR_MODULE_CBUS */
                /* MAP_ADDR_MODULE_HIU */
                /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
index 15f16ac..bd4b205 100644 (file)
                hpd_low_cec_off = <1>;
                /* bit4: enable feature, bit3~0: port number */
                disable_port = <0x0>;
+               /* 1: enable, 0: disable */
+               scdc_force_en = <0>;
                /* MAP_ADDR_MODULE_CBUS */
                /* MAP_ADDR_MODULE_HIU */
                /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
index f12baa3..40bd862 100644 (file)
                hpd_low_cec_off = <1>;
                /* bit4: enable feature, bit3~0: port number */
                disable_port = <0x0>;
+               /* 1: enable, 0: disable */
+               scdc_force_en = <0>;
                /* MAP_ADDR_MODULE_CBUS */
                /* MAP_ADDR_MODULE_HIU */
                /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
index 67f3c70..3f4b4e7 100644 (file)
                hpd_low_cec_off = <1>;
                /* bit4: enable feature, bit3~0: port number */
                disable_port = <0x0>;
+               /* 1: enable, 0: disable */
+               scdc_force_en = <0>;
                /* MAP_ADDR_MODULE_CBUS */
                /* MAP_ADDR_MODULE_HIU */
                /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
index 060a998..e5e82ef 100644 (file)
@@ -2439,6 +2439,15 @@ static int hdmirx_probe(struct platform_device *pdev)
                rx.arc_port = 0x1;
                rx_pr("not find arc_port, portB by default\n");
        }
+       ret = of_property_read_u32(pdev->dev.of_node,
+                                  "scdc_force_en",
+                                  &scdc_force_en);
+       if (ret) {
+               /* enable scdc accroding to edid version */
+               scdc_force_en = 0;
+               rx_pr("not find scdc_force_en, disable by default\n");
+       }
+
        ret = of_reserved_mem_device_init(&(pdev->dev));
        if (ret != 0)
                rx_pr("warning: no rev cmd mem\n");
index 7c137e7..21c2068 100644 (file)
@@ -47,7 +47,7 @@
  *
  *
  */
-#define RX_VER2 "ver.2019/08/22"
+#define RX_VER2 "ver.2019/09/05"
 
 /*print type*/
 #define        LOG_EN          0x01
index 600df2f..d6ab837 100644 (file)
@@ -101,6 +101,8 @@ int pll_rst_max = 5;
 /* cdr lock threshold */
 int cdr_lock_level;
 int clock_lock_th = 2;
+int scdc_force_en;
+
 /*------------------------variable define end------------------------------*/
 
 static int check_regmap_flag(unsigned int addr)
@@ -1942,7 +1944,8 @@ void clk_init(void)
 void hdmirx_20_init(void)
 {
        unsigned long data32;
-       unsigned long scdc_en = rx.edid_ver;
+       unsigned long scdc_en =
+               scdc_force_en ? 1 : rx.edid_ver;
 
        data32 = 0;
        data32 |= 1     << 12; /* [12]     vid_data_checken */
index ebc34d2..4c0dafc 100644 (file)
@@ -1117,6 +1117,7 @@ extern int cdr_lock_level;
 extern int top_intr_maskn_value;
 extern int hbr_force_8ch;
 extern int clock_lock_th;
+extern int scdc_force_en;
 extern void rx_get_best_eq_setting(void);
 extern void wr_reg_hhi(unsigned int offset, unsigned int val);
 extern void wr_reg_hhi_bits(unsigned int offset, unsigned int mask,
index 5ffad2f..2dde4f0 100644 (file)
@@ -1732,6 +1732,8 @@ int rx_set_global_variable(const char *buf, int size)
                return pr_var(en_take_dtd_space, index);
        if (set_pr_var(tmpbuf, earc_cap_ds_update_hpd_en, value, &index, ret))
                return pr_var(earc_cap_ds_update_hpd_en, index);
+       if (set_pr_var(tmpbuf, scdc_force_en, value, &index, ret))
+               return pr_var(scdc_force_en, index);
        return 0;
 }
 
@@ -1844,6 +1846,7 @@ void rx_get_global_variable(const char *buf)
        pr_var(clock_lock_th, i++);
        pr_var(en_take_dtd_space, i++);
        pr_var(earc_cap_ds_update_hpd_en, i++);
+       pr_var(scdc_force_en, i++);
 }
 
 void skip_frame(unsigned int cnt)