osd: tl1 hold line fix needn't shift workaround [1/1]
authorpengcheng chen <pengcheng.chen@amlogic.com>
Thu, 15 Nov 2018 02:04:13 +0000 (10:04 +0800)
committerBo Yang <bo.yang@amlogic.com>
Tue, 27 Nov 2018 05:33:22 +0000 (21:33 -0800)
PD#172587

Problem:
tl1 hold line fix needn't shift workaround.

Solution:
remove shift workaround int tl1

Verify:
verified by x301

Change-Id: I96d99758ba6f93622c34a8e69c4a3f769fdfad49
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
drivers/amlogic/media/osd/osd.h
drivers/amlogic/media/osd/osd_hw.c

index adf238f..3004fe7 100644 (file)
@@ -741,6 +741,7 @@ struct hw_para_s {
        u32 hw_rdma_en;
        u32 blend_bypass;
        u32 hdr_used;
+       u32 workaround_line;
        u32 basic_urgent;
        u32 two_ports;
        u32 afbc_err_cnt;
index b342ff0..21a7cf9 100644 (file)
@@ -6042,12 +6042,12 @@ static void osd_setting_blend1(struct hw_osd_blending_s *blending)
        if (!blending)
                return;
        if (osd_hw.hdr_used)
-               workaround_line = 1;
+               workaround_line = osd_hw.workaround_line;
        else {
                if (blending->layer_cnt == 2)
                        workaround_line = 0;
                else
-                       workaround_line = 1;
+                       workaround_line = osd_hw.workaround_line;
        }
        layer_blend = &(blending->layer_blend);
        blend_reg = &(blending->blend_reg);
@@ -6478,9 +6478,10 @@ static void osd_setting_blend0_input(u32 index,
        struct hw_osd_blending_s *blending)
 {
        struct layer_blend_s *layer_blend;
-       u32 workaround_line = 1;
+       u32 workaround_line = 0;
        /* for g12a blend shift issue */
 
+       workaround_line = osd_hw.workaround_line;
        layer_blend = &(blending->layer_blend);
        if (index == OSD1) {
 
@@ -8338,6 +8339,13 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                osd_hw.disp_info.background_h = 1080;
                osd_hw.vinfo_width = 1920;
                osd_hw.vinfo_height = 1080;
+               if ((osd_hw.osd_meson_dev.cpu_id ==
+                       __MESON_CPU_MAJOR_ID_G12A) ||
+                       (osd_hw.osd_meson_dev.cpu_id ==
+                       __MESON_CPU_MAJOR_ID_G12B))
+                       osd_hw.workaround_line = 1;
+               else
+                       osd_hw.workaround_line = 0;
                for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count; idx++) {
                        osd_hw.premult_en[idx] = 0;
                        osd_hw.osd_afbcd[idx].format = COLOR_INDEX_32_ABGR;