arm64: dts: microchip: align SPI NOR node name with dtschema

The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220407143223.295344-2-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi b/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
index 03f107e427d7075ddfecb7fc0b5386308ef6eee5..ce0747fd6444deed3a82900a2984503603707c3a 100644 (file)
--- a/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_nand.dtsi
@@ -19,7 +19,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <14>; /* CS14 */
-               spi-flash@6 {
+               flash@6 {
                        compatible = "spi-nand";
                        pinctrl-0 = <&cs14_pins>;
                        pinctrl-names = "default";

diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
index 9baa085d7861f6d8c8c942c6eb5c4a4ab0f2b928..dbf8c1d48a027f73a3431704c7bc575d14bfcf3d 100644 (file)
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts
@@ -47,7 +47,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>;      /* CS0 */
-               spi-flash@9 {
+               flash@9 {
                        compatible = "jedec,spi-nor";
                        spi-max-frequency = <8000000>;
                        reg = <0x9>;    /* SPI */
@@ -59,7 +59,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <1>; /* CS1 */
-               spi-flash@9 {
+               flash@9 {
                        compatible = "spi-nand";
                        pinctrl-0 = <&cs1_pins>;
                        pinctrl-names = "default";

diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
index 33faf1f3264f1e6be355bd05451f2b57a24cb2ce..699256f1b9d8c069cdc642e1cb340834b02980a1 100644 (file)
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi
@@ -274,7 +274,7 @@
 
 &spi0 {
        status = "okay";
-       spi-flash@0 {
+       flash@0 {
                compatible = "jedec,spi-nor";
                spi-max-frequency = <8000000>;
                reg = <0>;
@@ -289,7 +289,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>;      /* CS0 */
-               spi-flash@9 {
+               flash@9 {
                        compatible = "jedec,spi-nor";
                        spi-max-frequency = <8000000>;
                        reg = <0x9>;    /* SPI */

diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
index ef96e6d8c6b34246265db7a37e25a328a107ceec..d10a9172b529e0e7bea65bca6eda3daabdfb5244 100644 (file)
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi
@@ -89,7 +89,7 @@
 
 &spi0 {
        status = "okay";
-       spi-flash@0 {
+       flash@0 {
                compatible = "jedec,spi-nor";
                spi-max-frequency = <8000000>;
                reg = <0>;
@@ -104,7 +104,7 @@
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>; /* CS0 */
-               spi-flash@9 {
+               flash@9 {
                        compatible = "jedec,spi-nor";
                        spi-max-frequency = <8000000>;
                        reg = <0x9>; /* SPI */