Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
+ * lib/target-supports.exp
+ (check_profiling_available): Add AArch64.
+ (check_effective_target_vect_int): Likewise.
+ (check_effective_target_vect_shift): Likewise.
+ (check_effective_target_vect_float): Likewise.
+ (check_effective_target_vect_double): Likewise.
+ (check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
+ (check_effective_target_vect_widen_mult_hi_to_si): Likewise.
+ (check_effective_target_vect_pack_trunc): Likewise.
+ (check_effective_target_vect_unpack): Likewise.
+ (check_effective_target_vect_hw_misalign): Likewise.
+ (check_effective_target_vect_short_mult): Likewise.
+ (check_effective_target_vect_int_mult): Likewise.
+ (check_effective_target_vect_stridedN): Likewise.
+ (check_effective_target_sync_int_long): Likewise.
+ (check_effective_target_sync_char_short): Likewise.
+ (check_vect_support_and_set_flags): Likewise.
+ (check_effective_target_aarch64_tiny): New.
+ (check_effective_target_aarch64_small): New.
+ (check_effective_target_aarch64_large): New.
+ * g++.dg/other/PR23205.C: Enable aarch64.
+ * g++.dg/other/pr23205-2.C: Likewise.
+ * g++.old-deja/g++.abi/ptrmem.C: Likewise.
+ * gcc.c-torture/execute/20101011-1.c: Likewise.
+ * gcc.dg/20020312-2.c: Likewise.
+ * gcc.dg/20040813-1.c: Likewise.
+ * gcc.dg/builtin-apply2.c: Likewise.
+ * gcc.dg/stack-usage-1.c: Likewise.
+
+2012-10-23 Ian Bolton <ian.bolton@arm.com>
+ Jim MacArthur <jim.macarthur@arm.com>
+ Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
+ Marcus Shawcroft <marcus.shawcroft@arm.com>
+ Nigel Stephens <nigel.stephens@arm.com>
+ Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+ Richard Earnshaw <rearnsha@arm.com>
+ Sofiane Naci <sofiane.naci@arm.com>
+ Stephen Thomas <stephen.thomas@arm.com>
+ Tejas Belagod <tejas.belagod@arm.com>
+ Yufeng Zhang <yufeng.zhang@arm.com>
+
* gcc.target/aarch64/aapcs/aapcs64.exp: New file.
* gcc.target/aarch64/aapcs/abitest-2.h: New file.
* gcc.target/aarch64/aapcs/abitest-common.h: New file.
return 0
}
+ # We don't yet support profiling for AArch64.
+ if { [istarget aarch64*-*-*]
+ && ([lindex $test_what 1] == "-p"
+ || [lindex $test_what 1] == "-pg") } {
+ return 0
+ }
+
# cygwin does not support -p.
if { [istarget *-*-cygwin*] && $test_what == "-p" } {
return 0
if {![info exists profiling_available_saved]} {
# Some targets don't have any implementation of __bb_init_func or are
# missing other needed machinery.
- if { [istarget am3*-*-linux*]
+ if { [istarget aarch64*-*-elf]
+ || [istarget am3*-*-linux*]
|| [istarget arm*-*-eabi*]
|| [istarget arm*-*-elf]
|| [istarget arm*-*-symbianelf*]
|| [istarget sparc*-*-*]
|| [istarget alpha*-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
return $et_vect_floatuint_cvt_saved
}
+# Return 1 if this is a AArch64 target supporting big endian
+proc check_effective_target_aarch64_big_endian { } {
+ return [check_no_compiler_messages aarch64_big_endian assembly {
+ #if !defined(__aarch64__) || !defined(__AARCH64EB__)
+ #error FOO
+ #endif
+ }]
+}
+
# Return 1 is this is an arm target using 32-bit instructions
proc check_effective_target_arm32 { } {
return [check_no_compiler_messages arm32 assembly {
|| [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
|| [istarget mipsisa64*-*-*]
|| [istarget x86_64-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32] } {
set et_vect_float_saved 1
}
} else {
set et_vect_double_saved 0
if { [istarget i?86-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget x86_64-*-*] } {
if { [check_no_compiler_messages vect_double assembly {
#ifdef __tune_atom__
set et_vect_widen_mult_qi_to_hi_saved 0
}
if { [istarget powerpc*-*-*]
+ || [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
set et_vect_widen_mult_qi_to_hi_saved 1
}
if { [istarget powerpc*-*-*]
|| [istarget spu-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget spu-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
&& [check_effective_target_arm_little_endian]) } {
|| [istarget x86_64-*-*]
|| [istarget spu-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
&& [check_effective_target_arm_little_endian]) } {
set et_vect_unpack_saved 1
} else {
set et_vect_hw_misalign_saved 0
if { ([istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget i?86-*-*]) } {
set et_vect_hw_misalign_saved 1
}
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget powerpc*-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32]
|| ([istarget mips*-*-*]
&& [check_effective_target_mips_loongson]) } {
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget ia64-*-*]
+ || [istarget aarch64*-*-*]
|| [check_effective_target_arm32] } {
set et_vect_int_mult_saved 1
}
&& [check_effective_target_vect_extract_even_odd] } {
set et_vect_stridedN_saved 1
}
- if { [istarget arm*-*-*] && N >= 2 && N <= 4 } {
+ if { ([istarget arm*-*-*]
+ || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
set et_vect_stridedN_saved 1
}
}
if { [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
+ || [istarget aarch64*-*-*]
|| [istarget alpha*-*-*]
|| [istarget arm*-*-linux-*]
|| [istarget bfin*-*linux*]
set et_sync_char_short_saved 0
# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
# load-reserved/store-conditional instructions.
- if { [istarget ia64-*-*]
+ if { [istarget aarch64*-*-*]
+ || [istarget ia64-*-*]
|| [istarget i?86-*-*]
|| [istarget x86_64-*-*]
|| [istarget alpha*-*-*]
} else {
set dg-do-what-default compile
}
+ } elseif [istarget "aarch64*-*-*"] {
+ set dg-do-what-default run
} else {
return 0
}
#include <ucontext.h>
}]
}
+
+proc check_effective_target_aarch64_tiny { } {
+ if { [istarget aarch64*-*-*] } {
+ return [check_no_compiler_messages aarch64_tiny object {
+ #ifdef __AARCH64_CMODEL_TINY__
+ int dummy;
+ #else
+ #error target not AArch64 tiny code model
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
+proc check_effective_target_aarch64_small { } {
+ if { [istarget aarch64*-*-*] } {
+ return [check_no_compiler_messages aarch64_small object {
+ #ifdef __AARCH64_CMODEL_SMALL__
+ int dummy;
+ #else
+ #error target not AArch64 small code model
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
+proc check_effective_target_aarch64_large { } {
+ if { [istarget aarch64*-*-*] } {
+ return [check_no_compiler_messages aarch64_large object {
+ #ifdef __AARCH64_CMODEL_LARGE__
+ int dummy;
+ #else
+ #error target not AArch64 large code model
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}