arm64: dts: xilinx: zynqmp: Add RPU subsystem device node

RPU subsystem can be configured in cluster-mode or split mode.
Also each r5 core has separate power domains.

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20221114233940.2096237-3-tanmay.shah@amd.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index a549265..c0f6083 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -100,6 +100,22 @@
                };
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               rproc_0_fw_image: memory@3ed00000 {
+                       no-map;
+                       reg = <0x0 0x3ed00000 0x0 0x40000>;
+               };
+
+               rproc_1_fw_image: memory@3ef00000 {
+                       no-map;
+                       reg = <0x0 0x3ef00000 0x0 0x40000>;
+               };
+       };
+
        zynqmp_ipi: zynqmp_ipi {
                compatible = "xlnx,zynqmp-ipi-mailbox";
                interrupt-parent = <&gic>;
@@ -203,6 +219,23 @@
                ranges;
        };
 
+       remoteproc {
+               compatible = "xlnx,zynqmp-r5fss";
+               xlnx,cluster-mode = <1>;
+
+               r5f-0 {
+                       compatible = "xlnx,zynqmp-r5f";
+                       power-domains = <&zynqmp_firmware PD_RPU_0>;
+                       memory-region = <&rproc_0_fw_image>;
+               };
+
+               r5f-1 {
+                       compatible = "xlnx,zynqmp-r5f";
+                       power-domains = <&zynqmp_firmware PD_RPU_1>;
+                       memory-region = <&rproc_1_fw_image>;
+               };
+       };
+
        amba: axi {
                compatible = "simple-bus";
                #address-cells = <2>;