return Result;
}
-static RISCVVLMUL getLMUL(EVT VT) {
+static RISCVVLMUL getLMUL(MVT VT) {
switch (VT.getSizeInBits().getKnownMinValue() / 8) {
default:
llvm_unreachable("Invalid LMUL.");
}
}
-static unsigned getSubregIndexByEVT(EVT VT, unsigned Index) {
+static unsigned getSubregIndexByMVT(MVT VT, unsigned Index) {
RISCVVLMUL LMUL = getLMUL(VT);
if (LMUL == RISCVVLMUL::LMUL_F8 || LMUL == RISCVVLMUL::LMUL_F4 ||
LMUL == RISCVVLMUL::LMUL_F2 || LMUL == RISCVVLMUL::LMUL_1) {
bool IsStrided) {
SDLoc DL(Node);
unsigned NF = Node->getNumValues() - 1;
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
SDValue SuperReg = SDValue(Load, 0);
for (unsigned I = 0; I < NF; ++I)
ReplaceUses(SDValue(Node, I),
- CurDAG->getTargetExtractSubreg(getSubregIndexByEVT(VT, I), DL,
+ CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL,
VT, SuperReg));
ReplaceUses(SDValue(Node, NF), SDValue(Load, 1));
bool IsStrided) {
SDLoc DL(Node);
unsigned NF = Node->getNumValues() - 1;
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
SDValue SuperReg = SDValue(Load, 0);
for (unsigned I = 0; I < NF; ++I)
ReplaceUses(SDValue(Node, I),
- CurDAG->getTargetExtractSubreg(getSubregIndexByEVT(VT, I), DL,
+ CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL,
VT, SuperReg));
ReplaceUses(SDValue(Node, NF), SDValue(Load, 1));
SDLoc DL(Node);
unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
unsigned NF = Node->getNumValues() - 2; // Do not count VL and Chain.
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
SDValue SuperReg = SDValue(Load, 0);
for (unsigned I = 0; I < NF; ++I)
ReplaceUses(SDValue(Node, I),
- CurDAG->getTargetExtractSubreg(getSubregIndexByEVT(VT, I), DL,
+ CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL,
VT, SuperReg));
ReplaceUses(SDValue(Node, NF), SDValue(ReadVL, 0)); // VL
SDLoc DL(Node);
unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
unsigned NF = Node->getNumValues() - 2; // Do not count VL and Chain.
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
SDValue SuperReg = SDValue(Load, 0);
for (unsigned I = 0; I < NF; ++I)
ReplaceUses(SDValue(Node, I),
- CurDAG->getTargetExtractSubreg(getSubregIndexByEVT(VT, I), DL,
+ CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL,
VT, SuperReg));
ReplaceUses(SDValue(Node, NF), SDValue(ReadVL, 0)); // VL
void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, unsigned IntNo) {
SDLoc DL(Node);
unsigned NF = Node->getNumValues() - 1;
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
SEW, Node->getOperand(0) // Chain.
};
- EVT IndexVT = Node->getOperand(3)->getValueType(0);
+ MVT IndexVT = Node->getOperand(3)->getSimpleValueType(0);
RISCVVLMUL IndexLMUL = getLMUL(IndexVT);
unsigned IndexScalarSize = IndexVT.getScalarSizeInBits();
const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo(
SDValue SuperReg = SDValue(Load, 0);
for (unsigned I = 0; I < NF; ++I)
ReplaceUses(SDValue(Node, I),
- CurDAG->getTargetExtractSubreg(getSubregIndexByEVT(VT, I), DL,
+ CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL,
VT, SuperReg));
ReplaceUses(SDValue(Node, NF), SDValue(Load, 1));
void RISCVDAGToDAGISel::selectVLXSEGMask(SDNode *Node, unsigned IntNo) {
SDLoc DL(Node);
unsigned NF = Node->getNumValues() - 1;
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
Node->getOperand(0) // Chain.
};
- EVT IndexVT = Node->getOperand(NF + 3)->getValueType(0);
+ MVT IndexVT = Node->getOperand(NF + 3)->getSimpleValueType(0);
RISCVVLMUL IndexLMUL = getLMUL(IndexVT);
unsigned IndexScalarSize = IndexVT.getScalarSizeInBits();
const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo(
SDValue SuperReg = SDValue(Load, 0);
for (unsigned I = 0; I < NF; ++I)
ReplaceUses(SDValue(Node, I),
- CurDAG->getTargetExtractSubreg(getSubregIndexByEVT(VT, I), DL,
+ CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL,
VT, SuperReg));
ReplaceUses(SDValue(Node, NF), SDValue(Load, 1));
unsigned NF = Node->getNumOperands() - 4;
if (IsStrided)
NF--;
- EVT VT = Node->getOperand(2)->getValueType(0);
+ MVT VT = Node->getOperand(2)->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
unsigned NF = Node->getNumOperands() - 5;
if (IsStrided)
NF--;
- EVT VT = Node->getOperand(2)->getValueType(0);
+ MVT VT = Node->getOperand(2)->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, unsigned IntNo) {
SDLoc DL(Node);
unsigned NF = Node->getNumOperands() - 5;
- EVT VT = Node->getOperand(2)->getValueType(0);
+ MVT VT = Node->getOperand(2)->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
Node->getOperand(0) // Chain.
};
- EVT IndexVT = Node->getOperand(3 + NF)->getValueType(0);
+ MVT IndexVT = Node->getOperand(3 + NF)->getSimpleValueType(0);
RISCVVLMUL IndexLMUL = getLMUL(IndexVT);
unsigned IndexScalarSize = IndexVT.getScalarSizeInBits();
const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo(
void RISCVDAGToDAGISel::selectVSXSEGMask(SDNode *Node, unsigned IntNo) {
SDLoc DL(Node);
unsigned NF = Node->getNumOperands() - 6;
- EVT VT = Node->getOperand(2)->getValueType(0);
+ MVT VT = Node->getOperand(2)->getSimpleValueType(0);
unsigned ScalarSize = VT.getScalarSizeInBits();
MVT XLenVT = Subtarget->getXLenVT();
RISCVVLMUL LMUL = getLMUL(VT);
Node->getOperand(0) // Chain.
};
- EVT IndexVT = Node->getOperand(3 + NF)->getValueType(0);
+ MVT IndexVT = Node->getOperand(3 + NF)->getSimpleValueType(0);
RISCVVLMUL IndexLMUL = getLMUL(IndexVT);
unsigned IndexScalarSize = IndexVT.getScalarSizeInBits();
const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo(
unsigned Opcode = Node->getOpcode();
MVT XLenVT = Subtarget->getXLenVT();
SDLoc DL(Node);
- EVT VT = Node->getValueType(0);
+ MVT VT = Node->getSimpleValueType(0);
switch (Opcode) {
case ISD::ADD: {
if (!(-4096 <= Imm && Imm <= -2049) && !(2048 <= Imm && Imm <= 4094))
break;
// Break the imm to imm0+imm1.
- EVT VT = Node->getValueType(0);
const SDValue ImmOp0 = CurDAG->getTargetConstant(Imm - Imm / 2, DL, VT);
const SDValue ImmOp1 = CurDAG->getTargetConstant(Imm / 2, DL, VT);
auto *NodeAddi0 = CurDAG->getMachineNode(RISCV::ADDI, DL, VT,
// any zero-extended immediate.
// For example, we wish to match (i8 -1) -> (XLenVT 255) as a simm5 by first
// sign-extending to (XLenVT -1).
- auto XLenVT = Subtarget->getXLenVT();
+ MVT XLenVT = Subtarget->getXLenVT();
assert(XLenVT == N.getOperand(0).getSimpleValueType() &&
"Unexpected splat operand type");
- auto EltVT = N.getValueType().getVectorElementType();
+ MVT EltVT = N.getSimpleValueType().getVectorElementType();
if (EltVT.bitsLT(XLenVT)) {
SplatImm = SignExtend64(SplatImm, EltVT.getSizeInBits());
}