radeon: fixup scratch register interactions properly
authorDave Airlie <airlied@redhat.com>
Sun, 2 Nov 2008 23:29:22 +0000 (09:29 +1000)
committerDave Airlie <airlied@redhat.com>
Sun, 2 Nov 2008 23:29:22 +0000 (09:29 +1000)
shared-core/radeon_cp.c
shared-core/radeon_cs.c
shared-core/radeon_drv.h

index 0200797..71d1a61 100644 (file)
@@ -791,7 +791,10 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
                                     dev_priv->ring_rptr->handle +
                                     (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
 
-       RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
+       if (dev_priv->chip_family > CHIP_R300)
+               RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x3f); 
+       else
+               RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x1f); 
 
        /* Turn on bus mastering */
        tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
@@ -806,6 +809,15 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
        dev_priv->scratch[2] = 0;
        RADEON_WRITE(RADEON_LAST_CLEAR_REG, 0);
 
+       dev_priv->scratch[3] = 0;
+       RADEON_WRITE(RADEON_LAST_SWI_REG, 0);
+
+       dev_priv->scratch[4] = 0;
+       RADEON_WRITE(RADEON_SCRATCH_REG4, 0);
+
+       dev_priv->scratch[6] = 0;
+       RADEON_WRITE(RADEON_SCRATCH_REG6, 0);
+
        radeon_do_wait_for_idle(dev_priv);
 
        /* Sync everything up */
index 3e47ad1..b598289 100644 (file)
@@ -365,14 +365,14 @@ uint32_t r100_cs_id_last_get(struct drm_device *dev)
 {
        drm_radeon_private_t *dev_priv = dev->dev_private;
 
-       return RADEON_READ(RADEON_SCRATCH_REG4);
+       return GET_SCRATCH(4);
 }
 
 uint32_t r300_cs_id_last_get(struct drm_device *dev)
 {
        drm_radeon_private_t *dev_priv = dev->dev_private;
 
-       return RADEON_READ(RADEON_SCRATCH_REG6);
+       return GET_SCRATCH(6);
 }
 
 int radeon_cs_init(struct drm_device *dev)
index 3be99eb..2d592e4 100644 (file)
@@ -733,11 +733,11 @@ int radeon_resume(struct drm_device *dev);
 
 #define RADEON_SCRATCHOFF( x )         (RADEON_SCRATCH_REG_OFFSET + 4*(x))
 
-#define GET_SCRATCH( x )       (dev_priv->writeback_works ?                    \
-                                (dev_priv->mm.ring_read.bo ? \
-                                 readl(dev_priv->mm.ring_read.kmap.virtual + RADEON_SCRATCHOFF(x)) : \
-                                 DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(x))) : \
-                                RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x)))
+#define GET_SCRATCH( x ) (dev_priv->writeback_works ?                  \
+                        (dev_priv->mm.ring_read.bo ? \
+                         readl(dev_priv->mm.ring_read.kmap.virtual + RADEON_SCRATCHOFF(x)) : \
+                         DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(x))) : \
+                        RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x)))
 
 #define RADEON_CRTC_CRNT_FRAME 0x0214
 #define RADEON_CRTC2_CRNT_FRAME 0x0314
@@ -1607,7 +1607,7 @@ extern uint64_t radeon_evict_flags(struct drm_buffer_object *bo);
 #define BREADCRUMB_MASK ((1U << BREADCRUMB_BITS) - 1)
 
 /* Breadcrumb - swi irq */
-#define READ_BREADCRUMB(dev_priv) RADEON_READ(RADEON_LAST_SWI_REG)
+#define READ_BREADCRUMB(dev_priv) GET_SCRATCH(3)
 
 static inline int radeon_update_breadcrumb(struct drm_device *dev)
 {