mips: Add support for SoM "VoCore2".

Small patch to add support for VoCore/VoCore2 board.

VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.

Details about this SoM can be found at "https://vocore.io/v2.html".

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
Reviewed-by: Stefan Roese <sr@denx.de>

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index cbd0c8b..f711e9f 100644 (file)
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -23,6 +23,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
 dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
 dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
 dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
 dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb

diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts
new file mode 100644 (file)
index 0000000..3502e4b
--- /dev/null
+++ b/arch/mips/dts/vocore_vocore2.dts
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
+ */
+
+/dts-v1/;
+
+#include "mt7628a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       compatible = "vocore,vocore2", "ralink,mt7628a-soc";
+       model = "VoCore2";
+
+       aliases {
+               serial0 = &uart2;
+               spi0 = &spi0;
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x08000000>;
+       };
+       leds {
+               compatible = "gpio-leds";
+
+               power {
+                       label = "vocore:power";
+                       gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+       };
+
+       chosen {
+               bootargs = "console=ttyS2,115200";
+               stdout-path = &uart2;
+       };
+};
+
+&pinctrl {
+       state_default: pin_state {
+               p0led {
+                       groups = "p0led_a";
+                       function = "led";
+               };
+       };
+};
+
+&uart2 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pwm_pins>;
+};
+
+&spi0 {
+       status = "okay";
+       nor0: spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <25000000>;
+               reg = <0>;
+       };
+};
+
+&eth {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&ephy_iot_mode>;
+       mediatek,poll-link-phy = <0>;
+};
+
+&mmc {
+       status = "okay";
+
+       bus-width = <4>;
+       max-frequency = <48000000>;
+       cap-sd-highspeed;
+       cap-mmc-highspeed;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&sd_iot_mode>;
+};

diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 60cc0f8..737de2c 100644 (file)
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -87,6 +87,15 @@ config BOARD_MT7628_RFB
          SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host,
          1 SDXC, 1 PCIe socket and JTAG pins.
 
+config BOARD_VOCORE2
+       bool "VoCore2"
+       depends on SOC_MT7628
+       select SPL_SERIAL_SUPPORT
+       select SPL_UART2_SPIS_PINMUX
+       help
+         VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
+         and 16 MiB of flash (SPI).
+
 endchoice
 
 config SPL_UART2_SPIS_PINMUX
@@ -100,5 +109,6 @@ config SPL_UART2_SPIS_PINMUX
 source "board/gardena/smart-gateway-mt7688/Kconfig"
 source "board/mediatek/mt7628/Kconfig"
 source "board/seeed/linkit-smart-7688/Kconfig"
+source "board/vocore/vocore2/Kconfig"
 
 endmenu

diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig
new file mode 100644 (file)
index 0000000..baeff31
--- /dev/null
+++ b/board/vocore/vocore2/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_VOCORE2
+
+config SYS_BOARD
+       default "vocore2"
+
+config SYS_VENDOR
+       default "vocore"
+
+config SYS_CONFIG_NAME
+       default "vocore2"
+
+endif

diff --git a/board/vocore/vocore2/MAINTAINERS b/board/vocore/vocore2/MAINTAINERS
new file mode 100644 (file)
index 0000000..8472351
--- /dev/null
+++ b/board/vocore/vocore2/MAINTAINERS
@@ -0,0 +1,7 @@
+VOCORE_VOCORE2 BOARD
+M:     Mauro Condarelli <mc5686@mclink.it>
+S:     Maintained
+F: board/vocore/vocore2
+F: include/configs/vocore2.h
+F: configs/vocore2_defconfig
+F: arch/mips/dts/vocore_vocore2.dts

diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile
new file mode 100644 (file)
index 0000000..70cd7a8
--- /dev/null
+++ b/board/vocore/vocore2/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += board.o

diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c
new file mode 100644 (file)
index 0000000..27e42d1
--- /dev/null
+++ b/board/vocore/vocore2/board.c
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
+ *
+ * Nothing actually needed here
+ */

diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
new file mode 100644 (file)
index 0000000..6cacec0
--- /dev/null
+++ b/configs/vocore2_defconfig
@@ -0,0 +1,101 @@
+CONFIG_MIPS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x04e000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_ARCH_MTMIPS=y
+CONFIG_BOARD_VOCORE2=y
+CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_LOGLEVEL=8
+CONFIG_VERSION_VARIABLE=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_WDT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BOOTCOUNT=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi0.0"
+CONFIG_MTDPARTS_DEFAULT="spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)"
+CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC=y
+CONFIG_DM_MMC=y
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MMC_MTK=y
+CONFIG_MTD=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_MT7628_ETH=y
+CONFIG_PHY=y
+CONFIG_MT76X8_USB_PHY=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_CONS_INDEX=3
+CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_WDT=y
+CONFIG_WDT_MT7621=y
+CONFIG_FS_EXT4=y
+CONFIG_FAT_WRITE=y
+CONFIG_LZMA=y
+CONFIG_LZO=y
+CONFIG_SPL_LZMA=y

diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
new file mode 100644 (file)
index 0000000..8100e4d
--- /dev/null
+++ b/include/configs/vocore2.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it>
+ */
+
+#ifndef __VOCORE2_CONFIG_H__
+#define __VOCORE2_CONFIG_H__
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ     290000000
+
+/* RAM */
+#define CONFIG_SYS_SDRAM_BASE          0x80000000
+
+#define CONFIG_SYS_LOAD_ADDR   CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#define CONFIG_SYS_INIT_SP_OFFSET      0x400000
+
+/* SPL */
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_SYS_UBOOT_START         CONFIG_SYS_TEXT_BASE
+#define CONFIG_SPL_BSS_START_ADDR      0x80010000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x10000
+#define CONFIG_SPL_MAX_SIZE            0x10000
+
+/* Dummy value */
+#define CONFIG_SYS_UBOOT_BASE          0
+
+/* Serial SPL */
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_NS16550_CLK         40000000
+#define CONFIG_SYS_NS16550_REG_SIZE    -4
+#define CONFIG_SYS_NS16550_COM3                0xb0000e00
+#define CONFIG_CONS_INDEX              3
+
+/* RAM */
+#define CONFIG_SYS_MEMTEST_START       0x80100000
+#define CONFIG_SYS_MEMTEST_END         0x80400000
+
+/* Memory usage */
+#define CONFIG_SYS_MAXARGS             64
+#define CONFIG_SYS_MALLOC_LEN          (1024 * 1024)
+#define CONFIG_SYS_BOOTPARAMS_LEN      (128 * 1024)
+#define CONFIG_SYS_CBSIZE              512
+
+/* U-Boot */
+#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_TEXT_BASE
+
+/* Environment settings */
+
+#endif //__VOCORE2_CONFIG_H__