void * emulpc, *contpc;
unsigned int cond;
- if (get_user(ir, (mips_instruction *) xcp->cp0_epc)) {
+ if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) {
fpuemustats.errors++;
return SIGBUS;
}
#endif
return SIGILL;
}
- if (get_user(ir, (mips_instruction *) emulpc)) {
+ if (get_user(ir, (mips_instruction __user *) emulpc)) {
fpuemustats.errors++;
return SIGBUS;
}
switch (MIPSInst_OPCODE(ir)) {
#ifndef SINGLE_ONLY_FPU
case ldc1_op:{
- u64 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+ u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
MIPSInst_SIMM(ir));
u64 val;
}
case sdc1_op:{
- u64 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+ u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] +
MIPSInst_SIMM(ir));
u64 val;
#endif
case lwc1_op:{
- u32 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+ u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
MIPSInst_SIMM(ir));
u32 val;
}
case swc1_op:{
- u32 *va = (void *) (xcp->regs[MIPSInst_RS(ir)] +
+ u32 __user *va = (u32 __user *) (xcp->regs[MIPSInst_RS(ir)] +
MIPSInst_SIMM(ir));
u32 val;
(xcp->cp0_epc +
(MIPSInst_SIMM(ir) << 2));
- if (get_user(ir, (mips_instruction *)
- (void *) xcp->cp0_epc)) {
+ if (get_user(ir,
+ (mips_instruction __user *) xcp->cp0_epc)) {
fpuemustats.errors++;
return SIGBUS;
}
ieee754sp(*handler) (ieee754sp, ieee754sp, ieee754sp);
ieee754sp fd, fr, fs, ft;
- u32 *va;
+ u32 __user *va;
u32 val;
switch (MIPSInst_FUNC(ir)) {
case lwxc1_op:
- va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+ va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
fpuemustats.loads++;
break;
case swxc1_op:
- va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+ va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
fpuemustats.stores++;
case d_fmt:{ /* 1 */
ieee754dp(*handler) (ieee754dp, ieee754dp, ieee754dp);
ieee754dp fd, fr, fs, ft;
- u64 *va;
+ u64 __user *va;
u64 val;
switch (MIPSInst_FUNC(ir)) {
case ldxc1_op:
- va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+ va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
fpuemustats.loads++;
break;
case sdxc1_op:
- va = (void *) (xcp->regs[MIPSInst_FR(ir)] +
+ va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] +
xcp->regs[MIPSInst_FT(ir)]);
fpuemustats.stores++;
do {
prevepc = xcp->cp0_epc;
- if (get_user(insn, (mips_instruction *) xcp->cp0_epc)) {
+ if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) {
fpuemustats.errors++;
return SIGBUS;
}