thermal: intel: int340x: processor: Add MMIO RAPL PL4 support
authorZhang Rui <rui.zhang@intel.com>
Mon, 30 Sep 2024 08:18:01 +0000 (16:18 +0800)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Tue, 8 Oct 2024 19:39:33 +0000 (21:39 +0200)
Similar to the MSR RAPL interface, MMIO RAPL supports PL4 too, so add
MMIO RAPL PL4d support to the processor_thermal driver.

As a result, the powercap sysfs for MMIO RAPL will show a new "peak
power" constraint.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://patch.msgid.link/20240930081801.28502-7-rui.zhang@intel.com
[ rjw: Subject and changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c

index 769510e748c0b24bede2d5eeb5f3e4267bbafe97..bde2cc386afdda62d11d51837de9e66c3cf26a9e 100644 (file)
@@ -13,9 +13,9 @@ static struct rapl_if_priv rapl_mmio_priv;
 
 static const struct rapl_mmio_regs rapl_mmio_default = {
        .reg_unit = 0x5938,
-       .regs[RAPL_DOMAIN_PACKAGE] = { 0x59a0, 0x593c, 0x58f0, 0, 0x5930},
+       .regs[RAPL_DOMAIN_PACKAGE] = { 0x59a0, 0x593c, 0x58f0, 0, 0x5930, 0x59b0},
        .regs[RAPL_DOMAIN_DRAM] = { 0x58e0, 0x58e8, 0x58ec, 0, 0},
-       .limits[RAPL_DOMAIN_PACKAGE] = BIT(POWER_LIMIT2),
+       .limits[RAPL_DOMAIN_PACKAGE] = BIT(POWER_LIMIT2) | BIT(POWER_LIMIT4),
        .limits[RAPL_DOMAIN_DRAM] = BIT(POWER_LIMIT2),
 };