cpufreq: imx6q: imx6ull should use the same flow as imx6ul
authorOctavian Purdila <octavian.purdila@nxp.com>
Tue, 30 May 2017 15:57:18 +0000 (18:57 +0300)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Fri, 23 Jun 2017 23:35:13 +0000 (01:35 +0200)
This fixes an issue with imx6ull where setting the frequency to 528Mhz
would actually set the ARM clock to 324Mhz.

Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/cpufreq/imx6q-cpufreq.c

index 9c13f097fd8c9a96adba12cccc8e7eda523a57e3..b6edd3ccaa55b3e59c272b580796193f266f9ed4 100644 (file)
@@ -101,7 +101,8 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
         *  - Reprogram pll1_sys_clk and reparent pll1_sw_clk back to it
         *  - Disable pll2_pfd2_396m_clk
         */
-       if (of_machine_is_compatible("fsl,imx6ul")) {
+       if (of_machine_is_compatible("fsl,imx6ul") ||
+           of_machine_is_compatible("fsl,imx6ull")) {
                /*
                 * When changing pll1_sw_clk's parent to pll1_sys_clk,
                 * CPU may run at higher than 528MHz, this will lead to
@@ -215,7 +216,8 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
                goto put_clk;
        }
 
-       if (of_machine_is_compatible("fsl,imx6ul")) {
+       if (of_machine_is_compatible("fsl,imx6ul") ||
+           of_machine_is_compatible("fsl,imx6ull")) {
                pll2_bus_clk = clk_get(cpu_dev, "pll2_bus");
                secondary_sel_clk = clk_get(cpu_dev, "secondary_sel");
                if (IS_ERR(pll2_bus_clk) || IS_ERR(secondary_sel_clk)) {