[AArch64] Add support for ARMv8.1 Adv.SIMD instructions.
authormwahab <mwahab@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 26 Nov 2015 13:39:20 +0000 (13:39 +0000)
committermwahab <mwahab@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 26 Nov 2015 13:39:20 +0000 (13:39 +0000)
* config/aarch64/aarch64.h (AARCH64_ISA_RDMA): New.
(TARGET_SIMD_RDMA): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230953 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/aarch64/aarch64.h

index 5ca6cc7..f81ce79 100644 (file)
@@ -1,3 +1,8 @@
+2015-11-26  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/aarch64/aarch64.h (AARCH64_ISA_RDMA): New.
+       (TARGET_SIMD_RDMA): New.
+
 2015-11-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * combine.c (subst): Do not return clobber of zero in widening mult
index 8834c9b..68c006f 100644 (file)
@@ -157,6 +157,7 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_ISA_FP             (aarch64_isa_flags & AARCH64_FL_FP)
 #define AARCH64_ISA_SIMD           (aarch64_isa_flags & AARCH64_FL_SIMD)
 #define AARCH64_ISA_LSE                   (aarch64_isa_flags & AARCH64_FL_LSE)
+#define AARCH64_ISA_RDMA          (aarch64_isa_flags & AARCH64_FL_RDMA)
 
 /* Crypto is an optional extension to AdvSIMD.  */
 #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
@@ -181,6 +182,9 @@ extern unsigned aarch64_architecture_version;
   ((aarch64_fix_a53_err835769 == 2)    \
   ? TARGET_FIX_ERR_A53_835769_DEFAULT : aarch64_fix_a53_err835769)
 
+/* ARMv8.1 Adv.SIMD support.  */
+#define TARGET_SIMD_RDMA (TARGET_SIMD && AARCH64_ISA_RDMA)
+
 /* Standard register usage.  */
 
 /* 31 64-bit general purpose registers R0-R30: