spi: dw-mid: respect 8 bit mode
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 18 Sep 2014 17:08:51 +0000 (20:08 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 30 Oct 2014 16:35:10 +0000 (09:35 -0700)
commit b41583e7299046abdc578c33f25ed83ee95b9b31 upstream.

In case of 8 bit mode and DMA usage we end up with every second byte written as
0. We have to respect bits_per_word settings what this patch actually does.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/spi/spi-dw-mid.c

index b9f0192..58fa14d 100644 (file)
@@ -136,7 +136,7 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
        txconf.dst_addr = dws->dma_addr;
        txconf.dst_maxburst = LNW_DMA_MSIZE_16;
        txconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-       txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+       txconf.dst_addr_width = dws->dma_width;
        txconf.device_fc = false;
 
        txchan->device->device_control(txchan, DMA_SLAVE_CONFIG,
@@ -159,7 +159,7 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change)
        rxconf.src_addr = dws->dma_addr;
        rxconf.src_maxburst = LNW_DMA_MSIZE_16;
        rxconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
-       rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+       rxconf.src_addr_width = dws->dma_width;
        rxconf.device_fc = false;
 
        rxchan->device->device_control(rxchan, DMA_SLAVE_CONFIG,