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clk: rockchip: fix typo in rk3188 spdif_frac parent
author
Johan Jonker
<jbx9999@hotmail.com>
Sat, 3 Nov 2018 22:54:13 +0000
(23:54 +0100)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Wed, 9 Jan 2019 16:14:50 +0000
(17:14 +0100)
commit
8b19faf6fae2867e2c177212c541e8ae36aa4d32
upstream.
Fix typo in common_clk_branches.
Make spdif_pre parent of spdif_frac.
Fixes:
667464208989
("clk: rockchip: include downstream muxes into fractional dividers")
Cc: stable@vger.kernel.org
Signed-off-by: Johan Jonker <jbx9999@hotmail.com>
Acked-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/rockchip/clk-rk3188.c
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diff --git
a/drivers/clk/rockchip/clk-rk3188.c
b/drivers/clk/rockchip/clk-rk3188.c
index
00ad0e5
..
2b0d772
100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3188.c
+++ b/
drivers/clk/rockchip/clk-rk3188.c
@@
-382,7
+382,7
@@
static struct rockchip_clk_branch common_clk_branches[] __initdata = {
COMPOSITE_NOMUX(0, "spdif_pre", "i2s_src", 0,
RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
RK2928_CLKGATE_CON(0), 13, GFLAGS),
- COMPOSITE_FRACMUX(0, "spdif_frac", "spdif_p
ll
", CLK_SET_RATE_PARENT,
+ COMPOSITE_FRACMUX(0, "spdif_frac", "spdif_p
re
", CLK_SET_RATE_PARENT,
RK2928_CLKSEL_CON(9), 0,
RK2928_CLKGATE_CON(0), 14, GFLAGS,
&common_spdif_fracmux),