devkit8000: Add nand-spl support for new SPL
authorSimon Schwarz <simonschwarzcor@googlemail.com>
Wed, 14 Sep 2011 19:32:17 +0000 (15:32 -0400)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 30 Sep 2011 20:00:54 +0000 (22:00 +0200)
Add NAND SPL support to the devkit8000 config

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
board/timll/devkit8000/devkit8000.c
include/configs/devkit8000.h

index 533af5a..f50d113 100644 (file)
@@ -128,7 +128,7 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
 /*
  * Routine: board_eth_init
  * Description: Setting up the Ethernet hardware.
index 710092d..1d49b86 100644 (file)
                                                         CONFIG_SYS_INIT_RAM_SIZE - \
                                                         GENERATED_GBL_DATA_SIZE)
 
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START              0x40200000
+#define CONFIG_SYS_SRAM_SIZE               0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NAND_SIMPLE
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE            0xB400  /* 45 K */
+#define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR      0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT     64
+#define CONFIG_SYS_NAND_PAGE_SIZE      2048
+#define CONFIG_SYS_NAND_OOBSIZE                64
+#define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
+#define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9,\
+                                               10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE                512
+#define CONFIG_SYS_NAND_ECCBYTES       3
+
+#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE / \
+                                               CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * \
+                                               CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    0x200000
+
 #endif /* __CONFIG_H */