// Determined via a mix of micro-arch details and experimentation.
let LoopMicroOpBufferSize = 128;
let PostRAScheduler = 1; // Using PostRA sched.
- let CompleteModel = 0;
+ let CompleteModel = 1;
list<Predicate> UnsupportedFeatures =
[HasSVE2, HasSVE2AES, HasSVE2SM4, HasSVE2SHA3, HasSVE2BitPerm, HasPAuth,
def A64FXGI01 : ProcResGroup<[A64FXIPFLA, A64FXIPPR]>;
-def A64FXGI02 : ProcResGroup<[A64FXIPFLA, A64FXIPEXA]>;
-
-def A64FXGI12 : ProcResGroup<[A64FXIPEXA, A64FXIPPR]>;
-
-def A64FXGI15 : ProcResGroup<[A64FXIPEAGA, A64FXIPPR]>;
-
-def A64FXGI05 : ProcResGroup<[A64FXIPFLA, A64FXIPEAGA]>;
-
def A64FXGI24 : ProcResGroup<[A64FXIPEXA, A64FXIPEXB]>;
-def A64FXGI124 : ProcResGroup<[A64FXIPEXA, A64FXIPEXB, A64FXIPPR]>;
+def A64FXGI56 : ProcResGroup<[A64FXIPEAGA, A64FXIPEAGB]>;
def A64FXGI056 : ProcResGroup<[A64FXIPFLA, A64FXIPEAGA, A64FXIPEAGB]>;
-def A64FXGI0256 : ProcResGroup<[A64FXIPFLA, A64FXIPEXA, A64FXIPEAGA, A64FXIPEAGB]>;
-
-def A64FXGI56 : ProcResGroup<[A64FXIPEAGA, A64FXIPEAGB]>;
-
def A64FXGI2456 : ProcResGroup<[A64FXIPEXA, A64FXIPEXB, A64FXIPEAGA, A64FXIPEAGB]>;
def A64FXAny : ProcResGroup<[A64FXIPFLA, A64FXIPPR, A64FXIPEXA, A64FXIPFLB,
- A64FXIPEXB, A64FXIPEAGA, A64FXIPEAGB, A64FXIPBR]> {
- let BufferSize = 60;
-}
-
-def A64FXWrite_6Cyc : SchedWriteRes<[]> {
- let Latency = 6;
-}
+ A64FXIPEXB, A64FXIPEAGA, A64FXIPEAGB, A64FXIPBR]>;
def A64FXWrite_1Cyc_GI7 : SchedWriteRes<[A64FXGI7]> {
let Latency = 1;
let Latency = 4;
}
-def A64FXWrite_5Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
- let Latency = 5;
-}
-
def A64FXWrite_6Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
let Latency = 6;
}
let Latency = 9;
}
-def A64FXWrite_13Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
- let Latency = 13;
-}
-
-def A64FXWrite_37Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
- let Latency = 37;
-}
-
-def A64FXWrite_98Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
- let Latency = 98;
-}
-
-def A64FXWrite_134Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
- let Latency = 134;
-}
-
-def A64FXWrite_154Cyc_GI0 : SchedWriteRes<[A64FXGI0]> {
- let Latency = 154;
-}
-
-def A64FXWrite_4Cyc_GI01 : SchedWriteRes<[A64FXGI01]> {
- let Latency = 4;
-}
-
-def A64FXWrite_6Cyc_GI01 : SchedWriteRes<[A64FXGI01]> {
- let Latency = 6;
-}
-
-def A64FXWrite_8Cyc_GI01 : SchedWriteRes<[A64FXGI01]> {
- let Latency = 8;
-}
-
-def A64FXWrite_12Cyc_GI01 : SchedWriteRes<[A64FXGI01]> {
- let Latency = 12;
-}
-
-def A64FXWrite_10Cyc_GI02 : SchedWriteRes<[A64FXGI02]> {
- let Latency = 10;
-}
-
-def A64FXWrite_17Cyc_GI02 : SchedWriteRes<[A64FXGI02]> {
- let Latency = 17;
-}
-
-def A64FXWrite_21Cyc_GI02 : SchedWriteRes<[A64FXGI02]> {
- let Latency = 21;
-}
-
def A64FXWrite_3Cyc_GI1 : SchedWriteRes<[A64FXGI1]> {
let Latency = 3;
}
-def A64FXWrite_6Cyc_NGI1 : SchedWriteRes<[A64FXGI1]> {
- let Latency = 3;
- let NumMicroOps = 2;
-}
-
-def A64FXWrite_4Cyc_GI12 : SchedWriteRes<[A64FXGI12]> {
- let Latency = 4;
-}
-
-def A64FXWrite_3Cyc_GI2 : SchedWriteRes<[A64FXGI2]> {
- let Latency = 3;
-}
-
def A64FXWrite_5Cyc_GI2 : SchedWriteRes<[A64FXGI2]> {
let Latency = 5;
}
-def A64FXWrite_6Cyc_GI2 : SchedWriteRes<[A64FXGI2]> {
- let Latency = 6;
-}
-
def A64FXWrite_4Cyc_GI3 : SchedWriteRes<[A64FXGI3]> {
let Latency = 4;
}
let Latency = 6;
}
-def A64FXWrite_6Cyc_GI15 : SchedWriteRes<[A64FXGI15]> {
- let Latency = 6;
-}
-
-def A64FXWrite_3Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 3;
-}
-
def A64FXWrite_4Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
let Latency = 4;
}
-def A64FXWrite_6Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 6;
-}
-
def A64FXWrite_8Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
let Latency = 8;
}
let Latency = 9;
}
-def A64FXWrite_10Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 10;
-}
-
-def A64FXWrite_12Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 12;
-}
-
-def A64FXWrite_14Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 14;
-}
-
-def A64FXWrite_15Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 15;
-}
-
-def A64FXWrite_15Cyc_NGI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 15;
- let NumMicroOps = 2;
-}
-
-def A64FXWrite_18Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 18;
-}
-
-def A64FXWrite_45Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 45;
-}
-
-def A64FXWrite_60Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 60;
-}
-
-def A64FXWrite_75Cyc_GI03 : SchedWriteRes<[A64FXGI03]> {
- let Latency = 75;
-}
-
-def A64FXWrite_6Cyc_GI05 : SchedWriteRes<[A64FXGI05]> {
- let Latency = 6;
-}
-
def A64FXWrite_10Cyc_GI4 : SchedWriteRes<[A64FXGI4]> {
let Latency = 10;
}
let NumMicroOps = 4;
}
-def A64FXWrite_6Cyc_GI124: SchedWriteRes<[A64FXGI124]> {
- let Latency = 6;
-}
-
-def A64FXWrite_8Cyc_GI124 : SchedWriteRes<[A64FXGI124]> {
- let Latency = 8;
- let NumMicroOps = 2;
-}
-
-def A64FXWrite_6Cyc_GI56 : SchedWriteRes<[A64FXGI56]> {
- let Latency = 0;
-}
-
def A64FXWrite_1Cyc_GI56 : SchedWriteRes<[A64FXGI56]> {
let Latency = 1;
}
let Latency = 11;
}
-def A64FXWrite_44Cyc_GI56 : SchedWriteRes<[A64FXGI56]> {
- let Latency = 44;
-}
-
-def A64FXWrite_10Cyc_GI056 : SchedWriteRes<[A64FXGI056]> {
- let Latency = 10;
-}
-
-def A64FXWrite_15Cyc_GI056 : SchedWriteRes<[A64FXGI056]> {
- let Latency = 15;
-}
-
-def A64FXWrite_19Cyc_GI056 : SchedWriteRes<[A64FXGI056]> {
- let Latency = 19;
-}
-
-def A64FXWrite_25Cyc_GI056 : SchedWriteRes<[A64FXGI056]> {
- let Latency = 25;
-}
-
-def A64FXWrite_14Cyc_GI0256 : SchedWriteRes<[A64FXGI0256]> {
- let Latency = 14;
-}
-
-def A64FXWrite_19Cyc_GI0256 : SchedWriteRes<[A64FXGI0256]> {
- let Latency = 19;
-}
-
-def A64FXWrite_29Cyc_GI0256 : SchedWriteRes<[A64FXGI0256]> {
- let Latency = 29;
-}
-
def A64FXWrite_LDNP: SchedWriteRes<[A64FXGI56]> {
let Latency = 5;
let NumMicroOps = 2;
let Latency = 14;
}
-def A64FXWrite_FMOV_VG : SchedWriteRes<[A64FXGI03]> {
- let Latency = 25;
-}
-
def A64FXWrite_ADDLV : SchedWriteRes<[A64FXGI03]> {
let Latency = 12;
}
let NumMicroOps = 7;
}
-def A64FXWrite_FMAXVVS : SchedWriteRes<[A64FXGI03]> {
- let Latency = 14;
-}
-
def A64FXWrite_BIF : SchedWriteRes<[A64FXGI03]> {
let Latency = 5;
}
let Latency = 1;
}
-def A64FXWrite_ST1W_6: SchedWriteRes<[A64FXGI056]> {
- let Latency = 6;
-}
-
-def A64FXWrite_ST2W_7: SchedWriteRes<[A64FXGI056]> {
- let Latency = 7;
-}
-
-def A64FXWrite_ST3W_8: SchedWriteRes<[A64FXGI056]> {
- let Latency = 8;
-}
-
-def A64FXWrite_ST4W_9: SchedWriteRes<[A64FXGI056]> {
- let Latency = 9;
-}
-
-def A64FXWrite_ST1W_15: SchedWriteRes<[A64FXGI056]> {
- let Latency = 15;
-}
-
-def A64FXWrite_ST1W_19: SchedWriteRes<[A64FXGI056]> {
- let Latency = 19;
-}
-
def A64FXWrite_CAS: SchedWriteRes<[A64FXGI56]> {
let Latency = 7;
}
// Address generation
def : WriteRes<WriteI, [A64FXGI2456]> {
let Latency = 1;
- let ResourceCycles = [1];
}
def : InstRW<[WriteI],
// ALU, extend and/or shift
def : WriteRes<WriteISReg, [A64FXGI2456]> {
let Latency = 2;
- let ResourceCycles = [1];
}
def : InstRW<[WriteISReg],
def : WriteRes<WriteIEReg, [A64FXGI2456]> {
let Latency = 1;
- let ResourceCycles = [1];
}
def : InstRW<[WriteIEReg],
// Move immed
def : WriteRes<WriteImm, [A64FXGI2456]> {
let Latency = 1;
- let ResourceCycles = [1];
}
def : InstRW<[A64FXWrite_1Cyc_GI2456],
// Variable shift
def : WriteRes<WriteIS, [A64FXGI2456]> {
let Latency = 1;
- let ResourceCycles = [1];
}
//---
// Multiply accumulate, W-form
def : WriteRes<WriteIM32, [A64FXGI2456]> {
let Latency = 5;
- let ResourceCycles = [1];
}
// Multiply accumulate, X-form
def : WriteRes<WriteIM64, [A64FXGI2456]> {
let Latency = 5;
- let ResourceCycles = [1];
}
def : InstRW<[WriteIM32], (instrs MADDWrrr, MSUBWrrr)>;
// Bitfield extract, two reg
def : WriteRes<WriteExtr, [A64FXGI2456]> {
let Latency = 1;
- let ResourceCycles = [1];
}
// Multiply high
// Load register, unsigned immed
def : WriteRes<WriteLD, [A64FXGI56]> {
let Latency = 4;
- let ResourceCycles = [3];
}
// Load register, immed post-index
// NOTE: Handled by WriteLD, WriteAdr.
def : WriteRes<WriteAdr, [A64FXGI2456]> {
let Latency = 1;
- let ResourceCycles = [1];
}
// Load pair, immed offset, normal
def : InstRW<[A64FXXWriteFDivDP], (instregex "^FDIVDrr")>;
def : InstRW<[A64FXXWriteFSqrtDP], (instregex "^FSQRTDr")>;
-// FP multiply
-// FP multiply accumulate
-def : WriteRes<WriteFMul, [A64FXGI03]> {
- let Latency = 9;
- let ResourceCycles = [2];
-}
-
-def A64FXXWriteFMul : SchedWriteRes<[A64FXGI03]> {
- let Latency = 9;
- let ResourceCycles = [2];
-}
-
-def A64FXXWriteFMulAcc : SchedWriteRes<[A64FXGI03]> {
- let Latency = 9;
- let ResourceCycles = [2];
-}
-
-def : InstRW<[A64FXXWriteFMul], (instregex "^FMUL", "^FNMUL")>;
-def : InstRW<[A64FXXWriteFMulAcc],
- (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
-
// FP round to integral
def : InstRW<[A64FXWrite_9Cyc_GI03],
(instregex "^FRINT(A|I|M|N|P|X|Z)(Sr|Dr)")>;
// ASIMD shift by register, complex, Q-form
def : WriteRes<WriteVd, [A64FXGI03]> {
let Latency = 4;
- let ResourceCycles = [1];
}
def : WriteRes<WriteVq, [A64FXGI03]> {
let Latency = 4;
- let ResourceCycles = [1];
}
// ASIMD arith, reduce, 4H/4S
// 3.13 ASIMD Floating-point Instructions
//---
+def : WriteRes<WriteFMul, [A64FXGI03]> {
+ let Latency = 9;
+}
+
// ASIMD FP absolute value
def : InstRW<[A64FXWrite_4Cyc_GI03], (instregex "^FABSv")>;
def : InstRW<[A64FXWrite_TBX3], (instregex "^TBXv16i8Three")>;
def : InstRW<[A64FXWrite_TBX4], (instregex "^TBXv16i8Four")>;
-// ASIMD transpose
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instregex "^TRN1", "^TRN2")>;
-
// ASIMD unzip/zip
def : InstRW<[A64FXWrite_6Cyc_GI0],
(instregex "^UZP1", "^UZP2", "^ZIP1", "^ZIP2")>;
def : InstRW<[A64FXWrite_STUR, WriteAtomic],
(instrs STLLRB, STLLRH, STLLRW, STLLRX)>;
-// [ 1] "abs $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ABS_ZPmZ_B, ABS_ZPmZ_D, ABS_ZPmZ_H, ABS_ZPmZ_S)>;
+// SVE instructions
-// [ 2] "add $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ADD_ZZZ_B, ADD_ZZZ_D, ADD_ZZZ_H, ADD_ZZZ_S)>;
+// The modeling method for SVE instructions is more accurate than others.
+// TODO: modify the model of other instructions similarly.
-// [ 3] "add $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ADD_ZPmZ_B, ADD_ZPmZ_D, ADD_ZPmZ_H, ADD_ZPmZ_S)>;
+def : InstRW<[A64FXWrite_4Cyc_GI0],
+ (instregex "^AND_ZI", "^CL[SZ]_Z", "^CPY_ZP[mz]I", "^DUP_ZZ?I", "^DUPM_Z",
+ "^EOR_ZI", "^ORR_ZI", "^FCM(EQ|GT|GE|LT|LE|NE|UO)_P",
+ "^FCPY_Z", "^F(MAX|MIN).*I_", "^NEG_Z", "^[SU](MAX|MIN)_ZI",
+ "^SUBR?_ZI")>;
-// [ 4] "add $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ADD_ZI_B, ADD_ZI_D, ADD_ZI_H, ADD_ZI_S)>;
+def : InstRW<[A64FXWrite_6Cyc_GI0],
+ (instregex "^CLAST[AB]_[VZ]", "^COMPACT_Z", "^CPY_ZPmV", "^DUP_ZR",
+ "^EXT_Z", "^FDUP_Z", "^INSR_ZV", "^LAST[AB]_V", "^REV_Z",
+ "^SPLICE_Z", "^[SU]UNPK(HI|LO)_Z", "^TBL_Z", "^TRN[12]_Z")>;
-// [ 5] "addpl $Rd, $Rn, $imm6";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs ADDPL_XXI)>;
+def : InstRW<[A64FXWrite_9Cyc_GI0],
+ (instregex "^F(ADD|SUBR?)_.*I_", "^FRECPS_Z", "^FRSQRTS_Z",
+ "^INDEX_II_[SD]", "^MUL_ZI")>;
-// [ 6] "addvl $Rd, $Rn, $imm6";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs ADDVL_XXI)>;
+def : InstRW<[A64FXWrite_4Cyc_GI3],
+ (instregex "^CNT_Z")>;
-// [ 7] "adr $Zd, [$Zn, $Zm]";
-def : InstRW<[A64FXWrite_5Cyc_GI0], (instrs ADR_LSL_ZZZ_D_0, ADR_LSL_ZZZ_D_1, ADR_LSL_ZZZ_D_2, ADR_LSL_ZZZ_D_3, ADR_LSL_ZZZ_S_0, ADR_LSL_ZZZ_S_1, ADR_LSL_ZZZ_S_2, ADR_LSL_ZZZ_S_3, ADR_SXTW_ZZZ_D_0, ADR_SXTW_ZZZ_D_1, ADR_SXTW_ZZZ_D_2, ADR_SXTW_ZZZ_D_3, ADR_UXTW_ZZZ_D_0, ADR_UXTW_ZZZ_D_1, ADR_UXTW_ZZZ_D_2, ADR_UXTW_ZZZ_D_3)>;
+def : InstRW<[A64FXWrite_4Cyc_GI03],
+ (instregex "^ABS_Z", "^ADD_Z", "^AND_Z[^I]", "^ASRR?_(WIDE_)?Z",
+ "^BIC_Z", "^ADR_[SU]XTW_Z", "^CNOT_Z", "^DEC[BHWD]_Z",
+ "^EOR_Z[^I]", "^INC[BHWD]_Z", "^ORR_Z[^I]", "^FABS_Z",
+ "^FACG[ET]_P", "^FEXPA_Z", "^F(MAX|MIN)[^V]*Z_",
+ "^FNEG_Z", "^FRECP[EX]_Z", "^FRSQRTE_Z", "^FTSSEL_Z",
+ "^LS[LR]R?(_WIDE)?_Z", "^NOT_Z", "^RBIT_Z", "^REV[BHW]_Z", "^SABD_Z",
+ "^SEL_Z", "^[SU](MAX|MIN)_ZP", "^[SU]Q(INC|DEC)[^P]_Z",
+ "^SUBR?_Z[^I]", "^[SU]XT._Z", "^UABD_Z")>;
+
+def : InstRW<[A64FXWrite_9Cyc_GI03 ],
+ (instregex "^FABD_Z", "^F(ADD|SUBR?)_.*Z_", "^FN?(MAD|MLA|MLS|MSB)_ZP",
+ "^FMUL_(ZP|ZZZ_)", "^FMULX_Z", "^FCVT(ZS|ZU)?_Z",
+ "^FRINT._Z", "^FSCALE_Z", "^FTMAD_Z", "^FTSMUL_Z",
+ "^MAD_Z", "^MLA_Z", "^MLS_Z", "^MSB_Z", "^MUL_ZP",
+ "^[SU]CVTF_Z", "^[SU]DOT_ZZZ_", "^[SU]MULH_Z")>;
+
+def : InstRW<[A64FXWrite_3Cyc_GI1],
+ (instregex "^ANDS?_P", "^BICS?_P", "^BRK.*_P", "^EORS?_P", "^ORRS?_P",
+ "^NANDS?_P", "^NORS?_P", "^ORNS?_P", "^PFALSE", "^PNEXT",
+ "^PFIRST", "^PTEST", "^PTRUES?", "^PUNPK(HI|LO)",
+ "^RDFFRS?", "^REV_P", "^SEL_P", "^TRN[12]_P")>;
-// [ 8] "and $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs AND_PPzPP)>;
+def : InstRW<[A64FXWrite_1Cyc_GI24],
+ (instregex "^ADD[PV]L", "^CNT[BHWD]_X", "^DEC[BHWD]_X", "^INC[BHWD]_X",
+ "^RDVLI")>;
-// [ 9] "and $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs AND_ZZZ)>;
+def : InstRW<[A64FXWrite_11Cyc_GI5],
+ (instregex "^LDR_[PZ]XI")>;
-// [10] "and $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs AND_ZPmZ_B, AND_ZPmZ_D, AND_ZPmZ_H, AND_ZPmZ_S)>;
+def : InstRW<[A64FXWrite_11Cyc_GI56],
+ (instregex "^LD(NF|FF|NT)?1R?S?[BHSWDQ]")>;
-// [11] "and $Zdn, $_Zdn, $imms13";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs AND_ZI)>;
+def A64FXWrite_None : SchedWriteRes<[]> {
+}
+def : InstRW<[A64FXWrite_None], (instregex "^SETFFR", "^MOVPRFX")>;
-// [12] "ands $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs ANDS_PPzPP)>;
+def A64FXWrite_FMAIndexed : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 15;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2];
+}
+def : InstRW<[A64FXWrite_FMAIndexed], (instregex "^F(MLA|MLS|MUL)_ZZZI")>;
-// [13] "andv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs ANDV_VPZ_B, ANDV_VPZ_D, ANDV_VPZ_H, ANDV_VPZ_S)>;
+def A64FXWrite_ADR_LSL_Z : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 5;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2];
+}
+def : InstRW<[A64FXWrite_ADR_LSL_Z], (instregex "^ADR_LSL_Z")>;
-// [14] "asr $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ASR_WIDE_ZZZ_B, ASR_WIDE_ZZZ_H, ASR_WIDE_ZZZ_S)>;
+def A64FXWrite_ASRD : SchedWriteRes<[A64FXGI0, A64FXGI01]> {
+ let Latency = 8;
+ let NumMicroOps = 2;
+}
+def : InstRW<[A64FXWrite_ASRD], (instregex "^ASRD_Z")>;
-// [15] "asr $Zd, $Zn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ASR_ZZI_B, ASR_ZZI_D, ASR_ZZI_H, ASR_ZZI_S)>;
+def A64FXWrite_Reduction4CycB : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 46;
+ let NumMicroOps = 10;
+ let ResourceCycles = [10];
+}
+def : InstRW<[A64FXWrite_Reduction4CycB],
+ (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_B")>;
-// [16] "asr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ASR_WIDE_ZPmZ_B, ASR_WIDE_ZPmZ_H, ASR_WIDE_ZPmZ_S, ASR_ZPmZ_B, ASR_ZPmZ_D, ASR_ZPmZ_H, ASR_ZPmZ_S)>;
+def A64FXWrite_Reduction4CycH : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 42;
+ let NumMicroOps = 9;
+ let ResourceCycles = [9];
+}
+def : InstRW<[A64FXWrite_Reduction4CycH],
+ (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_H")>;
-// [17] "asr $Zdn, $Pg/m, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ASR_ZPmI_B, ASR_ZPmI_D, ASR_ZPmI_H, ASR_ZPmI_S)>;
+def A64FXWrite_Reduction4CycS : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 38;
+ let NumMicroOps = 8;
+ let ResourceCycles = [8];
+}
+def : InstRW<[A64FXWrite_Reduction4CycS],
+ (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_S")>;
-// [18] "asrd $Zdn, $Pg/m, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ASRD_ZPmI_B, ASRD_ZPmI_D, ASRD_ZPmI_H, ASRD_ZPmI_S)>;
+def A64FXWrite_Reduction4CycD : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 34;
+ let NumMicroOps = 7;
+ let ResourceCycles = [7];
+}
+def : InstRW<[A64FXWrite_Reduction4CycD],
+ (instregex "^(AND|EOR|OR|SADD|SMAX|SMIN|UADD|UMAX|UMIN)V_VPZ_D")>;
-// [19] "asrr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ASRR_ZPmZ_B, ASRR_ZPmZ_D, ASRR_ZPmZ_H, ASRR_ZPmZ_S)>;
+def A64FXWrite_CLAST_R : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 29;
+}
+def : InstRW<[A64FXWrite_CLAST_R], (instregex "^CLAST[AB]_R")>;
-// [20] "bic $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BIC_PPzPP)>;
+def A64FXWrite_CMP : SchedWriteRes<[A64FXGI0, A64FXGI1]> {
+ let Latency = 4;
+}
+def : InstRW<[A64FXWrite_CMP], (instregex "^CMP.*_P")>;
-// [21] "bic $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs BIC_ZZZ)>;
+def A64FXWrite_CNTP : SchedWriteRes<[A64FXGI1, A64FXGI2]> {
+ let Latency = 6;
+}
+def : InstRW<[A64FXWrite_CNTP], (instregex "^CNTP_X")>;
-// [22] "bic $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs BIC_ZPmZ_B, BIC_ZPmZ_D, BIC_ZPmZ_H, BIC_ZPmZ_S)>;
+def A64FXWrite_CPYScalar : SchedWriteRes<[A64FXGI0, A64FXGI2]> {
+ let Latency = 8;
+}
+def : InstRW<[A64FXWrite_CPYScalar], (instregex "^CPY_ZPmR")>;
-// [23] "bics $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BICS_PPzPP)>;
+def A64FXWrite_CTERM : SchedWriteRes<[A64FXGI24]> {
+ let Latency = 2;
+ let ResourceCycles = [2];
+}
+def : InstRW<[A64FXWrite_CTERM], (instregex "^CTERM")>;
-// [24] "brka $Pd, $Pg/m, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKA_PPmP)>;
+def A64FXWrite_INCPScalar : SchedWriteRes<[A64FXGI1, A64FXGI2, A64FXGI4]> {
+ let Latency = 7;
+ let NumMicroOps = 2;
+}
+def : InstRW<[A64FXWrite_INCPScalar], (instregex "^DECP_X", "^INCP_X")>;
-// [25] "brka $Pd, $Pg/z, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKA_PPzP)>;
+def A64FXWrite_INCPVector : SchedWriteRes<[A64FXGI0, A64FXGI1]> {
+ let Latency = 12;
+}
+def : InstRW<[A64FXWrite_INCPVector], (instregex "^DECP_Z", "^INCP_Z")>;
-// [26] "brkas $Pd, $Pg/z, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKAS_PPzP)>;
+def A64FXWrite_FADDVH : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 75;
+ let NumMicroOps = 11;
+ let ResourceCycles = [11];
+}
+def : InstRW<[A64FXWrite_FADDVH], (instrs FADDV_VPZ_H)>;
-// [27] "brkb $Pd, $Pg/m, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKB_PPmP)>;
+def A64FXWrite_FADDVS : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 60;
+ let NumMicroOps = 9;
+ let ResourceCycles = [9];
+}
+def : InstRW<[A64FXWrite_FADDVS], (instrs FADDV_VPZ_S)>;
-// [28] "brkb $Pd, $Pg/z, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKB_PPzP)>;
+def A64FXWrite_FADDVD : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 45;
+ let NumMicroOps = 7;
+ let ResourceCycles = [7];
+}
+def : InstRW<[A64FXWrite_FADDVD], (instrs FADDV_VPZ_D)>;
-// [29] "brkbs $Pd, $Pg/z, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKBS_PPzP)>;
+def A64FXWrite_FADDAH : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 468;
+ let NumMicroOps = 63;
+ let ResourceCycles = [63];
+}
+def : InstRW<[A64FXWrite_FADDAH], (instrs FADDA_VPZ_H)>;
-// [30] "brkn $Pdm, $Pg/z, $Pn, $_Pdm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKN_PPzP)>;
+def A64FXWrite_FADDAS : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 228;
+ let NumMicroOps = 31;
+ let ResourceCycles = [31];
+}
+def : InstRW<[A64FXWrite_FADDAS], (instrs FADDA_VPZ_S)>;
-// [31] "brkns $Pdm, $Pg/z, $Pn, $_Pdm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKNS_PPzP)>;
+def A64FXWrite_FADDAD : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 108;
+ let NumMicroOps = 15;
+ let ResourceCycles = [15];
+}
+def : InstRW<[A64FXWrite_FADDAD], (instrs FADDA_VPZ_D)>;
-// [32] "brkpa $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKPA_PPzPP)>;
+def A64FXWrite_FCADDZ : SchedWriteRes<[A64FXGI0, A64FXGI3]> {
+ let Latency = 15;
+ let NumMicroOps = 2;
+}
+def : InstRW<[A64FXWrite_FCADDZ], (instregex "^FCADD_Z")>;
-// [33] "brkpas $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKPAS_PPzPP)>;
+def A64FXWrite_FCMLAZ : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 15;
+ let NumMicroOps = 3;
+ let ResourceCycles = [3];
+}
+def : InstRW<[A64FXWrite_FCMLAZ], (instregex "^FCMLA_Z")>;
-// [34] "brkpb $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKPB_PPzPP)>;
+def A64FXWrite_FDIVH : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 134;
+ let ResourceCycles = [134];
+}
+def : InstRW<[A64FXWrite_FDIVH], (instregex "^F(DIVR?|SQRT)_Z.*_H")>;
-// [35] "brkpbs $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs BRKPBS_PPzPP)>;
+def A64FXWrite_FDIVS : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 98;
+ let ResourceCycles = [98];
+}
+def : InstRW<[A64FXWrite_FDIVS], (instregex "^F(DIVR?|SQRT)_Z.*_S")>;
-// [36] "clasta $Rdn, $Pg, $_Rdn, $Zm";
-def : InstRW<[A64FXWrite_29Cyc_GI0256], (instrs CLASTA_RPZ_B, CLASTA_RPZ_D, CLASTA_RPZ_H, CLASTA_RPZ_S)>;
+def A64FXWrite_FDIVD : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 154;
+ let ResourceCycles = [154];
+}
+def : InstRW<[A64FXWrite_FDIVD], (instregex "^F(DIVR?|SQRT)_Z.*_D")>;
-// [37] "clasta $Vdn, $Pg, $_Vdn, $Zm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CLASTA_VPZ_B, CLASTA_VPZ_D, CLASTA_VPZ_H, CLASTA_VPZ_S)>;
+def A64FXWrite_FMAXVH : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 54;
+ let NumMicroOps = 11;
+ let ResourceCycles = [11];
+}
+def : InstRW<[A64FXWrite_FMAXVH], (instregex "^F(MAX|MIN)(NM)?V_VPZ_H")>;
-// [38] "clasta $Zdn, $Pg, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CLASTA_ZPZ_B, CLASTA_ZPZ_D, CLASTA_ZPZ_H, CLASTA_ZPZ_S)>;
+def A64FXWrite_FMAXVS : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 44;
+ let NumMicroOps = 9;
+ let ResourceCycles = [9];
+}
+def : InstRW<[A64FXWrite_FMAXVS], (instregex "^F(MAX|MIN)(NM)?V_VPZ_S")>;
-// [39] "clastb $Rdn, $Pg, $_Rdn, $Zm";
-def : InstRW<[A64FXWrite_29Cyc_GI0256], (instrs CLASTB_RPZ_B, CLASTB_RPZ_D, CLASTB_RPZ_H, CLASTB_RPZ_S)>;
+def A64FXWrite_FMAXVD : SchedWriteRes<[A64FXGI03]> {
+ let Latency = 34;
+ let NumMicroOps = 7;
+ let ResourceCycles = [7];
+}
+def : InstRW<[A64FXWrite_FMAXVH], (instregex "^F(MAX|MIN)(NM)?V_VPZ_D")>;
-// [40] "clastb $Vdn, $Pg, $_Vdn, $Zm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CLASTB_VPZ_B, CLASTB_VPZ_D, CLASTB_VPZ_H, CLASTB_VPZ_S)>;
+def A64FXWrite_INDEX_RI_BH : SchedWriteRes<[A64FXGI0, A64FXGI2]> {
+ let Latency = 17;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2, 2];
+}
+def : InstRW<[A64FXWrite_INDEX_RI_BH], (instregex "^INDEX_(RI|IR)_[BH]")>;
-// [41] "clastb $Zdn, $Pg, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CLASTB_ZPZ_B, CLASTB_ZPZ_D, CLASTB_ZPZ_H, CLASTB_ZPZ_S)>;
+def A64FXWrite_INDEX_RI_SD : SchedWriteRes<[A64FXGI0, A64FXGI2]> {
+ let Latency = 13;
+ let NumMicroOps = 1;
+}
+def : InstRW<[A64FXWrite_INDEX_RI_SD], (instregex "^INDEX_(RI|IR)_[SD]")>;
-// [42] "cls $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs CLS_ZPmZ_B, CLS_ZPmZ_D, CLS_ZPmZ_H, CLS_ZPmZ_S)>;
-
-// [43] "clz $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs CLZ_ZPmZ_B, CLZ_ZPmZ_D, CLZ_ZPmZ_H, CLZ_ZPmZ_S)>;
-
-// [44] "cmpeq $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPEQ_PPzZZ_B, CMPEQ_PPzZZ_D, CMPEQ_PPzZZ_H, CMPEQ_PPzZZ_S, CMPEQ_WIDE_PPzZZ_B, CMPEQ_WIDE_PPzZZ_H, CMPEQ_WIDE_PPzZZ_S)>;
-
-// [45] "cmpeq $Pd, $Pg/z, $Zn, $imm5";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPEQ_PPzZI_B, CMPEQ_PPzZI_D, CMPEQ_PPzZI_H, CMPEQ_PPzZI_S)>;
-
-// [46] "cmpge $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPGE_PPzZZ_B, CMPGE_PPzZZ_D, CMPGE_PPzZZ_H, CMPGE_PPzZZ_S, CMPGE_WIDE_PPzZZ_B, CMPGE_WIDE_PPzZZ_H, CMPGE_WIDE_PPzZZ_S)>;
-
-// [47] "cmpge $Pd, $Pg/z, $Zn, $imm5";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPGE_PPzZI_B, CMPGE_PPzZI_D, CMPGE_PPzZI_H, CMPGE_PPzZI_S)>;
-
-// [48] "cmpgt $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPGT_PPzZZ_B, CMPGT_PPzZZ_D, CMPGT_PPzZZ_H, CMPGT_PPzZZ_S, CMPGT_WIDE_PPzZZ_B, CMPGT_WIDE_PPzZZ_H, CMPGT_WIDE_PPzZZ_S)>;
-
-// [49] "cmpgt $Pd, $Pg/z, $Zn, $imm5";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPGT_PPzZI_B, CMPGT_PPzZI_D, CMPGT_PPzZI_H, CMPGT_PPzZI_S)>;
-
-// [50] "cmphi $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPHI_PPzZZ_B, CMPHI_PPzZZ_D, CMPHI_PPzZZ_H, CMPHI_PPzZZ_S, CMPHI_WIDE_PPzZZ_B, CMPHI_WIDE_PPzZZ_H, CMPHI_WIDE_PPzZZ_S)>;
-
-// [51] "cmphi $Pd, $Pg/z, $Zn, $imm7";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPHI_PPzZI_B, CMPHI_PPzZI_D, CMPHI_PPzZI_H, CMPHI_PPzZI_S)>;
-
-// [52] "cmphs $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPHS_PPzZZ_B, CMPHS_PPzZZ_D, CMPHS_PPzZZ_H, CMPHS_PPzZZ_S, CMPHS_WIDE_PPzZZ_B, CMPHS_WIDE_PPzZZ_H, CMPHS_WIDE_PPzZZ_S)>;
-
-// [53] "cmphs $Pd, $Pg/z, $Zn, $imm7";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPHS_PPzZI_B, CMPHS_PPzZI_D, CMPHS_PPzZI_H, CMPHS_PPzZI_S)>;
-
-// [54] "cmple $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLE_WIDE_PPzZZ_B, CMPLE_WIDE_PPzZZ_H, CMPLE_WIDE_PPzZZ_S)>;
-
-// [55] "cmple $Pd, $Pg/z, $Zn, $imm5";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLE_PPzZI_B, CMPLE_PPzZI_D, CMPLE_PPzZI_H, CMPLE_PPzZI_S)>;
-
-// [56] "cmplo $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLO_WIDE_PPzZZ_B, CMPLO_WIDE_PPzZZ_H, CMPLO_WIDE_PPzZZ_S)>;
-
-// [57] "cmplo $Pd, $Pg/z, $Zn, $imm7";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLO_PPzZI_B, CMPLO_PPzZI_D, CMPLO_PPzZI_H, CMPLO_PPzZI_S)>;
-
-// [58] "cmpls $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLS_WIDE_PPzZZ_B, CMPLS_WIDE_PPzZZ_H, CMPLS_WIDE_PPzZZ_S)>;
-
-// [59] "cmpls $Pd, $Pg/z, $Zn, $imm7";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLS_PPzZI_B, CMPLS_PPzZI_D, CMPLS_PPzZI_H, CMPLS_PPzZI_S)>;
-
-// [60] "cmplt $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLT_WIDE_PPzZZ_B, CMPLT_WIDE_PPzZZ_H, CMPLT_WIDE_PPzZZ_S)>;
-
-// [61] "cmplt $Pd, $Pg/z, $Zn, $imm5";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPLT_PPzZI_B, CMPLT_PPzZI_D, CMPLT_PPzZI_H, CMPLT_PPzZI_S)>;
-
-// [62] "cmpne $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPNE_PPzZZ_B, CMPNE_PPzZZ_D, CMPNE_PPzZZ_H, CMPNE_PPzZZ_S, CMPNE_WIDE_PPzZZ_B, CMPNE_WIDE_PPzZZ_H, CMPNE_WIDE_PPzZZ_S)>;
-
-// [63] "cmpne $Pd, $Pg/z, $Zn, $imm5";
-def : InstRW<[A64FXWrite_4Cyc_GI01], (instrs CMPNE_PPzZI_B, CMPNE_PPzZI_D, CMPNE_PPzZI_H, CMPNE_PPzZI_S)>;
-
-// [64] "cnot $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs CNOT_ZPmZ_B, CNOT_ZPmZ_D, CNOT_ZPmZ_H, CNOT_ZPmZ_S)>;
-
-// [65] "cnt $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI3], (instrs CNT_ZPmZ_B, CNT_ZPmZ_D, CNT_ZPmZ_H, CNT_ZPmZ_S)>;
-
-// [66] "cntb $Rd, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs CNTB_XPiI)>;
-
-// [67] "cntd $Rd, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs CNTD_XPiI)>;
-
-// [68] "cnth $Rd, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs CNTH_XPiI)>;
-
-// [69] "cntp $Rd, $Pg, $Pn";
-def : InstRW<[A64FXWrite_6Cyc_GI01], (instrs CNTP_XPP_B, CNTP_XPP_D, CNTP_XPP_H, CNTP_XPP_S)>;
-
-// [70] "cntw $Rd, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs CNTW_XPiI)>;
-
-// [71] "compact $Zd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs COMPACT_ZPZ_D, COMPACT_ZPZ_S)>;
-
-// [72] "cpy $Zd, $Pg/m, $Rn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CPY_ZPmR_B, CPY_ZPmR_D, CPY_ZPmR_H, CPY_ZPmR_S)>;
-
-// [73] "cpy $Zd, $Pg/m, $Vn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CPY_ZPmV_B, CPY_ZPmV_D, CPY_ZPmV_H, CPY_ZPmV_S)>;
-
-// [74] "cpy $Zd, $Pg/m, $imm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CPY_ZPmI_B, CPY_ZPmI_D, CPY_ZPmI_H, CPY_ZPmI_S)>;
-
-// [75] "cpy $Zd, $Pg/z, $imm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs CPY_ZPzI_B, CPY_ZPzI_D, CPY_ZPzI_H, CPY_ZPzI_S)>;
-
-// [76] "ctermeq $Rn, $Rm";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs CTERMEQ_WW, CTERMEQ_XX)>;
-
-// [77] "ctermne $Rn, $Rm";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs CTERMNE_WW, CTERMNE_XX)>;
-
-// [78] "decb $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs DECB_XPiI)>;
-
-// [79] "decd $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs DECD_XPiI)>;
-
-// [80] "decd $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs DECD_ZPiI)>;
-
-// [81] "dech $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs DECH_XPiI)>;
-
-// [82] "dech $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs DECH_ZPiI)>;
-
-// [83] "decp $Rdn, $Pg";
-def : InstRW<[A64FXWrite_6Cyc_GI124], (instrs DECP_XP_B, DECP_XP_D, DECP_XP_H, DECP_XP_S)>;
-
-// [84] "decp $Zdn, $Pg";
-def : InstRW<[A64FXWrite_12Cyc_GI01], (instrs DECP_ZP_D, DECP_ZP_H, DECP_ZP_S)>;
-
-// [85] "decw $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs DECW_XPiI)>;
-
-// [86] "decw $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs DECW_ZPiI)>;
-
-// [87] "dup $Zd, $Rn";
-def : InstRW<[A64FXWrite_8Cyc_GI01], (instrs DUP_ZR_B, DUP_ZR_D, DUP_ZR_H, DUP_ZR_S)>;
-
-// [88] "dup $Zd, $Zn$idx";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs DUP_ZZI_B, DUP_ZZI_D, DUP_ZZI_H, DUP_ZZI_Q, DUP_ZZI_S)>;
-
-// [89] "dup $Zd, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs DUP_ZI_B, DUP_ZI_D, DUP_ZI_H, DUP_ZI_S)>;
-
-// [90] "dupm $Zd, $imms";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs DUPM_ZI)>;
-
-// [91] "eor $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs EOR_PPzPP)>;
-
-// [92] "eor $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs EOR_ZZZ)>;
-
-// [93] "eor $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs EOR_ZPmZ_B, EOR_ZPmZ_D, EOR_ZPmZ_H, EOR_ZPmZ_S)>;
-
-// [94] "eor $Zdn, $_Zdn, $imms13";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs EOR_ZI)>;
-
-// [95] "eors $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs EORS_PPzPP)>;
-
-// [96] "eorv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs EORV_VPZ_B, EORV_VPZ_D, EORV_VPZ_H, EORV_VPZ_S)>;
-
-// [97] "ext $Zdn, $_Zdn, $Zm, $imm8";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs EXT_ZZI)>;
-
-// [99] "fabd $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FABD_ZPmZ_D, FABD_ZPmZ_H, FABD_ZPmZ_S)>;
-
-// [100] "fabs $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FABS_ZPmZ_D, FABS_ZPmZ_H, FABS_ZPmZ_S)>;
-
-// [101] "facge $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FACGE_PPzZZ_D, FACGE_PPzZZ_H, FACGE_PPzZZ_S)>;
-
-// [102] "facgt $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FACGT_PPzZZ_D, FACGT_PPzZZ_H, FACGT_PPzZZ_S)>;
-
-// [103] "fadd $Zd, $Zn, $Zm"; def is line 1638
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FADD_ZZZ_D, FADD_ZZZ_H, FADD_ZZZ_S)>;
-
-// [104] "fadd $Zdn, $Pg/m, $_Zdn, $Zm"; def is line 1638
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FADD_ZPmZ_D, FADD_ZPmZ_H, FADD_ZPmZ_S)>;
-
-// [105] "fadd $Zdn, $Pg/m, $_Zdn, $i1"; def is line 1638
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FADD_ZPmI_D, FADD_ZPmI_H, FADD_ZPmI_S)>;
-
-// [106] "fadda $Vdn, $Pg, $_Vdn, $Zm";
-def : InstRW<[A64FXWrite_18Cyc_GI03], (instrs FADDA_VPZ_D, FADDA_VPZ_H, FADDA_VPZ_S)>;
-
-// [107] "faddv $Vd, $Pg, $Zn";
-// H : 4 / 6 / ([1,2]9 / [1]6) x 4 / [1,2]9 = 75 cycle
-// S : 4 / 6 / ([1,2]9 / [1]6) x 3 / [1,2]9 = 60 cycle
-// D : 4 / 6 / ([1,2]9 / [1]6) x 2 / [1,2]9 = 45 cycle
-def : InstRW<[A64FXWrite_75Cyc_GI03], (instrs FADDV_VPZ_H)>;
-def : InstRW<[A64FXWrite_60Cyc_GI03], (instrs FADDV_VPZ_S)>;
-def : InstRW<[A64FXWrite_45Cyc_GI03], (instrs FADDV_VPZ_D)>;
-
-// [108] "fcadd $Zdn, $Pg/m, $_Zdn, $Zm, $imm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FCADD_ZPmZ_D, FCADD_ZPmZ_H, FCADD_ZPmZ_S)>;
-
-// [109] "fcmeq $Pd, $Pg/z, $Zn, #0.0";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMEQ_PPzZ0_D, FCMEQ_PPzZ0_H, FCMEQ_PPzZ0_S)>;
-
-// [110] "fcmeq $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMEQ_PPzZZ_D, FCMEQ_PPzZZ_H, FCMEQ_PPzZZ_S)>;
-
-// [111] "fcmge $Pd, $Pg/z, $Zn, #0.0";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMGE_PPzZ0_D, FCMGE_PPzZ0_H, FCMGE_PPzZ0_S)>;
-
-// [112] "fcmge $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMGE_PPzZZ_D, FCMGE_PPzZZ_H, FCMGE_PPzZZ_S)>;
-
-// [113] "fcmgt $Pd, $Pg/z, $Zn, #0.0";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMGT_PPzZ0_D, FCMGT_PPzZ0_H, FCMGT_PPzZ0_S)>;
-
-// [114] "fcmgt $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMGT_PPzZZ_D, FCMGT_PPzZZ_H, FCMGT_PPzZZ_S)>;
-
-// [115] "fcmla $Zda, $Pg/m, $Zn, $Zm, $imm";
-def : InstRW<[A64FXWrite_15Cyc_GI03], (instrs FCMLA_ZPmZZ_D, FCMLA_ZPmZZ_H, FCMLA_ZPmZZ_S)>;
-
-// [116] "fcmla $Zda, $Zn, $Zm$iop, $imm";
-def : InstRW<[A64FXWrite_15Cyc_GI03], (instrs FCMLA_ZZZI_H, FCMLA_ZZZI_S)>;
-
-// [117] "fcmle $Pd, $Pg/z, $Zn, #0.0";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMLE_PPzZ0_D, FCMLE_PPzZ0_H, FCMLE_PPzZ0_S)>;
-
-// [118] "fcmlt $Pd, $Pg/z, $Zn, #0.0";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMLT_PPzZ0_D, FCMLT_PPzZ0_H, FCMLT_PPzZ0_S)>;
-
-// [119] "fcmne $Pd, $Pg/z, $Zn, #0.0";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMNE_PPzZ0_D, FCMNE_PPzZ0_H, FCMNE_PPzZ0_S)>;
-
-// [120] "fcmne $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMNE_PPzZZ_D, FCMNE_PPzZZ_H, FCMNE_PPzZZ_S)>;
-
-// [121] "fcmuo $Pd, $Pg/z, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCMUO_PPzZZ_D, FCMUO_PPzZZ_H, FCMUO_PPzZZ_S)>;
-
-// [122] "fcpy $Zd, $Pg/m, $imm8";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FCPY_ZPmI_D, FCPY_ZPmI_H, FCPY_ZPmI_S)>;
-
-// [123] "fcvt $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FCVT_ZPmZ_DtoH, FCVT_ZPmZ_DtoS, FCVT_ZPmZ_HtoD, FCVT_ZPmZ_HtoS, FCVT_ZPmZ_StoD, FCVT_ZPmZ_StoH)>;
-
-// [124] "fcvtzs $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FCVTZS_ZPmZ_DtoD, FCVTZS_ZPmZ_DtoS, FCVTZS_ZPmZ_HtoD, FCVTZS_ZPmZ_HtoH, FCVTZS_ZPmZ_HtoS, FCVTZS_ZPmZ_StoD, FCVTZS_ZPmZ_StoS)>;
-
-// [125] "fcvtzu $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FCVTZU_ZPmZ_DtoD, FCVTZU_ZPmZ_DtoS, FCVTZU_ZPmZ_HtoD, FCVTZU_ZPmZ_HtoH, FCVTZU_ZPmZ_HtoS, FCVTZU_ZPmZ_StoD, FCVTZU_ZPmZ_StoS)>;
-
-// [126] "fdiv $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_154Cyc_GI0], (instrs FDIV_ZPmZ_D)>;
-def : InstRW<[A64FXWrite_134Cyc_GI0], (instrs FDIV_ZPmZ_H)>;
-def : InstRW<[A64FXWrite_98Cyc_GI0], (instrs FDIV_ZPmZ_S)>;
-
-// [127] "fdivr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_154Cyc_GI0], (instrs FDIVR_ZPmZ_D)>;
-def : InstRW<[A64FXWrite_134Cyc_GI0], (instrs FDIVR_ZPmZ_H)>;
-def : InstRW<[A64FXWrite_98Cyc_GI0], (instrs FDIVR_ZPmZ_S)>;
-
-// [128] "fdup $Zd, $imm8";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FDUP_ZI_D, FDUP_ZI_H, FDUP_ZI_S)>;
-
-// [129] "fexpa $Zd, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FEXPA_ZZ_D, FEXPA_ZZ_H, FEXPA_ZZ_S)>;
-
-// [130] "fmad $Zdn, $Pg/m, $Zm, $Za";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FMAD_ZPmZZ_D, FMAD_ZPmZZ_H, FMAD_ZPmZZ_S)>;
-
-// [131] "fmax $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FMAX_ZPmZ_D, FMAX_ZPmZ_H, FMAX_ZPmZ_S)>;
-
-// [132] "fmax $Zdn, $Pg/m, $_Zdn, $i1";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FMAX_ZPmI_D, FMAX_ZPmI_H, FMAX_ZPmI_S)>;
-
-// [133] "fmaxnm $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FMAXNM_ZPmZ_D, FMAXNM_ZPmZ_H, FMAXNM_ZPmZ_S)>;
-
-// [134] "fmaxnm $Zdn, $Pg/m, $_Zdn, $i1";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FMAXNM_ZPmI_D, FMAXNM_ZPmI_H, FMAXNM_ZPmI_S)>;
-
-// [135] "fmaxnmv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_10Cyc_GI03], (instrs FMAXNMV_VPZ_D, FMAXNMV_VPZ_H, FMAXNMV_VPZ_S)>;
-
-// [136] "fmaxv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_10Cyc_GI03], (instrs FMAXV_VPZ_D, FMAXV_VPZ_H, FMAXV_VPZ_S)>;
-
-// [137] "fmin $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FMIN_ZPmZ_D, FMIN_ZPmZ_H, FMIN_ZPmZ_S)>;
-
-// [138] "fmin $Zdn, $Pg/m, $_Zdn, $i1";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FMIN_ZPmI_D, FMIN_ZPmI_H, FMIN_ZPmI_S)>;
-
-// [139] "fminnm $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FMINNM_ZPmZ_D, FMINNM_ZPmZ_H, FMINNM_ZPmZ_S)>;
-
-// [140] "fminnm $Zdn, $Pg/m, $_Zdn, $i1";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs FMINNM_ZPmI_D, FMINNM_ZPmI_H, FMINNM_ZPmI_S)>;
-
-// [141] "fminnmv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_10Cyc_GI03], (instrs FMINNMV_VPZ_D, FMINNMV_VPZ_H, FMINNMV_VPZ_S)>;
-
-// [142] "fminv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_10Cyc_GI03], (instrs FMINV_VPZ_D, FMINV_VPZ_H, FMINV_VPZ_S)>;
-
-// [143] "fmla $Zda, $Pg/m, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FMLA_ZPmZZ_D, FMLA_ZPmZZ_H, FMLA_ZPmZZ_S)>;
-
-// [144] "fmla $Zda, $Zn, $Zm$iop";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FMLA_ZZZI_D, FMLA_ZZZI_H, FMLA_ZZZI_S)>;
-
-// [145] "fmls $Zda, $Pg/m, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FMLS_ZPmZZ_D, FMLS_ZPmZZ_H, FMLS_ZPmZZ_S)>;
-
-// [146] "fmls $Zda, $Zn, $Zm$iop";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FMLS_ZZZI_D, FMLS_ZZZI_H, FMLS_ZZZI_S)>;
-
-// [147] "fmsb $Zdn, $Pg/m, $Zm, $Za";
-
-// [148] "fmul $Zd, $Zn, $Zm";
-
-// [149] "fmul $Zd, $Zn, $Zm$iop";
-
-// [150] "fmul $Zdn, $Pg/m, $_Zdn, $Zm";
-
-// [151] "fmul $Zdn, $Pg/m, $_Zdn, $i1";
-
-// [152] "fmulx $Zdn, $Pg/m, $_Zdn, $Zm";
-
-// [153] "fneg $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FNEG_ZPmZ_D, FNEG_ZPmZ_H, FNEG_ZPmZ_S)>;
-
-// [154] "fnmad $Zdn, $Pg/m, $Zm, $Za";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FNMAD_ZPmZZ_D, FNMAD_ZPmZZ_H, FNMAD_ZPmZZ_S)>;
-
-// [155] "fnmla $Zda, $Pg/m, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FNMLA_ZPmZZ_D, FNMLA_ZPmZZ_H, FNMLA_ZPmZZ_S)>;
-
-// [156] "fnmls $Zda, $Pg/m, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FNMLS_ZPmZZ_D, FNMLS_ZPmZZ_H, FNMLS_ZPmZZ_S)>;
-
-// [157] "fnmsb $Zdn, $Pg/m, $Zm, $Za";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FNMSB_ZPmZZ_D, FNMSB_ZPmZZ_H, FNMSB_ZPmZZ_S)>;
-
-// [158] "frecpe $Zd, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FRECPE_ZZ_D, FRECPE_ZZ_H, FRECPE_ZZ_S)>;
-
-// [159] "frecps $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRECPS_ZZZ_D, FRECPS_ZZZ_H, FRECPS_ZZZ_S)>;
-
-// [160] "frecpx $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FRECPX_ZPmZ_D, FRECPX_ZPmZ_H, FRECPX_ZPmZ_S)>;
-
-// [161] "frinta $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTA_ZPmZ_D, FRINTA_ZPmZ_H, FRINTA_ZPmZ_S)>;
-
-// [162] "frinti $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTI_ZPmZ_D, FRINTI_ZPmZ_H, FRINTI_ZPmZ_S)>;
-
-// [163] "frintm $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTM_ZPmZ_D, FRINTM_ZPmZ_H, FRINTM_ZPmZ_S)>;
-
-// [164] "frintn $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTN_ZPmZ_D, FRINTN_ZPmZ_H, FRINTN_ZPmZ_S)>;
-
-// [165] "frintp $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTP_ZPmZ_D, FRINTP_ZPmZ_H, FRINTP_ZPmZ_S)>;
-
-// [166] "frintx $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTX_ZPmZ_D, FRINTX_ZPmZ_H, FRINTX_ZPmZ_S)>;
-
-// [167] "frintz $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRINTZ_ZPmZ_D, FRINTZ_ZPmZ_H, FRINTZ_ZPmZ_S)>;
-
-// [168] "frsqrte $Zd, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FRSQRTE_ZZ_D, FRSQRTE_ZZ_H, FRSQRTE_ZZ_S)>;
-
-// [169] "frsqrts $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs FRSQRTS_ZZZ_D, FRSQRTS_ZZZ_H, FRSQRTS_ZZZ_S)>;
-
-// [170] "fscale $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FSCALE_ZPmZ_D, FSCALE_ZPmZ_H, FSCALE_ZPmZ_S)>;
-
-// [171] "fsqrt $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_154Cyc_GI0], (instrs FSQRT_ZPmZ_D)>;
-def : InstRW<[A64FXWrite_134Cyc_GI0], (instrs FSQRT_ZPmZ_H)>;
-def : InstRW<[A64FXWrite_98Cyc_GI0], (instrs FSQRT_ZPmZ_S)>;
-
-// [172] "fsub $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FSUB_ZZZ_D, FSUB_ZZZ_H, FSUB_ZZZ_S)>;
-
-// [173] "fsub $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FSUB_ZPmZ_D, FSUB_ZPmZ_H, FSUB_ZPmZ_S)>;
-
-// [174] "fsub $Zdn, $Pg/m, $_Zdn, $i1";
-def : InstRW<[A64FXWrite_9Cyc_GI0], (instrs FSUB_ZPmI_D, FSUB_ZPmI_H, FSUB_ZPmI_S)>;
-
-// [175] "fsubr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FSUBR_ZPmZ_D, FSUBR_ZPmZ_H, FSUBR_ZPmZ_S)>;
-
-// [176] "fsubr $Zdn, $Pg/m, $_Zdn, $i1";
-def : InstRW<[A64FXWrite_9Cyc_GI0], (instrs FSUBR_ZPmI_D, FSUBR_ZPmI_H, FSUBR_ZPmI_S)>;
-
-// [177] "ftmad $Zdn, $_Zdn, $Zm, $imm3";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FTMAD_ZZI_D, FTMAD_ZZI_H, FTMAD_ZZI_S)>;
-
-// [178] "ftsmul $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs FTSMUL_ZZZ_D, FTSMUL_ZZZ_H, FTSMUL_ZZZ_S)>;
-
-// [180] "incb $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs INCB_XPiI)>;
-
-// [181] "incd $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs INCD_XPiI)>;
-
-// [182] "incd $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs INCD_ZPiI)>;
-
-// [183] "inch $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs INCH_XPiI)>;
-
-// [184] "inch $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs INCH_ZPiI)>;
-
-// [185] "incp $Rdn, $Pg";
-def : InstRW<[A64FXWrite_6Cyc_GI124], (instrs INCP_XP_B, INCP_XP_D, INCP_XP_H, INCP_XP_S)>;
-
-// [186] "incp $Zdn, $Pg";
-def : InstRW<[A64FXWrite_12Cyc_GI01], (instrs INCP_ZP_D, INCP_ZP_H, INCP_ZP_S)>;
-
-// [187] "incw $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs INCW_XPiI)>;
-
-// [188] "incw $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs INCW_ZPiI)>;
-
-// [189] "index $Zd, $Rn, $Rm";
-def : InstRW<[A64FXWrite_17Cyc_GI02], (instrs INDEX_RR_B, INDEX_RR_D, INDEX_RR_H, INDEX_RR_S)>;
-
-// [190] "index $Zd, $Rn, $imm5";
-def : InstRW<[A64FXWrite_21Cyc_GI02], (instrs INDEX_RI_B, INDEX_RI_D, INDEX_RI_H, INDEX_RI_S)>;
-
-// [191] "index $Zd, $imm5, $Rm";
-def : InstRW<[A64FXWrite_21Cyc_GI02], (instrs INDEX_IR_B, INDEX_IR_D, INDEX_IR_H, INDEX_IR_S)>;
-
-// [192] "index $Zd, $imm5, $imm5b";
-def : InstRW<[A64FXWrite_13Cyc_GI0], (instrs INDEX_II_B, INDEX_II_D, INDEX_II_H, INDEX_II_S)>;
-
-// [193] "insr $Zdn, $Rm";
-def : InstRW<[A64FXWrite_10Cyc_GI02], (instrs INSR_ZR_B, INSR_ZR_D, INSR_ZR_H, INSR_ZR_S)>;
-
-// [194] "insr $Zdn, $Vm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs INSR_ZV_B, INSR_ZV_D, INSR_ZV_H, INSR_ZV_S)>;
-
-// [195] "lasta $Rd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_25Cyc_GI056], (instrs LASTA_RPZ_B, LASTA_RPZ_D, LASTA_RPZ_H, LASTA_RPZ_S)>;
-
-// [196] "lasta $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs LASTA_VPZ_B, LASTA_VPZ_D, LASTA_VPZ_H, LASTA_VPZ_S)>;
-
-// [197] "lastb $Rd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_25Cyc_GI056], (instrs LASTB_RPZ_B, LASTB_RPZ_D, LASTB_RPZ_H, LASTB_RPZ_S)>;
-
-// [198] "lastb $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs LASTB_VPZ_B, LASTB_VPZ_D, LASTB_VPZ_H, LASTB_VPZ_S)>;
-
-// [199] "ld1b $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1B, LD1B_D, LD1B_H, LD1B_S)>;
-
-// [200] "ld1b $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1B_D_REAL, GLD1B_D_SXTW_REAL, GLD1B_D_UXTW_REAL, GLD1B_S_SXTW_REAL, GLD1B_S_UXTW_REAL)>;
-
-// [201] "ld1b $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1B_D_IMM_REAL, LD1B_H_IMM_REAL, LD1B_IMM_REAL, LD1B_S_IMM_REAL)>;
-
-// [202] "ld1b $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1B_D_IMM_REAL, GLD1B_S_IMM_REAL)>;
-
-// [203] "ld1d $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1D)>;
-
-// [204] "ld1d $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1D_REAL, GLD1D_SCALED_REAL, GLD1D_SXTW_REAL, GLD1D_SXTW_SCALED_REAL, GLD1D_UXTW_REAL, GLD1D_UXTW_SCALED_REAL)>;
-
-// [205] "ld1d $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1D_IMM_REAL)>;
-
-// [206] "ld1d $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1D_IMM_REAL)>;
-
-// [207] "ld1h $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1H, LD1H_D, LD1H_S)>;
-
-// [208] "ld1h $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1H_D_REAL, GLD1H_D_SCALED_REAL, GLD1H_D_SXTW_REAL, GLD1H_D_SXTW_SCALED_REAL, GLD1H_D_UXTW_REAL, GLD1H_D_UXTW_SCALED_REAL, GLD1H_S_SXTW_REAL, GLD1H_S_SXTW_SCALED_REAL, GLD1H_S_UXTW_REAL, GLD1H_S_UXTW_SCALED_REAL)>;
-
-// [209] "ld1h $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1H_D_IMM_REAL, LD1H_IMM_REAL, LD1H_S_IMM_REAL)>;
-
-// [210] "ld1h $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1H_D_IMM_REAL, GLD1H_S_IMM_REAL)>;
-
-// [211] "ld1rb $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RB_D_IMM, LD1RB_H_IMM, LD1RB_IMM, LD1RB_S_IMM)>;
-
-// [212] "ld1rd $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RD_IMM)>;
-
-// [213] "ld1rh $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RH_D_IMM, LD1RH_IMM, LD1RH_S_IMM)>;
-
-// [214] "ld1rqb $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_B)>;
-
-// [215] "ld1rqb $Zt, $Pg/z, [$Rn, $imm4]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_B_IMM)>;
-
-// [216] "ld1rqd $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_D)>;
-
-// [217] "ld1rqd $Zt, $Pg/z, [$Rn, $imm4]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_D_IMM)>;
-
-// [218] "ld1rqh $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_H)>;
-
-// [219] "ld1rqh $Zt, $Pg/z, [$Rn, $imm4]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_H_IMM)>;
-
-// [220] "ld1rqw $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_W)>;
-
-// [221] "ld1rqw $Zt, $Pg/z, [$Rn, $imm4]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RQ_W_IMM)>;
-
-// [222] "ld1rsb $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RSB_D_IMM, LD1RSB_H_IMM, LD1RSB_S_IMM)>;
-
-// [223] "ld1rsh $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RSH_D_IMM, LD1RSH_S_IMM)>;
-
-// [224] "ld1rsw $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RSW_IMM)>;
-
-// [225] "ld1rw $Zt, $Pg/z, [$Rn, $imm6]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1RW_D_IMM, LD1RW_IMM)>;
-
-// [226] "ld1sb $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1SB_D, LD1SB_H, LD1SB_S)>;
-
-// [227] "ld1sb $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1SB_D_REAL, GLD1SB_D_SXTW_REAL, GLD1SB_D_UXTW_REAL, GLD1SB_S_SXTW_REAL, GLD1SB_S_UXTW_REAL)>;
-
-// [228] "ld1sb $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1SB_D_IMM_REAL, LD1SB_H_IMM_REAL, LD1SB_S_IMM_REAL)>;
-
-// [229] "ld1sb $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1SB_D_IMM_REAL, GLD1SB_S_IMM_REAL)>;
-
-// [230] "ld1sh $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1SH_D, LD1SH_S)>;
-
-// [231] "ld1sh $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1SH_D_REAL, GLD1SH_D_SCALED_REAL, GLD1SH_D_SXTW_REAL, GLD1SH_D_SXTW_SCALED_REAL, GLD1SH_D_UXTW_REAL, GLD1SH_D_UXTW_SCALED_REAL, GLD1SH_S_SXTW_REAL, GLD1SH_S_SXTW_SCALED_REAL, GLD1SH_S_UXTW_REAL, GLD1SH_S_UXTW_SCALED_REAL)>;
-
-// [232] "ld1sh $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1SH_D_IMM_REAL, LD1SH_S_IMM_REAL)>;
-
-// [233] "ld1sh $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1SH_D_IMM_REAL, GLD1SH_S_IMM_REAL)>;
-
-// [234] "ld1sw $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1SW_D)>;
-
-// [235] "ld1sw $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1SW_D_REAL, GLD1SW_D_SCALED_REAL, GLD1SW_D_SXTW_REAL, GLD1SW_D_SXTW_SCALED_REAL, GLD1SW_D_UXTW_REAL, GLD1SW_D_UXTW_SCALED_REAL)>;
-
-// [236] "ld1sw $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1SW_D_IMM_REAL)>;
-
-// [237] "ld1sw $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1SW_D_IMM_REAL)>;
-
-// [238] "ld1w $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1W, LD1W_D)>;
-
-// [239] "ld1w $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLD1W_D_REAL, GLD1W_D_SCALED_REAL, GLD1W_D_SXTW_REAL, GLD1W_D_SXTW_SCALED_REAL, GLD1W_D_UXTW_REAL, GLD1W_D_UXTW_SCALED_REAL, GLD1W_SXTW_REAL, GLD1W_SXTW_SCALED_REAL, GLD1W_UXTW_REAL, GLD1W_UXTW_SCALED_REAL)>;
-
-// [240] "ld1w $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD1W_D_IMM_REAL, LD1W_IMM_REAL)>;
-
-// [241] "ld1w $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLD1W_D_IMM_REAL, GLD1W_IMM_REAL)>;
-
-// [242] "ld2b $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD2B)>;
-
-// [243] "ld2b $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD2B_IMM)>;
-
-// [244] "ld2d $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD2D)>;
-
-// [245] "ld2d $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD2D_IMM)>;
-
-// [246] "ld2h $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD2H)>;
-
-// [247] "ld2h $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD2H_IMM)>;
-
-// [248] "ld2w $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD2W)>;
-
-// [249] "ld2w $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD2W_IMM)>;
-
-// [250] "ld3b $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD3B)>;
-
-// [251] "ld3b $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD3B_IMM)>;
-
-// [252] "ld3d $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD3D)>;
-
-// [253] "ld3d $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD3D_IMM)>;
-
-// [254] "ld3h $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD3H)>;
-
-// [255] "ld3h $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD3H_IMM)>;
-
-// [256] "ld3w $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD3W)>;
-
-// [257] "ld3w $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD3W_IMM)>;
-
-// [258] "ld4b $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD4B)>;
-
-// [259] "ld4b $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_44Cyc_GI56], (instrs LD4B_IMM)>;
-
-// [260] "ld4d $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD4D)>;
-
-// [261] "ld4d $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD4D_IMM)>;
-
-// [262] "ld4h $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD4H)>;
-
-// [263] "ld4h $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD4H_IMM)>;
-
-// [264] "ld4w $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD4W)>;
-
-// [265] "ld4w $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LD4W_IMM)>;
-
-// [266] "ldff1b $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1B_D_REAL, LDFF1B_H_REAL, LDFF1B_REAL, LDFF1B_S_REAL)>;
-
-// [267] "ldff1b $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1B_D_REAL, GLDFF1B_D_SXTW_REAL, GLDFF1B_D_UXTW_REAL, GLDFF1B_S_SXTW_REAL, GLDFF1B_S_UXTW_REAL)>;
-
-// [268] "ldff1b $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1B_D_IMM_REAL, GLDFF1B_S_IMM_REAL)>;
-
-// [269] "ldff1d $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1D_REAL)>;
-
-// [270] "ldff1d $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1D_REAL, GLDFF1D_SCALED_REAL, GLDFF1D_SXTW_REAL, GLDFF1D_SXTW_SCALED_REAL, GLDFF1D_UXTW_REAL, GLDFF1D_UXTW_SCALED_REAL)>;
-
-// [271] "ldff1d $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1D_IMM_REAL)>;
-
-// [272] "ldff1h $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1H_D_REAL, LDFF1H_REAL, LDFF1H_S_REAL)>;
-
-// [273] "ldff1h $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1H_D_REAL, GLDFF1H_D_SCALED_REAL, GLDFF1H_D_SXTW_REAL, GLDFF1H_D_SXTW_SCALED_REAL, GLDFF1H_D_UXTW_REAL, GLDFF1H_D_UXTW_SCALED_REAL, GLDFF1H_S_SXTW_REAL, GLDFF1H_S_SXTW_SCALED_REAL, GLDFF1H_S_UXTW_REAL, GLDFF1H_S_UXTW_SCALED_REAL)>;
-
-// [274] "ldff1h $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1H_D_IMM_REAL, GLDFF1H_S_IMM_REAL)>;
-
-// [275] "ldff1sb $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1SB_D_REAL, LDFF1SB_H_REAL, LDFF1SB_S_REAL)>;
-
-// [276] "ldff1sb $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1SB_D_REAL, GLDFF1SB_D_SXTW_REAL, GLDFF1SB_D_UXTW_REAL, GLDFF1SB_S_SXTW_REAL, GLDFF1SB_S_UXTW_REAL)>;
-
-// [277] "ldff1sb $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1SB_D_IMM_REAL, GLDFF1SB_S_IMM_REAL)>;
-
-// [278] "ldff1sh $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1SH_D_REAL, LDFF1SH_S_REAL)>;
-
-// [279] "ldff1sh $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1SH_D_REAL, GLDFF1SH_D_SCALED_REAL, GLDFF1SH_D_SXTW_REAL, GLDFF1SH_D_SXTW_SCALED_REAL, GLDFF1SH_D_UXTW_REAL, GLDFF1SH_D_UXTW_SCALED_REAL, GLDFF1SH_S_SXTW_REAL, GLDFF1SH_S_SXTW_SCALED_REAL, GLDFF1SH_S_UXTW_REAL, GLDFF1SH_S_UXTW_SCALED_REAL)>;
-
-// [280] "ldff1sh $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1SH_D_IMM_REAL, GLDFF1SH_S_IMM_REAL)>;
-
-// [281] "ldff1sw $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1SW_D_REAL)>;
-
-// [282] "ldff1sw $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1SW_D_REAL, GLDFF1SW_D_SCALED_REAL, GLDFF1SW_D_SXTW_REAL, GLDFF1SW_D_SXTW_SCALED_REAL, GLDFF1SW_D_UXTW_REAL, GLDFF1SW_D_UXTW_SCALED_REAL)>;
-
-// [283] "ldff1sw $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1SW_D_IMM_REAL)>;
-
-// [284] "ldff1w $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDFF1W_D_REAL, LDFF1W_REAL)>;
-
-// [285] "ldff1w $Zt, $Pg/z, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_19Cyc_GI0256], (instrs GLDFF1W_D_REAL, GLDFF1W_D_SCALED_REAL, GLDFF1W_D_SXTW_REAL, GLDFF1W_D_SXTW_SCALED_REAL, GLDFF1W_D_UXTW_REAL, GLDFF1W_D_UXTW_SCALED_REAL, GLDFF1W_SXTW_REAL, GLDFF1W_SXTW_SCALED_REAL, GLDFF1W_UXTW_REAL, GLDFF1W_UXTW_SCALED_REAL)>;
-
-// [286] "ldff1w $Zt, $Pg/z, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_15Cyc_GI056], (instrs GLDFF1W_D_IMM_REAL, GLDFF1W_IMM_REAL)>;
-
-// [287] "ldnf1b $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1B_D_IMM_REAL, LDNF1B_H_IMM_REAL, LDNF1B_IMM_REAL, LDNF1B_S_IMM_REAL)>;
-
-// [288] "ldnf1d $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1D_IMM_REAL)>;
-
-// [289] "ldnf1h $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1H_D_IMM_REAL, LDNF1H_IMM_REAL, LDNF1H_S_IMM_REAL)>;
-
-// [290] "ldnf1sb $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1SB_D_IMM_REAL, LDNF1SB_H_IMM_REAL, LDNF1SB_S_IMM_REAL)>;
-
-// [291] "ldnf1sh $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1SH_D_IMM_REAL, LDNF1SH_S_IMM_REAL)>;
-
-// [292] "ldnf1sw $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1SW_D_IMM_REAL)>;
-
-// [293] "ldnf1w $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNF1W_D_IMM_REAL, LDNF1W_IMM_REAL)>;
-
-// [294] "ldnt1b $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1B_ZRR)>;
-
-// [295] "ldnt1b $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1B_ZRI)>;
-
-// [296] "ldnt1d $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1D_ZRR)>;
-
-// [297] "ldnt1d $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1D_ZRI)>;
-
-// [298] "ldnt1h $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1H_ZRR)>;
-
-// [299] "ldnt1h $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1H_ZRI)>;
-
-// [300] "ldnt1w $Zt, $Pg/z, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1W_ZRR)>;
-
-// [301] "ldnt1w $Zt, $Pg/z, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI56], (instrs LDNT1W_ZRI)>;
-
-// [302] "ldr $Pt, [$Rn, $imm9, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI5], (instrs LDR_PXI)>;
-
-// [303] "ldr $Zt, [$Rn, $imm9, mul vl]";
-def : InstRW<[A64FXWrite_11Cyc_GI5], (instrs LDR_ZXI)>;
-
-// [304] "lsl $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSL_WIDE_ZZZ_B, LSL_WIDE_ZZZ_H, LSL_WIDE_ZZZ_S)>;
-
-// [305] "lsl $Zd, $Zn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSL_ZZI_B, LSL_ZZI_D, LSL_ZZI_H, LSL_ZZI_S)>;
-
-// [306] "lsl $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSL_WIDE_ZPmZ_B, LSL_WIDE_ZPmZ_H, LSL_WIDE_ZPmZ_S, LSL_ZPmZ_B, LSL_ZPmZ_D, LSL_ZPmZ_H, LSL_ZPmZ_S)>;
-
-// [307] "lsl $Zdn, $Pg/m, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSL_ZPmI_B, LSL_ZPmI_D, LSL_ZPmI_H, LSL_ZPmI_S)>;
-
-// [308] "lslr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSLR_ZPmZ_B, LSLR_ZPmZ_D, LSLR_ZPmZ_H, LSLR_ZPmZ_S)>;
-
-// [309] "lsr $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSR_WIDE_ZZZ_B, LSR_WIDE_ZZZ_H, LSR_WIDE_ZZZ_S)>;
-
-// [310] "lsr $Zd, $Zn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSR_ZZI_B, LSR_ZZI_D, LSR_ZZI_H, LSR_ZZI_S)>;
-
-// [311] "lsr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSR_WIDE_ZPmZ_B, LSR_WIDE_ZPmZ_H, LSR_WIDE_ZPmZ_S, LSR_ZPmZ_B, LSR_ZPmZ_D, LSR_ZPmZ_H, LSR_ZPmZ_S)>;
-
-// [312] "lsr $Zdn, $Pg/m, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSR_ZPmI_B, LSR_ZPmI_D, LSR_ZPmI_H, LSR_ZPmI_S)>;
-
-// [313] "lsrr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs LSRR_ZPmZ_B, LSRR_ZPmZ_D, LSRR_ZPmZ_H, LSRR_ZPmZ_S)>;
-
-// [314] "mad $Zdn, $Pg/m, $Zm, $Za";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs MAD_ZPmZZ_B, MAD_ZPmZZ_D, MAD_ZPmZZ_H, MAD_ZPmZZ_S)>;
-
-// [315] "mla $Zda, $Pg/m, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs MLA_ZPmZZ_B, MLA_ZPmZZ_D, MLA_ZPmZZ_H, MLA_ZPmZZ_S)>;
-
-// [316] "mls $Zda, $Pg/m, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs MLS_ZPmZZ_B, MLS_ZPmZZ_D, MLS_ZPmZZ_H, MLS_ZPmZZ_S)>;
-
-// [317] "movprfx $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs MOVPRFX_ZPmZ_B, MOVPRFX_ZPmZ_D, MOVPRFX_ZPmZ_H, MOVPRFX_ZPmZ_S)>;
-
-// [318] "movprfx $Zd, $Pg/z, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs MOVPRFX_ZPzZ_B, MOVPRFX_ZPzZ_D, MOVPRFX_ZPzZ_H, MOVPRFX_ZPzZ_S)>;
-
-// [319] "movprfx $Zd, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs MOVPRFX_ZZ)>;
-
-// [320] "msb $Zdn, $Pg/m, $Zm, $Za";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs MSB_ZPmZZ_B, MSB_ZPmZZ_D, MSB_ZPmZZ_H, MSB_ZPmZZ_S)>;
-
-// [321] "mul $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs MUL_ZPmZ_B, MUL_ZPmZ_D, MUL_ZPmZ_H, MUL_ZPmZ_S)>;
-
-// [322] "mul $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_9Cyc_GI0], (instrs MUL_ZI_B, MUL_ZI_D, MUL_ZI_H, MUL_ZI_S)>;
-
-// [323] "nand $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs NAND_PPzPP)>;
-
-// [324] "nands $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs NANDS_PPzPP)>;
-
-// [325] "neg $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs NEG_ZPmZ_B, NEG_ZPmZ_D, NEG_ZPmZ_H, NEG_ZPmZ_S)>;
-
-// [326] "nor $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs NOR_PPzPP)>;
-
-// [327] "nors $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs NORS_PPzPP)>;
-
-// [328] "not $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs NOT_ZPmZ_B, NOT_ZPmZ_D, NOT_ZPmZ_H, NOT_ZPmZ_S)>;
-
-// [329] "orn $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs ORN_PPzPP)>;
-
-// [330] "orns $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs ORNS_PPzPP)>;
-
-// [331] "orr $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs ORR_PPzPP)>;
-
-// [332] "orr $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ORR_ZZZ)>;
-
-// [333] "orr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs ORR_ZPmZ_B, ORR_ZPmZ_D, ORR_ZPmZ_H, ORR_ZPmZ_S)>;
-
-// [334] "orr $Zdn, $_Zdn, $imms13";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs ORR_ZI)>;
-
-// [335] "orrs $Pd, $Pg/z, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs ORRS_PPzPP)>;
-
-// [336] "orv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs ORV_VPZ_B, ORV_VPZ_D, ORV_VPZ_H, ORV_VPZ_S)>;
-
-// [337] "pfalse $Pd";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PFALSE)>;
-
-// [338] "pnext $Pdn, $Pg, $_Pdn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PNEXT_B, PNEXT_D, PNEXT_H, PNEXT_S)>;
-
-// [339] "prfb $prfop, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFB_PRR)>;
-
-// [340] "prfb $prfop, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_14Cyc_GI0256], (instrs PRFB_D_SCALED, PRFB_D_SXTW_SCALED, PRFB_D_UXTW_SCALED, PRFB_S_SXTW_SCALED, PRFB_S_UXTW_SCALED)>;
-
-// [341] "prfb $prfop, $Pg, [$Rn, $imm6, mul vl]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFB_PRI)>;
-
-// [342] "prfb $prfop, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_10Cyc_GI056], (instrs PRFB_D_PZI, PRFB_S_PZI)>;
-
-// [343] "prfd $prfop, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFD_PRR)>;
-
-// [344] "prfd $prfop, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_14Cyc_GI0256], (instrs PRFD_D_SCALED, PRFD_D_SXTW_SCALED, PRFD_D_UXTW_SCALED, PRFD_S_SXTW_SCALED, PRFD_S_UXTW_SCALED)>;
-
-// [345] "prfd $prfop, $Pg, [$Rn, $imm6, mul vl]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFD_PRI)>;
-
-// [346] "prfd $prfop, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_10Cyc_GI056], (instrs PRFD_D_PZI, PRFD_S_PZI)>;
-
-// [347] "prfh $prfop, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFH_PRR)>;
-
-// [348] "prfh $prfop, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_14Cyc_GI0256], (instrs PRFH_D_SCALED, PRFH_D_SXTW_SCALED, PRFH_D_UXTW_SCALED, PRFH_S_SXTW_SCALED, PRFH_S_UXTW_SCALED)>;
-
-// [349] "prfh $prfop, $Pg, [$Rn, $imm6, mul vl]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFH_PRI)>;
-
-// [350] "prfh $prfop, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_10Cyc_GI056], (instrs PRFH_D_PZI, PRFH_S_PZI)>;
-
-// [351] "prfw $prfop, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFW_PRR)>;
-
-// [352] "prfw $prfop, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_14Cyc_GI0256], (instrs PRFW_D_SCALED, PRFW_D_SXTW_SCALED, PRFW_D_UXTW_SCALED, PRFW_S_SXTW_SCALED, PRFW_S_UXTW_SCALED)>;
-
-// [353] "prfw $prfop, $Pg, [$Rn, $imm6, mul vl]";
-def : InstRW<[A64FXWrite_6Cyc_GI56], (instrs PRFW_PRI)>;
-
-// [354] "prfw $prfop, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_10Cyc_GI056], (instrs PRFW_D_PZI, PRFW_S_PZI)>;
-
-// [355] "ptest $Pg, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PTEST_PP)>;
-
-// [356] "ptrue $Pd, $pattern";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PTRUE_B, PTRUE_D, PTRUE_H, PTRUE_S)>;
-
-// [357] "ptrues $Pd, $pattern";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PTRUES_B, PTRUES_D, PTRUES_H, PTRUES_S)>;
-
-// [358] "punpkhi $Pd, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PUNPKHI_PP)>;
-
-// [359] "punpklo $Pd, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs PUNPKLO_PP)>;
-
-// [360] "rbit $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs RBIT_ZPmZ_B, RBIT_ZPmZ_D, RBIT_ZPmZ_H, RBIT_ZPmZ_S)>;
-
-// [361] "rdffr $Pd";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs RDFFR_P)>;
-
-// [362] "rdffr $Pd, $Pg/z";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs RDFFR_PPz)>;
-
-// [363] "rdffrs $Pd, $Pg/z";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs RDFFRS_PPz)>;
-
-// [364] "rdvl $Rd, $imm6";
-def : InstRW<[A64FXWrite_1Cyc_GI24], (instrs RDVLI_XI)>;
-
-// [365] "rev $Pd, $Pn";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs REV_PP_B, REV_PP_D, REV_PP_H, REV_PP_S)>;
-
-// [366] "rev $Zd, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs REV_ZZ_B, REV_ZZ_D, REV_ZZ_H, REV_ZZ_S)>;
-
-// [367] "revb $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs REVB_ZPmZ_D, REVB_ZPmZ_H, REVB_ZPmZ_S)>;
-
-// [368] "revh $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs REVH_ZPmZ_D, REVH_ZPmZ_S)>;
-
-// [369] "revw $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs REVW_ZPmZ_D)>;
-
-// [370] "sabd $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SABD_ZPmZ_B, SABD_ZPmZ_D, SABD_ZPmZ_H, SABD_ZPmZ_S)>;
-
-// [371] "saddv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_12Cyc_GI03], (instrs SADDV_VPZ_B, SADDV_VPZ_H, SADDV_VPZ_S)>;
-
-// [372] "scvtf $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs SCVTF_ZPmZ_DtoD, SCVTF_ZPmZ_DtoH, SCVTF_ZPmZ_DtoS, SCVTF_ZPmZ_HtoH, SCVTF_ZPmZ_StoD, SCVTF_ZPmZ_StoH, SCVTF_ZPmZ_StoS)>;
-
-// [373] "sdiv $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_37Cyc_GI0], (instrs SDIV_ZPmZ_D, SDIV_ZPmZ_S)>;
-
-// [374] "sdivr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_37Cyc_GI0], (instrs SDIVR_ZPmZ_D, SDIVR_ZPmZ_S)>;
-
-// [375] "sdot $Zda, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs SDOT_ZZZ_D, SDOT_ZZZ_S)>;
-
-// [376] "sdot $Zda, $Zn, $Zm$iop";
-def : InstRW<[A64FXWrite_15Cyc_NGI03], (instrs SDOT_ZZZI_D, SDOT_ZZZI_S)>;
-
-// [377] "sel $Pd, $Pg, $Pn, $Pm";
-def : InstRW<[A64FXWrite_3Cyc_GI1], (instrs SEL_PPPP)>;
-
-// [378] "sel $Zd, $Pg, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SEL_ZPZZ_B, SEL_ZPZZ_D, SEL_ZPZZ_H, SEL_ZPZZ_S)>;
-
-// [379] "setffr";
-def : InstRW<[A64FXWrite_6Cyc], (instrs SETFFR)>;
-
-// [380] "smax $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SMAX_ZPmZ_B, SMAX_ZPmZ_D, SMAX_ZPmZ_H, SMAX_ZPmZ_S)>;
-
-// [381] "smax $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs SMAX_ZI_B, SMAX_ZI_D, SMAX_ZI_H, SMAX_ZI_S)>;
-
-// [382] "smaxv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs SMAXV_VPZ_B, SMAXV_VPZ_D, SMAXV_VPZ_H, SMAXV_VPZ_S)>;
-
-// [383] "smin $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SMIN_ZPmZ_B, SMIN_ZPmZ_D, SMIN_ZPmZ_H, SMIN_ZPmZ_S)>;
-
-// [384] "smin $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs SMIN_ZI_B, SMIN_ZI_D, SMIN_ZI_H, SMIN_ZI_S)>;
-
-// [385] "sminv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs SMINV_VPZ_B, SMINV_VPZ_D, SMINV_VPZ_H, SMINV_VPZ_S)>;
-
-// [386] "smulh $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs SMULH_ZPmZ_B, SMULH_ZPmZ_D, SMULH_ZPmZ_H, SMULH_ZPmZ_S)>;
-
-// [387] "splice $Zdn, $Pg, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs SPLICE_ZPZ_B, SPLICE_ZPZ_D, SPLICE_ZPZ_H, SPLICE_ZPZ_S)>;
-
-// [388] "sqadd $Zd, $Zn, $Zm";
-
-// [389] "sqadd $Zdn, $_Zdn, $imm";
-
-// [390] "sqdecb $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECB_XPiWdI)>;
-
-// [391] "sqdecb $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECB_XPiI)>;
-
-// [392] "sqdecd $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECD_XPiWdI)>;
-
-// [393] "sqdecd $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECD_XPiI)>;
-
-// [394] "sqdecd $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SQDECD_ZPiI)>;
-
-// [395] "sqdech $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECH_XPiWdI)>;
-
-// [396] "sqdech $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECH_XPiI)>;
-
-// [397] "sqdech $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SQDECH_ZPiI)>;
-
-// [398] "sqdecp $Rdn, $Pg";
-def : InstRW<[A64FXWrite_8Cyc_GI124], (instrs SQDECP_XP_B, SQDECP_XP_D, SQDECP_XP_H, SQDECP_XP_S)>;
-
-// [399] "sqdecp $Rdn, $Pg, $_Rdn";
-def : InstRW<[A64FXWrite_8Cyc_GI124], (instrs SQDECP_XPWd_B, SQDECP_XPWd_D, SQDECP_XPWd_H, SQDECP_XPWd_S)>;
-
-// [400] "sqdecp $Zdn, $Pg";
-def : InstRW<[A64FXWrite_12Cyc_GI01], (instrs SQDECP_ZP_D, SQDECP_ZP_H, SQDECP_ZP_S)>;
-
-// [401] "sqdecw $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECW_XPiWdI)>;
-
-// [402] "sqdecw $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQDECW_XPiI)>;
-
-// [403] "sqdecw $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SQDECW_ZPiI)>;
-
-// [404] "sqincb $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCB_XPiWdI)>;
-
-// [405] "sqincb $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCB_XPiI)>;
-
-// [406] "sqincd $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCD_XPiWdI)>;
-
-// [407] "sqincd $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCD_XPiI)>;
-
-// [408] "sqincd $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SQINCD_ZPiI)>;
-
-// [409] "sqinch $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCH_XPiWdI)>;
-
-// [410] "sqinch $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCH_XPiI)>;
-
-// [411] "sqinch $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SQINCH_ZPiI)>;
-
-// [412] "sqincp $Rdn, $Pg";
-def : InstRW<[A64FXWrite_8Cyc_GI124], (instrs SQINCP_XP_B, SQINCP_XP_D, SQINCP_XP_H, SQINCP_XP_S)>;
-
-// [413] "sqincp $Rdn, $Pg, $_Rdn";
-def : InstRW<[A64FXWrite_8Cyc_GI124], (instrs SQINCP_XPWd_B, SQINCP_XPWd_D, SQINCP_XPWd_H, SQINCP_XPWd_S)>;
-
-// [414] "sqincp $Zdn, $Pg";
-def : InstRW<[A64FXWrite_12Cyc_GI01], (instrs SQINCP_ZP_D, SQINCP_ZP_H, SQINCP_ZP_S)>;
-
-// [415] "sqincw $Rdn, $_Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCW_XPiWdI)>;
-
-// [416] "sqincw $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs SQINCW_XPiI)>;
-
-// [417] "sqincw $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SQINCW_ZPiI)>;
-
-// [418] "sqsub $Zd, $Zn, $Zm";
-
-// [419] "sqsub $Zdn, $_Zdn, $imm";
-
-// [420] "st1b $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1B, ST1B_D, ST1B_H, ST1B_S)>;
-
-// [421] "st1b $Zt, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_ST1W_19], (instrs SST1B_D, SST1B_D_SXTW, SST1B_D_UXTW, SST1B_S_SXTW, SST1B_S_UXTW)>;
-
-// [422] "st1b $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1B_D_IMM, ST1B_H_IMM, ST1B_IMM, ST1B_S_IMM)>;
-
-// [423] "st1b $Zt, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_ST1W_15], (instrs SST1B_D_IMM, SST1B_S_IMM)>;
-
-// [424] "st1d $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1D)>;
-
-// [425] "st1d $Zt, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_ST1W_19], (instrs SST1D, SST1D_SCALED, SST1D_SXTW, SST1D_SXTW_SCALED, SST1D_UXTW, SST1D_UXTW_SCALED)>;
-
-// [426] "st1d $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1D_IMM)>;
-
-// [427] "st1d $Zt, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_ST1W_15], (instrs SST1D_IMM)>;
-
-// [428] "st1h $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1H, ST1H_D, ST1H_S)>;
-
-// [429] "st1h $Zt, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_ST1W_19], (instrs SST1H_D, SST1H_D_SCALED, SST1H_D_SXTW, SST1H_D_SXTW_SCALED, SST1H_D_UXTW, SST1H_D_UXTW_SCALED, SST1H_S_SXTW, SST1H_S_SXTW_SCALED, SST1H_S_UXTW, SST1H_S_UXTW_SCALED)>;
-
-// [430] "st1h $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1H_D_IMM, ST1H_IMM, ST1H_S_IMM)>;
-
-// [431] "st1h $Zt, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_ST1W_15], (instrs SST1H_D_IMM, SST1H_S_IMM)>;
-
-// [432] "st1w $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1W, ST1W_D)>;
-
-// [433] "st1w $Zt, $Pg, [$Rn, $Zm]";
-def : InstRW<[A64FXWrite_ST1W_19], (instrs SST1W_D, SST1W_D_SCALED, SST1W_D_SXTW, SST1W_D_SXTW_SCALED, SST1W_D_UXTW, SST1W_D_UXTW_SCALED, SST1W_SXTW, SST1W_SXTW_SCALED, SST1W_UXTW, SST1W_UXTW_SCALED)>;
-
-// [434] "st1w $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs ST1W_D_IMM, ST1W_IMM)>;
-
-// [435] "st1w $Zt, $Pg, [$Zn, $imm5]";
-def : InstRW<[A64FXWrite_ST1W_15], (instrs SST1W_D_IMM, SST1W_IMM)>;
-
-// [436] "st2b $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2B)>;
-
-// [437] "st2b $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2B_IMM)>;
-
-// [438] "st2d $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2D)>;
-
-// [439] "st2d $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2D_IMM)>;
-
-// [440] "st2h $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2H)>;
-
-// [441] "st2h $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2H_IMM)>;
-
-// [442] "st2w $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2W)>;
-
-// [443] "st2w $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST2W_7], (instrs ST2W_IMM)>;
-
-// [444] "st3b $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3B)>;
-
-// [445] "st3b $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3B_IMM)>;
-
-// [446] "st3d $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3D)>;
-
-// [447] "st3d $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3D_IMM)>;
-
-// [448] "st3h $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3H)>;
-
-// [449] "st3h $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3H_IMM)>;
-
-// [450] "st3w $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3W)>;
-
-// [451] "st3w $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST3W_8], (instrs ST3W_IMM)>;
-
-// [452] "st4b $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4B)>;
-
-// [453] "st4b $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4B_IMM)>;
-
-// [454] "st4d $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4D)>;
-
-// [455] "st4d $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4D_IMM)>;
-
-// [456] "st4h $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4H)>;
-
-// [457] "st4h $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4H_IMM)>;
-
-// [458] "st4w $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4W)>;
-
-// [459] "st4w $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST4W_9], (instrs ST4W_IMM)>;
-
-// [460] "stnt1b $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1B_ZRR)>;
-
-// [461] "stnt1b $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1B_ZRI)>;
-
-// [462] "stnt1d $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1D_ZRR)>;
-
-// [463] "stnt1d $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1D_ZRI)>;
-
-// [464] "stnt1h $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1H_ZRR)>;
-
-// [465] "stnt1h $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1H_ZRI)>;
-
-// [466] "stnt1w $Zt, $Pg, [$Rn, $Rm]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1W_ZRR)>;
-
-// [467] "stnt1w $Zt, $Pg, [$Rn, $imm4, mul vl]";
-def : InstRW<[A64FXWrite_ST1W_6], (instrs STNT1W_ZRI)>;
-
-// [468] "str $Pt, [$Rn, $imm9, mul vl]";
-def : InstRW<[A64FXWrite_6Cyc_GI15], (instrs STR_PXI)>;
-
-// [469] "str $Zt, [$Rn, $imm9, mul vl]";
-def : InstRW<[A64FXWrite_6Cyc_GI05], (instrs STR_ZXI)>;
-
-// [470] "sub $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SUB_ZZZ_B, SUB_ZZZ_D, SUB_ZZZ_H, SUB_ZZZ_S)>;
-
-// [471] "sub $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SUB_ZPmZ_B, SUB_ZPmZ_D, SUB_ZPmZ_H, SUB_ZPmZ_S)>;
-
-// [472] "sub $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SUB_ZI_B, SUB_ZI_D, SUB_ZI_H, SUB_ZI_S)>;
-
-// [473] "subr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SUBR_ZPmZ_B, SUBR_ZPmZ_D, SUBR_ZPmZ_H, SUBR_ZPmZ_S)>;
-
-// [474] "subr $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs SUBR_ZI_B, SUBR_ZI_D, SUBR_ZI_H, SUBR_ZI_S)>;
-
-// [475] "sunpkhi $Zd, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs SUNPKHI_ZZ_D, SUNPKHI_ZZ_H, SUNPKHI_ZZ_S)>;
-
-// [476] "sunpklo $Zd, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs SUNPKLO_ZZ_D, SUNPKLO_ZZ_H, SUNPKLO_ZZ_S)>;
-
-// [477] "sxtb $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SXTB_ZPmZ_D, SXTB_ZPmZ_H, SXTB_ZPmZ_S)>;
-
-// [478] "sxth $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SXTH_ZPmZ_D, SXTH_ZPmZ_S)>;
-
-// [479] "sxtw $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs SXTW_ZPmZ_D)>;
-
-// [480] "tbl $Zd, $Zn, $Zm";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs TBL_ZZZ_B, TBL_ZZZ_D, TBL_ZZZ_H, TBL_ZZZ_S)>;
-
-// [481] "trn1 $Pd, $Pn, $Pm";
-
-// [482] "trn1 $Zd, $Zn, $Zm";
-
-// [483] "trn2 $Pd, $Pn, $Pm";
-
-// [484] "trn2 $Zd, $Zn, $Zm";
-
-// [486] "uabd $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UABD_ZPmZ_B, UABD_ZPmZ_D, UABD_ZPmZ_H, UABD_ZPmZ_S)>;
-
-// [487] "uaddv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_12Cyc_GI03], (instrs UADDV_VPZ_B, UADDV_VPZ_D, UADDV_VPZ_H, UADDV_VPZ_S)>;
-
-// [488] "ucvtf $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs UCVTF_ZPmZ_DtoD, UCVTF_ZPmZ_DtoH, UCVTF_ZPmZ_DtoS, UCVTF_ZPmZ_HtoH, UCVTF_ZPmZ_StoD, UCVTF_ZPmZ_StoH, UCVTF_ZPmZ_StoS)>;
-
-// [489] "udiv $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_37Cyc_GI0], (instrs UDIV_ZPmZ_D, UDIV_ZPmZ_S)>;
-
-// [490] "udivr $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_37Cyc_GI0], (instrs UDIVR_ZPmZ_D, UDIVR_ZPmZ_S)>;
-
-// [491] "udot $Zda, $Zn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs UDOT_ZZZ_D, UDOT_ZZZ_S)>;
-
-// [492] "udot $Zda, $Zn, $Zm$iop";
-def : InstRW<[A64FXWrite_15Cyc_NGI03], (instrs UDOT_ZZZI_D, UDOT_ZZZI_S)>;
-
-// [493] "umax $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UMAX_ZPmZ_B, UMAX_ZPmZ_D, UMAX_ZPmZ_H, UMAX_ZPmZ_S)>;
+def A64FXWrite_INDEX_II_BH : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 13;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2];
+}
+def : InstRW<[A64FXWrite_INDEX_II_BH], (instregex "^INDEX_II_[BH]")>;
-// [494] "umax $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs UMAX_ZI_B, UMAX_ZI_D, UMAX_ZI_H, UMAX_ZI_S)>;
+def A64FXWrite_INDEX_RR_BH : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI3]> {
+ let Latency = 17;
+ let NumMicroOps = 3;
+ let ResourceCycles = [2, 2, 1];
+}
+def : InstRW<[A64FXWrite_INDEX_RR_BH], (instregex "^INDEX_RR_[BH]")>;
-// [495] "umaxv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs UMAXV_VPZ_B, UMAXV_VPZ_D, UMAXV_VPZ_H, UMAXV_VPZ_S)>;
+def A64FXWrite_INDEX_RR_SD : SchedWriteRes<[A64FXGI0, A64FXGI2]> {
+ let Latency = 17;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2, 1];
+}
+def : InstRW<[A64FXWrite_INDEX_RR_SD], (instregex "^INDEX_RR_[SD]")>;
-// [496] "umin $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UMIN_ZPmZ_B, UMIN_ZPmZ_D, UMIN_ZPmZ_H, UMIN_ZPmZ_S)>;
+def A64FXWrite_INSR_ZR : SchedWriteRes<[A64FXGI0, A64FXGI2]> {
+ let Latency = 10;
+}
+def : InstRW<[A64FXWrite_INSR_ZR], (instregex "^INSR_ZR")>;
-// [497] "umin $Zdn, $_Zdn, $imm";
-def : InstRW<[A64FXWrite_4Cyc_GI0], (instrs UMIN_ZI_B, UMIN_ZI_D, UMIN_ZI_H, UMIN_ZI_S)>;
+def A64FXWrite_LAST_R : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 25;
+}
+def : InstRW<[A64FXWrite_CLAST_R], (instregex "^LAST[AB]_R")>;
-// [498] "uminv $Vd, $Pg, $Zn";
-def : InstRW<[A64FXWrite_14Cyc_GI03], (instrs UMINV_VPZ_B, UMINV_VPZ_D, UMINV_VPZ_H, UMINV_VPZ_S)>;
+def A64FXWrite_GLD_S_ZI : SchedWriteRes<[A64FXGI0, A64FXGI5, A64FXGI6]> {
+ let Latency = 19;
+ let ResourceCycles = [2, 4, 4];
+}
+def : InstRW<[A64FXWrite_GLD_S_ZI],
+ (instregex "^GLD(FF)?1W_IMM", "^GLD(FF)?1S?[BHW]_S_IMM")>;
-// [499] "umulh $Zdn, $Pg/m, $_Zdn, $Zm";
-def : InstRW<[A64FXWrite_9Cyc_GI03], (instrs UMULH_ZPmZ_B, UMULH_ZPmZ_D, UMULH_ZPmZ_H, UMULH_ZPmZ_S)>;
+def A64FXWrite_GLD_D_ZI : SchedWriteRes<[A64FXGI0, A64FXGI5, A64FXGI6]> {
+ let Latency = 16;
+ let ResourceCycles = [1, 2, 2];
+}
+def : InstRW<[A64FXWrite_GLD_D_ZI],
+ (instregex "^GLD(FF)?1D_IMM", "^GLD(FF)?1S?[BHW]_D_IMM")>;
-// [500] "uqadd $Zd, $Zn, $Zm";
+def A64FXWrite_GLD_S_RZ : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI5, A64FXGI6]> {
+ let Latency = 23;
+ let ResourceCycles = [2, 1, 4, 4];
+}
+def : InstRW<[A64FXWrite_GLD_S_RZ],
+ (instregex "^GLD(FF)?1W_[^DI]", "^GLD(FF)?1S?[BHW]_S_[^I]")>;
-// [501] "uqadd $Zdn, $_Zdn, $imm";
+def A64FXWrite_GLD_D_RZ : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI5, A64FXGI6]> {
+ let Latency = 20;
+ let ResourceCycles = [1, 1, 2, 2];
+}
+def : InstRW<[A64FXWrite_GLD_D_RZ],
+ (instregex "^GLD(FF)?1D_[^I]", "^GLD(FF)?1D$", "^GLD(FF)?1S?[BHW]_D_[^I]",
+ "^GLD(FF)?1S?[BHW]_D$")>;
-// [502] "uqdecb $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQDECB_WPiI, UQDECB_XPiI)>;
+def A64FXWrite_LD2_BH : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 15;
+ let NumMicroOps = 3;
+ let ResourceCycles = [9];
+}
+def : InstRW<[A64FXWrite_LD2_BH], (instregex "^LD2[BH]")>;
-// [503] "uqdecd $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQDECD_WPiI, UQDECD_XPiI)>;
+def A64FXWrite_LD2_WD_IMM : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 11;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2];
+}
+def : InstRW<[A64FXWrite_LD2_WD_IMM], (instregex "^LD2[WD]_IMM")>;
-// [504] "uqdecd $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQDECD_ZPiI)>;
+def A64FXWrite_LD2_WD : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 3;
+ let ResourceCycles = [3];
+}
+def : InstRW<[A64FXWrite_LD2_WD], (instregex "^LD2[WD]$")>;
-// [505] "uqdech $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQDECH_WPiI, UQDECH_XPiI)>;
+def A64FXWrite_LD3_BH : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 15;
+ let NumMicroOps = 4;
+ let ResourceCycles = [13];
+}
+def : InstRW<[A64FXWrite_LD3_BH], (instregex "^LD3[BH]")>;
-// [506] "uqdech $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQDECH_ZPiI)>;
+def A64FXWrite_LD3_WD_IMM : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 11;
+ let NumMicroOps = 3;
+ let ResourceCycles = [3];
+}
+def : InstRW<[A64FXWrite_LD3_WD_IMM], (instregex "^LD3[WD]_IMM")>;
-// [507] "uqdecp $Rdn, $Pg";
-def : InstRW<[A64FXWrite_8Cyc_GI124], (instrs UQDECP_WP_B, UQDECP_WP_D, UQDECP_WP_H, UQDECP_WP_S, UQDECP_XP_B, UQDECP_XP_D, UQDECP_XP_H, UQDECP_XP_S)>;
+def A64FXWrite_LD3_WD : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 4;
+ let ResourceCycles = [4];
+}
+def : InstRW<[A64FXWrite_LD3_WD], (instregex "^LD3[WD]$")>;
-// [508] "uqdecp $Zdn, $Pg";
-def : InstRW<[A64FXWrite_12Cyc_GI01], (instrs UQDECP_ZP_D, UQDECP_ZP_H, UQDECP_ZP_S)>;
+def A64FXWrite_LD4_BH : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 15;
+ let NumMicroOps = 5;
+ let ResourceCycles = [17];
+}
+def : InstRW<[A64FXWrite_LD4_BH], (instregex "^LD4[BH]")>;
-// [509] "uqdecw $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQDECW_WPiI, UQDECW_XPiI)>;
+def A64FXWrite_LD4_WD_IMM : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 11;
+ let NumMicroOps = 4;
+ let ResourceCycles = [4];
+}
+def : InstRW<[A64FXWrite_LD4_WD_IMM], (instregex "^LD4[WD]_IMM")>;
-// [510] "uqdecw $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQDECW_ZPiI)>;
+def A64FXWrite_LD4_WD : SchedWriteRes<[A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 5;
+ let ResourceCycles = [5];
+}
+def : InstRW<[A64FXWrite_LD4_WD], (instregex "^LD4[WD]$")>;
-// [511] "uqincb $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQINCB_WPiI, UQINCB_XPiI)>;
+def A64FXWrite_PRF : SchedWriteRes<[A64FXGI56]> {
+}
+def : InstRW<[A64FXWrite_PRF], (instregex "^PRF._PR")>;
-// [512] "uqincd $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQINCD_WPiI, UQINCD_XPiI)>;
+def A64FXWrite_PRF_W_RZ : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI56]> {
+ let ResourceCycles = [2, 1, 4];
+}
+def : InstRW<[A64FXWrite_PRF_W_RZ], (instregex "^PRF._S_[^P]")>;
-// [513] "uqincd $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQINCD_ZPiI)>;
+def A64FXWrite_PRF_W_ZI : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let ResourceCycles = [2, 4];
+}
+def : InstRW<[A64FXWrite_PRF_W_ZI], (instregex "^PRF._S_PZI")>;
-// [514] "uqinch $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQINCH_WPiI, UQINCH_XPiI)>;
+def A64FXWrite_PRF_D_RZ : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI56]> {
+ let ResourceCycles = [1, 1, 2];
+}
+def : InstRW<[A64FXWrite_PRF_D_RZ], (instregex "^PRF._D_[^P]")>;
-// [515] "uqinch $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQINCH_ZPiI)>;
+def A64FXWrite_PRF_D_ZI : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let ResourceCycles = [1, 2];
+}
+def : InstRW<[A64FXWrite_PRF_D_ZI], (instregex "^PRF._D_PZI")>;
-// [516] "uqincp $Rdn, $Pg";
-def : InstRW<[A64FXWrite_8Cyc_GI124], (instrs UQINCP_WP_B, UQINCP_WP_D, UQINCP_WP_H, UQINCP_WP_S, UQINCP_XP_B, UQINCP_XP_D, UQINCP_XP_H, UQINCP_XP_S)>;
+def A64FXWrite_SDIV_S : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 114;
+ let ResourceCycles = [114];
+}
+def : InstRW<[A64FXWrite_SDIV_S], (instregex "^[SU]DIVR?.*_S")>;
-// [517] "uqincp $Zdn, $Pg";
-def : InstRW<[A64FXWrite_12Cyc_GI01], (instrs UQINCP_ZP_D, UQINCP_ZP_H, UQINCP_ZP_S)>;
+def A64FXWrite_SDIV_D : SchedWriteRes<[A64FXGI0]> {
+ let Latency = 178;
+ let ResourceCycles = [178];
+}
+def : InstRW<[A64FXWrite_SDIV_D], (instregex "^[SU]DIVR?.*_D")>;
-// [518] "uqincw $Rdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_2Cyc_GI24], (instrs UQINCW_WPiI, UQINCW_XPiI)>;
+def A64FXWrite_SDOT_I : SchedWriteRes<[A64FXGI0, A64FXGI3]> {
+ let Latency = 15;
+ let NumMicroOps = 2;
+}
+def : InstRW<[A64FXWrite_SDOT_I], (instregex "^[SU]DOT_ZZZI")>;
-// [519] "uqincw $Zdn, $pattern, mul $imm4";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQINCW_ZPiI)>;
+def A64FXWrite_SQINC_Scalar : SchedWriteRes<[A64FXGI24]> {
+ let Latency = 2;
+ let ResourceCycles = [2];
+}
+def : InstRW<[A64FXWrite_SQINC_Scalar], (instregex "^[SU]Q(INC|DEC)[BHWD]_[WX]")>;
-// [520] "uqsub $Zd, $Zn, $Zm";
-//@@@ def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQSUB_ZZZ_B, UQSUB_ZZZ_D, UQSUB_ZZZ_H, UQSUB_ZZZ_S)>;
+def A64FXWrite_SQINCP_X : SchedWriteRes<[A64FXGI24, A64FXGI3]> {
+ let Latency = 6;
+ let NumMicroOps = 2;
+ let ResourceCycles = [3, 1];
+}
+def : InstRW<[A64FXWrite_SQINCP_X], (instregex "^[SU]Q(INC|DEC)P_[WX]")>;
-// [521] "uqsub $Zdn, $_Zdn, $imm";
-//@@@ def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UQSUB_ZI_B, UQSUB_ZI_D, UQSUB_ZI_H, UQSUB_ZI_S)>;
+def A64FXWrite_SQINCP_Z : SchedWriteRes<[A64FXGI24, A64FXGI3]> {
+ let Latency = 12;
+}
+def : InstRW<[A64FXWrite_SQINCP_Z], (instregex "^[SU]Q(INC|DEC)P_Z")>;
-// [522] "uunpkhi $Zd, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs UUNPKHI_ZZ_D, UUNPKHI_ZZ_H, UUNPKHI_ZZ_S)>;
+def A64FXWrite_ST1 : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 11;
+}
+def : InstRW<[A64FXWrite_ST1], (instregex "^ST(NT)?1[BHWD]")>;
-// [523] "uunpklo $Zd, $Zn";
-def : InstRW<[A64FXWrite_6Cyc_GI0], (instrs UUNPKLO_ZZ_D, UUNPKLO_ZZ_H, UUNPKLO_ZZ_S)>;
+def A64FXWrite_SST1_W_RZ : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI5, A64FXGI6]> {
+ let Latency = 20;
+ let NumMicroOps = 8;
+ let ResourceCycles = [8, 8, 8, 8];
+}
+def : InstRW<[A64FXWrite_SST1_W_RZ],
+ (instregex "^SST1[BH]_S(_[^I]|$)", "^SST1W(_[^ID]|$)")>;
-// [524] "uxtb $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UXTB_ZPmZ_D, UXTB_ZPmZ_H, UXTB_ZPmZ_S)>;
+def A64FXWrite_SST1_D_RZ : SchedWriteRes<[A64FXGI0, A64FXGI2, A64FXGI5, A64FXGI6]> {
+ let Latency = 20;
+ let NumMicroOps = 4;
+ let ResourceCycles = [4, 4, 4, 4];
+}
+def : InstRW<[A64FXWrite_SST1_D_RZ],
+ (instregex "^SST1[BHW]_D(_[^I]|$)", "^SST1D(_[^I]|$)")>;
-// [525] "uxth $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UXTH_ZPmZ_D, UXTH_ZPmZ_S)>;
+def A64FXWrite_SST1_W_ZI : SchedWriteRes<[A64FXGI0, A64FXGI5, A64FXGI6]> {
+ let Latency = 16;
+ let NumMicroOps = 8;
+ let ResourceCycles = [12, 8, 8];
+}
+def : InstRW<[A64FXWrite_SST1_W_ZI],
+ (instregex "^SST1[BH]_S_I", "^SST1W_I")>;
-// [526] "uxtw $Zd, $Pg/m, $Zn";
-def : InstRW<[A64FXWrite_4Cyc_GI03], (instrs UXTW_ZPmZ_D)>;
+def A64FXWrite_SST1_D_ZI : SchedWriteRes<[A64FXGI0, A64FXGI5, A64FXGI6]> {
+ let Latency = 16;
+ let NumMicroOps = 4;
+ let ResourceCycles = [4, 4, 4];
+}
+def : InstRW<[A64FXWrite_SST1_D_ZI],
+ (instregex "^SST1[BHW]_D_I", "^SST1D_I")>;
-// [527] "uzp1 $Pd, $Pn, $Pm";
+def A64FXWrite_ST2_BH : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 3;
+ let ResourceCycles = [8, 9];
+}
+def : InstRW<[A64FXWrite_ST2_BH], (instregex "^ST2[BH]")>;
-// [528] "uzp1 $Zd, $Zn, $Zm";
+def A64FXWrite_ST2_WD_RI : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 11;
+ let NumMicroOps = 2;
+ let ResourceCycles = [2, 2];
+}
+def : InstRW<[A64FXWrite_ST2_WD_RI], (instregex "^ST2[WD]$")>;
-// [529] "uzp2 $Pd, $Pn, $Pm";
+def A64FXWrite_ST2_WD_RR : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 3;
+ let ResourceCycles = [2, 3];
+}
+def : InstRW<[A64FXWrite_ST2_WD_RR], (instregex "^ST2[WD]_I")>;
-// [530] "uzp2 $Zd, $Zn, $Zm";
+def A64FXWrite_ST3_BH : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 15;
+ let NumMicroOps = 4;
+ let ResourceCycles = [12, 13];
+}
+def : InstRW<[A64FXWrite_ST3_BH], (instregex "^ST3[BH]")>;
-// [531] "whilele $Pd, $Rn, $Rm";
-def : InstRW<[A64FXWrite_4Cyc_GI12], (instrs WHILELE_PWW_B, WHILELE_PWW_D, WHILELE_PWW_H, WHILELE_PWW_S, WHILELE_PXX_B, WHILELE_PXX_D, WHILELE_PXX_H, WHILELE_PXX_S)>;
+def A64FXWrite_ST3_WD_RI : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 11;
+ let NumMicroOps = 3;
+ let ResourceCycles = [3, 3];
+}
+def : InstRW<[A64FXWrite_ST3_WD_RI], (instregex "^ST3[WD]$")>;
-// [532] "whilelo $Pd, $Rn, $Rm";
-def : InstRW<[A64FXWrite_4Cyc_GI12], (instrs WHILELO_PWW_B, WHILELO_PWW_D, WHILELO_PWW_H, WHILELO_PWW_S, WHILELO_PXX_B, WHILELO_PXX_D, WHILELO_PXX_H, WHILELO_PXX_S)>;
+def A64FXWrite_ST3_WD_RR : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 4;
+ let ResourceCycles = [3, 4];
+}
+def : InstRW<[A64FXWrite_ST3_WD_RR], (instregex "^ST3[WD]_I")>;
-// [533] "whilels $Pd, $Rn, $Rm";
-def : InstRW<[A64FXWrite_4Cyc_GI12], (instrs WHILELS_PWW_B, WHILELS_PWW_D, WHILELS_PWW_H, WHILELS_PWW_S, WHILELS_PXX_B, WHILELS_PXX_D, WHILELS_PXX_H, WHILELS_PXX_S)>;
+def A64FXWrite_ST4_BH : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 15;
+ let NumMicroOps = 5;
+ let ResourceCycles = [16, 17];
+}
+def : InstRW<[A64FXWrite_ST4_BH], (instregex "^ST4[BH]")>;
-// [534] "whilelt $Pd, $Rn, $Rm";
-def : InstRW<[A64FXWrite_4Cyc_GI12], (instrs WHILELT_PWW_B, WHILELT_PWW_D, WHILELT_PWW_H, WHILELT_PWW_S, WHILELT_PXX_B, WHILELT_PXX_D, WHILELT_PXX_H, WHILELT_PXX_S)>;
+def A64FXWrite_ST4_WD_RI : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 11;
+ let NumMicroOps = 4;
+ let ResourceCycles = [4, 4];
+}
+def : InstRW<[A64FXWrite_ST4_WD_RI], (instregex "^ST4[WD]$")>;
-// [535] "wrffr $Pn";
-def : InstRW<[A64FXWrite_6Cyc_NGI1], (instrs WRFFR)>;
+def A64FXWrite_ST4_WD_RR : SchedWriteRes<[A64FXGI0, A64FXGI56]> {
+ let Latency = 12;
+ let NumMicroOps = 5;
+ let ResourceCycles = [4, 5];
+}
+def : InstRW<[A64FXWrite_ST4_WD_RR], (instregex "^ST4[WD]_I")>;
-// [536] "zip1 $Pd, $Pn, $Pm";
+def A64FXWrite_STR_P : SchedWriteRes<[A64FXGI3, A64FXGI5]> {
+ let Latency = 11;
+}
+def : InstRW<[A64FXWrite_STR_P], (instrs STR_PXI)>;
-// [537] "zip1 $Zd, $Zn, $Zm";
+def A64FXWrite_STR_Z : SchedWriteRes<[A64FXGI0, A64FXGI5]> {
+ let Latency = 11;
+}
+def : InstRW<[A64FXWrite_STR_Z], (instrs STR_ZXI)>;
-// [538] "zip2 $Pd, $Pn, $Pm";
+def A64FXWrite_WHILE : SchedWriteRes<[A64FXGI3, A64FXGI5]> {
+ let Latency = 4;
+}
+def : InstRW<[A64FXWrite_WHILE], (instregex "^WHILEL._P")>;
-// [539] "zip2 $Zd, $Zn, $Zm";
+def A64FXWrite_WRFFR : SchedWriteRes<[A64FXGI3, A64FXGI5]> {
+ let Latency = 3;
+ let NumMicroOps = 2;
+}
+def : InstRW<[A64FXWrite_WRFFR], (instrs WRFFR)>;
} // SchedModel = A64FXModel
--- /dev/null
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=a64fx -instruction-tables < %s | FileCheck %s
+
+#------------------------------------------------------------------------------
+# Add/sub (immediate)
+#------------------------------------------------------------------------------
+
+add w2, w3, #4095
+add w30, w29, #1, lsl #12
+add w13, w5, #4095, lsl #12
+add x5, x7, #1638
+add w20, wsp, #801
+add wsp, wsp, #1104
+add wsp, w30, #4084
+add x0, x24, #291
+add x3, x24, #4095, lsl #12
+add x8, sp, #1074
+add sp, x29, #3816
+sub w0, wsp, #4077
+sub w4, w20, #546, lsl #12
+sub sp, sp, #288
+sub wsp, w19, #16
+adds w13, w23, #291, lsl #12
+cmn w2, #4095
+adds w20, wsp, #0
+cmn x3, #1, lsl #12
+cmp sp, #20, lsl #12
+cmp x30, #4095
+subs x4, sp, #3822
+cmn w3, #291, lsl #12
+cmn wsp, #1365
+cmn sp, #1092, lsl #12
+mov sp, x30
+mov wsp, w20
+mov x11, sp
+mov w24, wsp
+
+#------------------------------------------------------------------------------
+# Add-subtract (shifted register)
+#------------------------------------------------------------------------------
+
+add w3, w5, w7
+add wzr, w3, w5
+add w20, wzr, w4
+add w4, w6, wzr
+add w11, w13, w15
+add w9, w3, wzr, lsl #10
+add w17, w29, w20, lsl #31
+add w21, w22, w23, lsr #0
+add w24, w25, w26, lsr #18
+add w27, w28, w29, lsr #31
+add w2, w3, w4, asr #0
+add w5, w6, w7, asr #21
+add w8, w9, w10, asr #31
+add x3, x5, x7
+add xzr, x3, x5
+add x20, xzr, x4
+add x4, x6, xzr
+add x11, x13, x15
+add x9, x3, xzr, lsl #10
+add x17, x29, x20, lsl #63
+add x21, x22, x23, lsr #0
+add x24, x25, x26, lsr #18
+add x27, x28, x29, lsr #63
+add x2, x3, x4, asr #0
+add x5, x6, x7, asr #21
+add x8, x9, x10, asr #63
+adds w3, w5, w7
+cmn w3, w5
+adds w20, wzr, w4
+adds w4, w6, wzr
+adds w11, w13, w15
+adds w9, w3, wzr, lsl #10
+adds w17, w29, w20, lsl #31
+adds w21, w22, w23, lsr #0
+adds w24, w25, w26, lsr #18
+adds w27, w28, w29, lsr #31
+adds w2, w3, w4, asr #0
+adds w5, w6, w7, asr #21
+adds w8, w9, w10, asr #31
+adds x3, x5, x7
+cmn x3, x5
+adds x20, xzr, x4
+adds x4, x6, xzr
+adds x11, x13, x15
+adds x9, x3, xzr, lsl #10
+adds x17, x29, x20, lsl #63
+adds x21, x22, x23, lsr #0
+adds x24, x25, x26, lsr #18
+adds x27, x28, x29, lsr #63
+adds x2, x3, x4, asr #0
+adds x5, x6, x7, asr #21
+adds x8, x9, x10, asr #63
+sub w3, w5, w7
+sub wzr, w3, w5
+sub w4, w6, wzr
+sub w11, w13, w15
+sub w9, w3, wzr, lsl #10
+sub w17, w29, w20, lsl #31
+sub w21, w22, w23, lsr #0
+sub w24, w25, w26, lsr #18
+sub w27, w28, w29, lsr #31
+sub w2, w3, w4, asr #0
+sub w5, w6, w7, asr #21
+sub w8, w9, w10, asr #31
+sub x3, x5, x7
+sub xzr, x3, x5
+sub x4, x6, xzr
+sub x11, x13, x15
+sub x9, x3, xzr, lsl #10
+sub x17, x29, x20, lsl #63
+sub x21, x22, x23, lsr #0
+sub x24, x25, x26, lsr #18
+sub x27, x28, x29, lsr #63
+sub x2, x3, x4, asr #0
+sub x5, x6, x7, asr #21
+sub x8, x9, x10, asr #63
+subs w3, w5, w7
+cmp w3, w5
+subs w4, w6, wzr
+subs w11, w13, w15
+subs w9, w3, wzr, lsl #10
+subs w17, w29, w20, lsl #31
+subs w21, w22, w23, lsr #0
+subs w24, w25, w26, lsr #18
+subs w27, w28, w29, lsr #31
+subs w2, w3, w4, asr #0
+subs w5, w6, w7, asr #21
+subs w8, w9, w10, asr #31
+subs x3, x5, x7
+cmp x3, x5
+subs x4, x6, xzr
+subs x11, x13, x15
+subs x9, x3, xzr, lsl #10
+subs x17, x29, x20, lsl #63
+subs x21, x22, x23, lsr #0
+subs x24, x25, x26, lsr #18
+subs x27, x28, x29, lsr #63
+subs x2, x3, x4, asr #0
+subs x5, x6, x7, asr #21
+subs x8, x9, x10, asr #63
+cmn wzr, w4
+cmn w5, wzr
+cmn w6, w7
+cmn w8, w9, lsl #15
+cmn w10, w11, lsl #31
+cmn w12, w13, lsr #0
+cmn w14, w15, lsr #21
+cmn w16, w17, lsr #31
+cmn w18, w19, asr #0
+cmn w20, w21, asr #22
+cmn w22, w23, asr #31
+cmn x0, x3
+cmn xzr, x4
+cmn x5, xzr
+cmn x6, x7
+cmn x8, x9, lsl #15
+cmn x10, x11, lsl #63
+cmn x12, x13, lsr #0
+cmn x14, x15, lsr #41
+cmn x16, x17, lsr #63
+cmn x18, x19, asr #0
+cmn x20, x21, asr #55
+cmn x22, x23, asr #63
+cmp w0, w3
+cmp wzr, w4
+cmp w5, wzr
+cmp w6, w7
+cmp w8, w9, lsl #15
+cmp w10, w11, lsl #31
+cmp w12, w13, lsr #0
+cmp w14, w15, lsr #21
+cmp w18, w19, asr #0
+cmp w20, w21, asr #22
+cmp w22, w23, asr #31
+cmp x0, x3
+cmp xzr, x4
+cmp x5, xzr
+cmp x6, x7
+cmp x8, x9, lsl #15
+cmp x10, x11, lsl #63
+cmp x12, x13, lsr #0
+cmp x14, x15, lsr #41
+cmp x16, x17, lsr #63
+cmp x18, x19, asr #0
+cmp x20, x21, asr #55
+cmp x22, x23, asr #63
+cmp wzr, w0
+cmp xzr, x0
+
+#------------------------------------------------------------------------------
+# Add-subtract (shifted register)
+#------------------------------------------------------------------------------
+
+adc w29, w27, w25
+adc wzr, w3, w4
+adc w9, wzr, w10
+adc w20, w0, wzr
+adc x29, x27, x25
+adc xzr, x3, x4
+adc x9, xzr, x10
+adc x20, x0, xzr
+adcs w29, w27, w25
+adcs wzr, w3, w4
+adcs w9, wzr, w10
+adcs w20, w0, wzr
+adcs x29, x27, x25
+adcs xzr, x3, x4
+adcs x9, xzr, x10
+adcs x20, x0, xzr
+sbc w29, w27, w25
+sbc wzr, w3, w4
+ngc w9, w10
+sbc w20, w0, wzr
+sbc x29, x27, x25
+sbc xzr, x3, x4
+ngc x9, x10
+sbc x20, x0, xzr
+sbcs w29, w27, w25
+sbcs wzr, w3, w4
+ngcs w9, w10
+sbcs w20, w0, wzr
+sbcs x29, x27, x25
+sbcs xzr, x3, x4
+ngcs x9, x10
+sbcs x20, x0, xzr
+ngc w3, w12
+ngc wzr, w9
+ngc w23, wzr
+ngc x29, x30
+ngc xzr, x0
+ngc x0, xzr
+ngcs w3, w12
+ngcs wzr, w9
+ngcs w23, wzr
+ngcs x29, x30
+ngcs xzr, x0
+ngcs x0, xzr
+
+#------------------------------------------------------------------------------
+# Compare and branch (immediate)
+#------------------------------------------------------------------------------
+
+sbfx x1, x2, #3, #2
+asr x3, x4, #63
+asr wzr, wzr, #31
+sbfx w12, w9, #0, #1
+ubfiz x4, x5, #52, #11
+ubfx xzr, x4, #0, #1
+ubfiz x4, xzr, #1, #6
+lsr x5, x6, #12
+bfi x4, x5, #52, #11
+bfxil xzr, x4, #0, #1
+bfi x4, xzr, #1, #6
+bfxil x5, x6, #12, #52
+sxtb w1, w2
+sxtb xzr, w3
+sxth w9, w10
+sxth x0, w1
+sxtw x3, w30
+uxtb w1, w2
+uxth w9, w10
+ubfx x3, x30, #0, #32
+asr w3, w2, #0
+asr w9, w10, #31
+asr x20, x21, #63
+asr w1, wzr, #3
+lsr w3, w2, #0
+lsr w9, w10, #31
+lsr x20, x21, #63
+lsr wzr, wzr, #3
+lsr w3, w2, #0
+lsl w9, w10, #31
+lsl x20, x21, #63
+lsl w1, wzr, #3
+sbfx w9, w10, #0, #1
+sbfiz x2, x3, #63, #1
+asr x19, x20, #0
+sbfiz x9, x10, #5, #59
+asr w9, w10, #0
+sbfiz w11, w12, #31, #1
+sbfiz w13, w14, #29, #3
+sbfiz xzr, xzr, #10, #11
+sbfx w9, w10, #0, #1
+asr x2, x3, #63
+asr x19, x20, #0
+asr x9, x10, #5
+asr w9, w10, #0
+asr w11, w12, #31
+asr w13, w14, #29
+sbfx xzr, xzr, #10, #11
+bfxil w9, w10, #0, #1
+bfi x2, x3, #63, #1
+bfxil x19, x20, #0, #64
+bfi x9, x10, #5, #59
+bfxil w9, w10, #0, #32
+bfi w11, w12, #31, #1
+bfi w13, w14, #29, #3
+bfi xzr, xzr, #10, #11
+bfxil w9, w10, #0, #1
+bfxil x2, x3, #63, #1
+bfxil x19, x20, #0, #64
+bfxil x9, x10, #5, #59
+bfxil w9, w10, #0, #32
+bfxil w11, w12, #31, #1
+bfxil w13, w14, #29, #3
+bfxil xzr, xzr, #10, #11
+ubfx w9, w10, #0, #1
+lsl x2, x3, #63
+lsr x19, x20, #0
+lsl x9, x10, #5
+lsr w9, w10, #0
+lsl w11, w12, #31
+lsl w13, w14, #29
+ubfiz xzr, xzr, #10, #11
+ubfx w9, w10, #0, #1
+lsr x2, x3, #63
+lsr x19, x20, #0
+lsr x9, x10, #5
+lsr w9, w10, #0
+lsr w11, w12, #31
+lsr w13, w14, #29
+ubfx xzr, xzr, #10, #11
+
+#------------------------------------------------------------------------------
+# Compare and branch (immediate)
+#------------------------------------------------------------------------------
+
+cbz w5, #4
+cbz x5, #0
+cbnz x2, #-4
+cbnz x26, #1048572
+cbz wzr, #0
+cbnz xzr, #0
+
+#------------------------------------------------------------------------------
+# Conditional branch (immediate)
+#------------------------------------------------------------------------------
+
+b.ne #4
+b.ge #1048572
+b.ge #-4
+
+#------------------------------------------------------------------------------
+# Conditional compare (immediate)
+#------------------------------------------------------------------------------
+
+ccmp w1, #31, #0, eq
+ccmp w3, #0, #15, hs
+ccmp wzr, #15, #13, hs
+ccmp x9, #31, #0, le
+ccmp x3, #0, #15, gt
+ccmp xzr, #5, #7, ne
+ccmn w1, #31, #0, eq
+ccmn w3, #0, #15, hs
+ccmn wzr, #15, #13, hs
+ccmn x9, #31, #0, le
+ccmn x3, #0, #15, gt
+ccmn xzr, #5, #7, ne
+
+#------------------------------------------------------------------------------
+# Conditional compare (register)
+#------------------------------------------------------------------------------
+
+ccmp w1, wzr, #0, eq
+ccmp w3, w0, #15, hs
+ccmp wzr, w15, #13, hs
+ccmp x9, xzr, #0, le
+ccmp x3, x0, #15, gt
+ccmp xzr, x5, #7, ne
+ccmn w1, wzr, #0, eq
+ccmn w3, w0, #15, hs
+ccmn wzr, w15, #13, hs
+ccmn x9, xzr, #0, le
+ccmn x3, x0, #15, gt
+ccmn xzr, x5, #7, ne
+
+#------------------------------------------------------------------------------
+# Conditional branch (immediate)
+#------------------------------------------------------------------------------
+
+csel w1, w0, w19, ne
+csel wzr, w5, w9, eq
+csel w9, wzr, w30, gt
+csel w1, w28, wzr, mi
+csel x19, x23, x29, lt
+csel xzr, x3, x4, ge
+csel x5, xzr, x6, hs
+csel x7, x8, xzr, lo
+csinc w1, w0, w19, ne
+csinc wzr, w5, w9, eq
+csinc w9, wzr, w30, gt
+csinc w1, w28, wzr, mi
+csinc x19, x23, x29, lt
+csinc xzr, x3, x4, ge
+csinc x5, xzr, x6, hs
+csinc x7, x8, xzr, lo
+csinv w1, w0, w19, ne
+csinv wzr, w5, w9, eq
+csinv w9, wzr, w30, gt
+csinv w1, w28, wzr, mi
+csinv x19, x23, x29, lt
+csinv xzr, x3, x4, ge
+csinv x5, xzr, x6, hs
+csinv x7, x8, xzr, lo
+csneg w1, w0, w19, ne
+csneg wzr, w5, w9, eq
+csneg w9, wzr, w30, gt
+csneg w1, w28, wzr, mi
+csneg x19, x23, x29, lt
+csneg xzr, x3, x4, ge
+csneg x5, xzr, x6, hs
+csneg x7, x8, xzr, lo
+cset w3, eq
+cset x9, pl
+csetm w20, ne
+csetm x30, ge
+csinc w2, wzr, wzr, al
+csinv x3, xzr, xzr, nv
+cinc w3, w5, gt
+cinc wzr, w4, le
+cset w9, lt
+cinc x3, x5, gt
+cinc xzr, x4, le
+cset x9, lt
+csinc w5, w6, w6, nv
+csinc x1, x2, x2, al
+cinv w3, w5, gt
+cinv wzr, w4, le
+csetm w9, lt
+cinv x3, x5, gt
+cinv xzr, x4, le
+csetm x9, lt
+csinv x1, x0, x0, al
+csinv w9, w8, w8, nv
+cneg w3, w5, gt
+cneg wzr, w4, le
+cneg w9, wzr, lt
+cneg x3, x5, gt
+cneg xzr, x4, le
+cneg x9, xzr, lt
+csneg x4, x8, x8, al
+csinv w9, w8, w8, nv
+
+#------------------------------------------------------------------------------
+# Data-processing (1 source)
+#------------------------------------------------------------------------------
+
+rbit w0, w7
+rbit x18, x3
+rev16 w17, w1
+rev16 x5, x2
+rev w18, w0
+rev32 x20, x1
+rev x22, x2
+clz w24, w3
+clz x26, x4
+cls w3, w5
+cls x20, x5
+
+#------------------------------------------------------------------------------
+# Data-processing (2 source)
+#------------------------------------------------------------------------------
+
+udiv w0, w7, w10
+udiv x9, x22, x4
+sdiv w12, w21, w0
+sdiv x13, x2, x1
+lsl w11, w12, w13
+lsl x14, x15, x16
+lsr w17, w18, w19
+lsr x20, x21, x22
+asr w23, w24, w25
+asr x26, x27, x28
+ror w0, w1, w2
+ror x3, x4, x5
+lsl w6, w7, w8
+lsl x9, x10, x11
+lsr w12, w13, w14
+lsr x15, x16, x17
+asr w18, w19, w20
+asr x21, x22, x23
+ror w24, w25, w26
+ror x27, x28, x29
+
+#------------------------------------------------------------------------------
+# Data-processing (3 sources)
+#------------------------------------------------------------------------------
+
+smulh x30, x29, x28
+smulh xzr, x27, x26
+umulh x30, x29, x28
+umulh x23, x30, xzr
+madd w1, w3, w7, w4
+madd wzr, w0, w9, w11
+madd w13, wzr, w4, w4
+madd w19, w30, wzr, w29
+mul w4, w5, w6
+madd x1, x3, x7, x4
+madd xzr, x0, x9, x11
+madd x13, xzr, x4, x4
+madd x19, x30, xzr, x29
+mul x4, x5, x6
+msub w1, w3, w7, w4
+msub wzr, w0, w9, w11
+msub w13, wzr, w4, w4
+msub w19, w30, wzr, w29
+mneg w4, w5, w6
+msub x1, x3, x7, x4
+msub xzr, x0, x9, x11
+msub x13, xzr, x4, x4
+msub x19, x30, xzr, x29
+mneg x4, x5, x6
+smaddl x3, w5, w2, x9
+smaddl xzr, w10, w11, x12
+smaddl x13, wzr, w14, x15
+smaddl x16, w17, wzr, x18
+smull x19, w20, w21
+smsubl x3, w5, w2, x9
+smsubl xzr, w10, w11, x12
+smsubl x13, wzr, w14, x15
+smsubl x16, w17, wzr, x18
+smnegl x19, w20, w21
+umaddl x3, w5, w2, x9
+umaddl xzr, w10, w11, x12
+umaddl x13, wzr, w14, x15
+umaddl x16, w17, wzr, x18
+umull x19, w20, w21
+umsubl x3, w5, w2, x9
+umsubl x16, w17, wzr, x18
+umnegl x19, w20, w21
+smulh x30, x29, x28
+smulh x23, x22, xzr
+umulh x23, x22, xzr
+mul x19, x20, xzr
+mneg w21, w22, w23
+smull x11, w13, w17
+umull x11, w13, w17
+smnegl x11, w13, w17
+umnegl x11, w13, w17
+
+#------------------------------------------------------------------------------
+# Extract (immediate)
+#------------------------------------------------------------------------------
+
+extr w3, w5, w7, #0
+extr w11, w13, w17, #31
+extr x3, x5, x7, #15
+extr x11, x13, x17, #63
+ror x19, x23, #24
+ror x29, xzr, #63
+ror w9, w13, #31
+
+#------------------------------------------------------------------------------
+# Floating-point compare
+#------------------------------------------------------------------------------
+
+fcmp s3, s5
+fcmp s31, #0.0
+fcmp s31, #0.0
+fcmpe s29, s30
+fcmpe s15, #0.0
+fcmpe s15, #0.0
+fcmp d4, d12
+fcmp d23, #0.0
+fcmp d23, #0.0
+fcmpe d26, d22
+fcmpe d29, #0.0
+fcmpe d29, #0.0
+
+#------------------------------------------------------------------------------
+# Floating-point conditional compare
+#------------------------------------------------------------------------------
+
+fccmp s1, s31, #0, eq
+fccmp s3, s0, #15, hs
+fccmp s31, s15, #13, hs
+fccmp d9, d31, #0, le
+fccmp d3, d0, #15, gt
+fccmp d31, d5, #7, ne
+fccmpe s1, s31, #0, eq
+fccmpe s3, s0, #15, hs
+fccmpe s31, s15, #13, hs
+fccmpe d9, d31, #0, le
+fccmpe d3, d0, #15, gt
+fccmpe d31, d5, #7, ne
+
+#-------------------------------------------------------------------------------
+# Floating-point conditional compare
+#-------------------------------------------------------------------------------
+
+fcsel s3, s20, s9, pl
+fcsel d9, d10, d11, mi
+
+#------------------------------------------------------------------------------
+# Floating-point data-processing (1 source)
+#------------------------------------------------------------------------------
+
+fmov s0, s1
+fabs s2, s3
+fneg s4, s5
+fsqrt s6, s7
+fcvt d8, s9
+fcvt h10, s11
+frintn s12, s13
+frintp s14, s15
+frintm s16, s17
+frintz s18, s19
+frinta s20, s21
+frintx s22, s23
+frinti s24, s25
+fmov d0, d1
+fabs d2, d3
+fneg d4, d5
+fsqrt d6, d7
+fcvt s8, d9
+fcvt h10, d11
+frintn d12, d13
+frintp d14, d15
+frintm d16, d17
+frintz d18, d19
+frinta d20, d21
+frintx d22, d23
+frinti d24, d25
+fcvt s26, h27
+fcvt d28, h29
+
+#------------------------------------------------------------------------------
+# Floating-point data-processing (2 sources)
+#------------------------------------------------------------------------------
+
+fmul s20, s19, s17
+fdiv s1, s2, s3
+fadd s4, s5, s6
+fsub s7, s8, s9
+fmax s10, s11, s12
+fmin s13, s14, s15
+fmaxnm s16, s17, s18
+fminnm s19, s20, s21
+fnmul s22, s23, s2
+fmul d20, d19, d17
+fdiv d1, d2, d3
+fadd d4, d5, d6
+fsub d7, d8, d9
+fmax d10, d11, d12
+fmin d13, d14, d15
+fmaxnm d16, d17, d18
+fminnm d19, d20, d21
+fnmul d22, d23, d24
+
+#------------------------------------------------------------------------------
+# Floating-point data-processing (1 source)
+#------------------------------------------------------------------------------
+
+fmadd s3, s5, s6, s31
+fmadd d3, d13, d0, d23
+fmsub s3, s5, s6, s31
+fmsub d3, d13, d0, d23
+fnmadd s3, s5, s6, s31
+fnmadd d3, d13, d0, d23
+fnmsub s3, s5, s6, s31
+fnmsub d3, d13, d0, d23
+
+#------------------------------------------------------------------------------
+# Floating-point <-> fixed-point conversion
+#------------------------------------------------------------------------------
+
+fcvtzs w3, h5, #1
+fcvtzs wzr, h20, #13
+fcvtzs w19, h0, #32
+fcvtzs x3, h5, #1
+fcvtzs x12, h30, #45
+fcvtzs x19, h0, #64
+fcvtzs w3, s5, #1
+fcvtzs wzr, s20, #13
+fcvtzs w19, s0, #32
+fcvtzs x3, s5, #1
+fcvtzs x12, s30, #45
+fcvtzs x19, s0, #64
+fcvtzs w3, d5, #1
+fcvtzs wzr, d20, #13
+fcvtzs w19, d0, #32
+fcvtzs x3, d5, #1
+fcvtzs x12, d30, #45
+fcvtzs x19, d0, #64
+fcvtzu w3, h5, #1
+fcvtzu wzr, h20, #13
+fcvtzu w19, h0, #32
+fcvtzu x3, h5, #1
+fcvtzu x12, h30, #45
+fcvtzu x19, h0, #64
+fcvtzu w3, s5, #1
+fcvtzu wzr, s20, #13
+fcvtzu w19, s0, #32
+fcvtzu x3, s5, #1
+fcvtzu x12, s30, #45
+fcvtzu x19, s0, #64
+fcvtzu w3, d5, #1
+fcvtzu wzr, d20, #13
+fcvtzu w19, d0, #32
+fcvtzu x3, d5, #1
+fcvtzu x12, d30, #45
+fcvtzu x19, d0, #64
+scvtf h23, w19, #1
+scvtf h31, wzr, #20
+scvtf h14, w0, #32
+scvtf h23, x19, #1
+scvtf h31, xzr, #20
+scvtf h14, x0, #64
+scvtf s23, w19, #1
+scvtf s31, wzr, #20
+scvtf s14, w0, #32
+scvtf s23, x19, #1
+scvtf s31, xzr, #20
+scvtf s14, x0, #64
+scvtf d23, w19, #1
+scvtf d31, wzr, #20
+scvtf d14, w0, #32
+scvtf d23, x19, #1
+scvtf d31, xzr, #20
+scvtf d14, x0, #64
+ucvtf h23, w19, #1
+ucvtf h31, wzr, #20
+ucvtf h14, w0, #32
+ucvtf h23, x19, #1
+ucvtf h31, xzr, #20
+ucvtf h14, x0, #64
+ucvtf s23, w19, #1
+ucvtf s31, wzr, #20
+ucvtf s14, w0, #32
+ucvtf s23, x19, #1
+ucvtf s31, xzr, #20
+ucvtf s14, x0, #64
+ucvtf d23, w19, #1
+ucvtf d31, wzr, #20
+ucvtf d14, w0, #32
+ucvtf d23, x19, #1
+ucvtf d31, xzr, #20
+ucvtf d14, x0, #64
+
+#------------------------------------------------------------------------------
+# Floating-point <-> integer conversion
+#------------------------------------------------------------------------------
+
+fcvtns w3, h31
+fcvtns xzr, h12
+fcvtnu wzr, h12
+fcvtnu x0, h0
+fcvtps wzr, h9
+fcvtps x12, h20
+fcvtpu w30, h23
+fcvtpu x29, h3
+fcvtms w2, h3
+fcvtms x4, h5
+fcvtmu w6, h7
+fcvtmu x8, h9
+fcvtzs w10, h11
+fcvtzs x12, h13
+fcvtzu w14, h15
+fcvtzu x15, h16
+scvtf h17, w18
+scvtf h19, x20
+ucvtf h21, w22
+scvtf h23, x24
+fcvtas w25, h26
+fcvtas x27, h28
+fcvtau w29, h30
+fcvtau xzr, h0
+fcvtns w3, s31
+fcvtns xzr, s12
+fcvtnu wzr, s12
+fcvtnu x0, s0
+fcvtps wzr, s9
+fcvtps x12, s20
+fcvtpu w30, s23
+fcvtpu x29, s3
+fcvtms w2, s3
+fcvtms x4, s5
+fcvtmu w6, s7
+fcvtmu x8, s9
+fcvtzs w10, s11
+fcvtzs x12, s13
+fcvtzu w14, s15
+fcvtzu x15, s16
+scvtf s17, w18
+scvtf s19, x20
+ucvtf s21, w22
+scvtf s23, x24
+fcvtas w25, s26
+fcvtas x27, s28
+fcvtau w29, s30
+fcvtau xzr, s0
+fcvtns w3, d31
+fcvtns xzr, d12
+fcvtnu wzr, d12
+fcvtnu x0, d0
+fcvtps wzr, d9
+fcvtps x12, d20
+fcvtpu w30, d23
+fcvtpu x29, d3
+fcvtms w2, d3
+fcvtms x4, d5
+fcvtmu w6, d7
+fcvtmu x8, d9
+fcvtzs w10, d11
+fcvtzs x12, d13
+fcvtzu w14, d15
+fcvtzu x15, d16
+scvtf d17, w18
+scvtf d19, x20
+ucvtf d21, w22
+ucvtf d23, x24
+fcvtas w25, d26
+fcvtas x27, d28
+fcvtau w29, d30
+fcvtau xzr, d0
+fmov w3, s9
+fmov s9, w3
+fmov x20, d31
+fmov d1, x15
+fmov x3, v12.d[1]
+fmov v1.d[1], x19
+
+#------------------------------------------------------------------------------
+# Floating-point immediate
+#------------------------------------------------------------------------------
+
+fmov s2, #0.12500000
+fmov s3, #1.00000000
+fmov d30, #16.00000000
+fmov s4, #1.06250000
+fmov d10, #1.93750000
+fmov s12, #-1.00000000
+fmov d16, #8.50000000
+
+#------------------------------------------------------------------------------
+# Load-register (literal)
+#------------------------------------------------------------------------------
+
+ldr w3, #0
+ldr x29, #4
+ldrsw xzr, #-4
+ldr s0, #8
+ldr d0, #1048572
+ldr q0, #-1048576
+prfm pldl1strm, #0
+prfm #22, #0
+
+#------------------------------------------------------------------------------
+# Load/store exclusive
+#------------------------------------------------------------------------------
+
+stxrb w18, w8, [sp]
+stxrh w24, w15, [x16]
+stxr w5, w6, [x17]
+stxr w1, x10, [x21]
+ldxrb w30, [x0]
+ldxrh w17, [x4]
+ldxr w22, [sp]
+ldxr x11, [x29]
+ldxr x11, [x29]
+ldxr x11, [x29]
+stxp w12, w11, w10, [sp]
+stxp wzr, x27, x9, [x12]
+ldxp w0, wzr, [sp]
+ldxp x17, x0, [x18]
+ldxp x17, x0, [x18]
+stlxrb w12, w22, [x0]
+stlxrh w10, w1, [x1]
+stlxr w9, w2, [x2]
+stlxr w9, x3, [sp]
+ldaxrb w8, [x4]
+ldaxrh w7, [x5]
+ldaxr w6, [sp]
+ldaxr x5, [x6]
+ldaxr x5, [x6]
+ldaxr x5, [x6]
+stlxp w4, w5, w6, [sp]
+stlxp wzr, x6, x7, [x1]
+ldaxp w5, w18, [sp]
+ldaxp x6, x19, [x22]
+ldaxp x6, x19, [x22]
+stlrb w24, [sp]
+stlrh w25, [x30]
+stlr w26, [x29]
+stlr x27, [x28]
+stlr x27, [x28]
+stlr x27, [x28]
+ldarb w23, [sp]
+ldarh w22, [x30]
+ldar wzr, [x29]
+ldar x21, [x28]
+ldar x21, [x28]
+ldar x21, [x28]
+
+#------------------------------------------------------------------------------
+# Load/store (unscaled immediate)
+#------------------------------------------------------------------------------
+
+sturb w9, [sp]
+sturh wzr, [x12, #255]
+stur w16, [x0, #-256]
+stur x28, [x14, #1]
+ldurb w1, [x20, #255]
+ldurh w20, [x1, #255]
+ldur w12, [sp, #255]
+ldur xzr, [x12, #255]
+ldursb x9, [x7, #-256]
+ldursh x17, [x19, #-256]
+ldursw x20, [x15, #-256]
+prfum pldl2keep, [sp, #-256]
+ldursb w19, [x1, #-256]
+ldursh w15, [x21, #-256]
+stur b0, [sp, #1]
+stur h12, [x12, #-1]
+stur s15, [x0, #255]
+stur d31, [x5, #25]
+stur q9, [x5]
+ldur b3, [sp]
+ldur h5, [x4, #-256]
+ldur s7, [x12, #-1]
+ldur d11, [x19, #4]
+ldur q13, [x1, #2]
+
+#------------------------------------------------------------------------------
+# Load/store (immediate post-indexed)
+#------------------------------------------------------------------------------
+
+strb w9, [x2], #255
+strb w10, [x3], #1
+strb w10, [x3], #-256
+strh w9, [x2], #255
+strh w9, [x2], #1
+strh w10, [x3], #-256
+str w19, [sp], #255
+str w20, [x30], #1
+str w21, [x12], #-256
+str xzr, [x9], #255
+str x2, [x3], #1
+str x19, [x12], #-256
+ldrb w9, [x2], #255
+ldrb w10, [x3], #1
+ldrb w10, [x3], #-256
+ldrh w9, [x2], #255
+ldrh w9, [x2], #1
+ldrh w10, [x3], #-256
+ldr w19, [sp], #255
+ldr w20, [x30], #1
+ldr w21, [x12], #-256
+ldr xzr, [x9], #255
+ldr x2, [x3], #1
+ldr x19, [x12], #-256
+ldrsb xzr, [x9], #255
+ldrsb x2, [x3], #1
+ldrsb x19, [x12], #-256
+ldrsh xzr, [x9], #255
+ldrsh x2, [x3], #1
+ldrsh x19, [x12], #-256
+ldrsw xzr, [x9], #255
+ldrsw x2, [x3], #1
+ldrsw x19, [x12], #-256
+ldrsb wzr, [x9], #255
+ldrsb w2, [x3], #1
+ldrsb w19, [x12], #-256
+ldrsh wzr, [x9], #255
+ldrsh w2, [x3], #1
+ldrsh w19, [x12], #-256
+str b0, [x0], #255
+str b3, [x3], #1
+str b5, [sp], #-256
+str h10, [x10], #255
+str h13, [x23], #1
+str h15, [sp], #-256
+str s20, [x20], #255
+str s23, [x23], #1
+str s25, [x0], #-256
+str d20, [x20], #255
+str d23, [x23], #1
+str d25, [x0], #-256
+ldr b0, [x0], #255
+ldr b3, [x3], #1
+ldr b5, [sp], #-256
+ldr h10, [x10], #255
+ldr h13, [x23], #1
+ldr h15, [sp], #-256
+ldr s20, [x20], #255
+ldr s23, [x23], #1
+ldr s25, [x0], #-256
+ldr d20, [x20], #255
+ldr d23, [x23], #1
+ldr d25, [x0], #-256
+ldr q20, [x1], #255
+ldr q23, [x9], #1
+ldr q25, [x20], #-256
+str q10, [x1], #255
+str q22, [sp], #1
+str q21, [x20], #-256
+
+#-------------------------------------------------------------------------------
+# Load-store register (immediate pre-indexed)
+#-------------------------------------------------------------------------------
+
+ldr x3, [x4, #0]!
+strb w9, [x2, #255]!
+strb w10, [x3, #1]!
+strb w10, [x3, #-256]!
+strh w9, [x2, #255]!
+strh w9, [x2, #1]!
+strh w10, [x3, #-256]!
+str w19, [sp, #255]!
+str w20, [x30, #1]!
+str w21, [x12, #-256]!
+str xzr, [x9, #255]!
+str x2, [x3, #1]!
+str x19, [x12, #-256]!
+ldrb w9, [x2, #255]!
+ldrb w10, [x3, #1]!
+ldrb w10, [x3, #-256]!
+ldrh w9, [x2, #255]!
+ldrh w9, [x2, #1]!
+ldrh w10, [x3, #-256]!
+ldr w19, [sp, #255]!
+ldr w20, [x30, #1]!
+ldr w21, [x12, #-256]!
+ldr xzr, [x9, #255]!
+ldr x2, [x3, #1]!
+ldr x19, [x12, #-256]!
+ldrsb xzr, [x9, #255]!
+ldrsb x2, [x3, #1]!
+ldrsb x19, [x12, #-256]!
+ldrsh xzr, [x9, #255]!
+ldrsh x2, [x3, #1]!
+ldrsh x19, [x12, #-256]!
+ldrsw xzr, [x9, #255]!
+ldrsw x2, [x3, #1]!
+ldrsw x19, [x12, #-256]!
+ldrsb wzr, [x9, #255]!
+ldrsb w2, [x3, #1]!
+ldrsb w19, [x12, #-256]!
+ldrsh wzr, [x9, #255]!
+ldrsh w2, [x3, #1]!
+ldrsh w19, [x12, #-256]!
+str b0, [x0, #255]!
+str b3, [x3, #1]!
+str b5, [sp, #-256]!
+str h10, [x10, #255]!
+str h13, [x23, #1]!
+str h15, [sp, #-256]!
+str s20, [x20, #255]!
+str s23, [x23, #1]!
+str s25, [x0, #-256]!
+str d20, [x20, #255]!
+str d23, [x23, #1]!
+str d25, [x0, #-256]!
+ldr b0, [x0, #255]!
+ldr b3, [x3, #1]!
+ldr b5, [sp, #-256]!
+ldr h10, [x10, #255]!
+ldr h13, [x23, #1]!
+ldr h15, [sp, #-256]!
+ldr s20, [x20, #255]!
+ldr s23, [x23, #1]!
+ldr s25, [x0, #-256]!
+ldr d20, [x20, #255]!
+ldr d23, [x23, #1]!
+ldr d25, [x0, #-256]!
+ldr q20, [x1, #255]!
+ldr q23, [x9, #1]!
+ldr q25, [x20, #-256]!
+str q10, [x1, #255]!
+str q22, [sp, #1]!
+str q21, [x20, #-256]!
+
+#------------------------------------------------------------------------------
+# Load/store (unprivileged)
+#------------------------------------------------------------------------------
+
+sttrb w9, [sp]
+sttrh wzr, [x12, #255]
+sttr w16, [x0, #-256]
+sttr x28, [x14, #1]
+ldtrb w1, [x20, #255]
+ldtrh w20, [x1, #255]
+ldtr w12, [sp, #255]
+ldtr xzr, [x12, #255]
+ldtrsb x9, [x7, #-256]
+ldtrsh x17, [x19, #-256]
+ldtrsw x20, [x15, #-256]
+ldtrsb w19, [x1, #-256]
+ldtrsh w15, [x21, #-256]
+
+#------------------------------------------------------------------------------
+# Load/store (unsigned immediate)
+#------------------------------------------------------------------------------
+
+ldr x4, [x29]
+ldr x30, [x12, #32760]
+ldr x20, [sp, #8]
+ldr xzr, [sp]
+ldr w2, [sp]
+ldr w17, [sp, #16380]
+ldr w13, [x2, #4]
+ldrsw x2, [x5, #4]
+ldrsw x23, [sp, #16380]
+ldrh w2, [x4]
+ldrsh w23, [x6, #8190]
+ldrsh wzr, [sp, #2]
+ldrsh x29, [x2, #2]
+ldrb w26, [x3, #121]
+ldrb w12, [x2]
+ldrsb w27, [sp, #4095]
+ldrsb xzr, [x15]
+str x30, [sp]
+str w20, [x4, #16380]
+strh w17, [sp, #8190]
+strb w23, [x3, #4095]
+strb wzr, [x2]
+ldr b31, [sp, #4095]
+ldr h20, [x2, #8190]
+ldr s10, [x19, #16380]
+ldr d3, [x10, #32760]
+str q12, [sp, #65520]
+
+#------------------------------------------------------------------------------
+# Load/store (register offset)
+#------------------------------------------------------------------------------
+
+ldrb w3, [sp, x5]
+ldrb w9, [x27, x6]
+ldrsb w10, [x30, x7]
+ldrb w11, [x29, x3, sxtx]
+strb w12, [x28, xzr, sxtx]
+ldrb w14, [x26, w6, uxtw]
+ldrsb w15, [x25, w7, uxtw]
+ldrb w17, [x23, w9, sxtw]
+ldrsb x18, [x22, w10, sxtw]
+ldrsh w3, [sp, x5]
+ldrsh w9, [x27, x6]
+ldrh w10, [x30, x7, lsl #1]
+strh w11, [x29, x3, sxtx]
+ldrh w12, [x28, xzr, sxtx]
+ldrsh x13, [x27, x5, sxtx #1]
+ldrh w14, [x26, w6, uxtw]
+ldrh w15, [x25, w7, uxtw]
+ldrsh w16, [x24, w8, uxtw #1]
+ldrh w17, [x23, w9, sxtw]
+ldrh w18, [x22, w10, sxtw]
+strh w19, [x21, wzr, sxtw #1]
+ldr w3, [sp, x5]
+ldr s9, [x27, x6]
+ldr w10, [x30, x7, lsl #2]
+ldr w11, [x29, x3, sxtx]
+str s12, [x28, xzr, sxtx]
+str w13, [x27, x5, sxtx #2]
+str w14, [x26, w6, uxtw]
+ldr w15, [x25, w7, uxtw]
+ldr w16, [x24, w8, uxtw #2]
+ldrsw x17, [x23, w9, sxtw]
+ldr w18, [x22, w10, sxtw]
+ldrsw x19, [x21, wzr, sxtw #2]
+ldr x3, [sp, x5]
+str x9, [x27, x6]
+ldr d10, [x30, x7, lsl #3]
+str x11, [x29, x3, sxtx]
+ldr x12, [x28, xzr, sxtx]
+ldr x13, [x27, x5, sxtx #3]
+prfm pldl1keep, [x26, w6, uxtw]
+ldr x15, [x25, w7, uxtw]
+ldr x16, [x24, w8, uxtw #3]
+ldr x17, [x23, w9, sxtw]
+ldr x18, [x22, w10, sxtw]
+str d19, [x21, wzr, sxtw #3]
+ldr q3, [sp, x5]
+ldr q9, [x27, x6]
+ldr q10, [x30, x7, lsl #4]
+str q11, [x29, x3, sxtx]
+str q12, [x28, xzr, sxtx]
+str q13, [x27, x5, sxtx #4]
+ldr q14, [x26, w6, uxtw]
+ldr q15, [x25, w7, uxtw]
+ldr q16, [x24, w8, uxtw #4]
+ldr q17, [x23, w9, sxtw]
+str q18, [x22, w10, sxtw]
+ldr q19, [x21, wzr, sxtw #4]
+
+#------------------------------------------------------------------------------
+# Load/store register pair (offset)
+#------------------------------------------------------------------------------
+
+ldp w3, w5, [sp]
+stp wzr, w9, [sp, #252]
+ldp w2, wzr, [sp, #-256]
+ldp w9, w10, [sp, #4]
+ldpsw x9, x10, [sp, #4]
+ldpsw x9, x10, [x2, #-256]
+ldpsw x20, x30, [sp, #252]
+ldp x21, x29, [x2, #504]
+ldp x22, x23, [x3, #-512]
+ldp x24, x25, [x4, #8]
+ldp s29, s28, [sp, #252]
+stp s27, s26, [sp, #-256]
+ldp s1, s2, [x3, #44]
+stp d3, d5, [x9, #504]
+stp d7, d11, [x10, #-512]
+ldp d2, d3, [x30, #-8]
+stp q3, q5, [sp]
+stp q17, q19, [sp, #1008]
+ldp q23, q29, [x1, #-1024]
+
+#------------------------------------------------------------------------------
+# Load/store register pair (post-indexed)
+#------------------------------------------------------------------------------
+
+ldp w3, w5, [sp], #0
+stp wzr, w9, [sp], #252
+ldp w2, wzr, [sp], #-256
+ldp w9, w10, [sp], #4
+ldpsw x9, x10, [sp], #4
+ldpsw x9, x10, [x2], #-256
+ldpsw x20, x30, [sp], #252
+ldp x21, x29, [x2], #504
+ldp x22, x23, [x3], #-512
+ldp x24, x25, [x4], #8
+ldp s29, s28, [sp], #252
+stp s27, s26, [sp], #-256
+ldp s1, s2, [x3], #44
+stp d3, d5, [x9], #504
+stp d7, d11, [x10], #-512
+ldp d2, d3, [x30], #-8
+stp q3, q5, [sp], #0
+stp q17, q19, [sp], #1008
+ldp q23, q29, [x1], #-1024
+
+#------------------------------------------------------------------------------
+# Load/store register pair (pre-indexed)
+#------------------------------------------------------------------------------
+
+ldp w3, w5, [sp, #0]!
+stp wzr, w9, [sp, #252]!
+ldp w2, wzr, [sp, #-256]!
+ldp w9, w10, [sp, #4]!
+ldpsw x9, x10, [sp, #4]!
+ldpsw x9, x10, [x2, #-256]!
+ldpsw x20, x30, [sp, #252]!
+ldp x21, x29, [x2, #504]!
+ldp x22, x23, [x3, #-512]!
+ldp x24, x25, [x4, #8]!
+ldp s29, s28, [sp, #252]!
+stp s27, s26, [sp, #-256]!
+ldp s1, s2, [x3, #44]!
+stp d3, d5, [x9, #504]!
+stp d7, d11, [x10, #-512]!
+ldp d2, d3, [x30, #-8]!
+stp q3, q5, [sp, #0]!
+stp q17, q19, [sp, #1008]!
+ldp q23, q29, [x1, #-1024]!
+
+#------------------------------------------------------------------------------
+# Load/store register pair (offset)
+#------------------------------------------------------------------------------
+
+ldnp w3, w5, [sp]
+stnp wzr, w9, [sp, #252]
+ldnp w2, wzr, [sp, #-256]
+ldnp w9, w10, [sp, #4]
+ldnp x21, x29, [x2, #504]
+ldnp x22, x23, [x3, #-512]
+ldnp x24, x25, [x4, #8]
+ldnp s29, s28, [sp, #252]
+stnp s27, s26, [sp, #-256]
+ldnp s1, s2, [x3, #44]
+stnp d3, d5, [x9, #504]
+stnp d7, d11, [x10, #-512]
+ldnp d2, d3, [x30, #-8]
+stnp q3, q5, [sp]
+stnp q17, q19, [sp, #1008]
+ldnp q23, q29, [x1, #-1024]
+
+#------------------------------------------------------------------------------
+# Logical (immediate)
+#------------------------------------------------------------------------------
+
+mov w3, #983055
+mov x10, #-6148914691236517206
+
+#------------------------------------------------------------------------------
+# Logical (shifted register)
+#------------------------------------------------------------------------------
+
+and w12, w23, w21
+and w16, w15, w1, lsl #1
+and w9, w4, w10, lsl #31
+and w3, w30, w11
+and x3, x5, x7, lsl #63
+and x5, x14, x19, asr #4
+and w3, w17, w19, ror #31
+and w0, w2, wzr, lsr #17
+and w3, w30, w11, asr #2
+and xzr, x4, x26
+and w3, wzr, w20, ror #2
+and x7, x20, xzr, asr #63
+bic x13, x20, x14, lsl #47
+bic w2, w7, w9
+orr w2, w7, w0, asr #31
+orr x8, x9, x10, lsl #12
+orn x3, x5, x7, asr #2
+orn w2, w5, w29
+ands w7, wzr, w9, lsl #1
+ands x3, x5, x20, ror #63
+bics w3, w5, w7
+bics x3, xzr, x3, lsl #1
+tst w3, w7, lsl #31
+tst x2, x20, asr #2
+mov x3, x6
+mov x3, xzr
+mov wzr, w2
+mov w3, w5
+
+#------------------------------------------------------------------------------
+# Move wide (immediate)
+#------------------------------------------------------------------------------
+
+movz w2, #0, lsl #16
+mov w2, #-1235
+mov x2, #5299989643264
+mov x2, #0
+movk w3, #0
+movz x4, #0, lsl #16
+movk w5, #0, lsl #16
+movz x6, #0, lsl #32
+movk x7, #0, lsl #32
+movz x8, #0, lsl #48
+movk x9, #0, lsl #48
+
+#------------------------------------------------------------------------------
+# PC-relative addressing
+#------------------------------------------------------------------------------
+
+adr x2, #1600
+adrp x21, #6553600
+adr x0, #262144
+
+#------------------------------------------------------------------------------
+# Test and branch (immediate)
+#------------------------------------------------------------------------------
+
+tbz x12, #62, #0
+tbz x12, #62, #4
+tbz x12, #62, #-32768
+tbnz x12, #60, #32764
+
+#------------------------------------------------------------------------------
+# Unconditional branch (immediate)
+#------------------------------------------------------------------------------
+
+b #4
+b #-4
+b #134217724
+
+#------------------------------------------------------------------------------
+# Unconditional branch (register)
+#------------------------------------------------------------------------------
+
+br x20
+blr xzr
+ret x10
+ret
+eret
+drps
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 1 0.25 add w2, w3, #4095
+# CHECK-NEXT: 1 1 0.25 add w30, w29, #1, lsl #12
+# CHECK-NEXT: 1 1 0.25 add w13, w5, #4095, lsl #12
+# CHECK-NEXT: 1 1 0.25 add x5, x7, #1638
+# CHECK-NEXT: 1 1 0.25 add w20, wsp, #801
+# CHECK-NEXT: 1 1 0.25 add wsp, wsp, #1104
+# CHECK-NEXT: 1 1 0.25 add wsp, w30, #4084
+# CHECK-NEXT: 1 1 0.25 add x0, x24, #291
+# CHECK-NEXT: 1 1 0.25 add x3, x24, #4095, lsl #12
+# CHECK-NEXT: 1 1 0.25 add x8, sp, #1074
+# CHECK-NEXT: 1 1 0.25 add sp, x29, #3816
+# CHECK-NEXT: 1 1 0.25 sub w0, wsp, #4077
+# CHECK-NEXT: 1 1 0.25 sub w4, w20, #546, lsl #12
+# CHECK-NEXT: 1 1 0.25 sub sp, sp, #288
+# CHECK-NEXT: 1 1 0.25 sub wsp, w19, #16
+# CHECK-NEXT: 1 1 0.25 adds w13, w23, #291, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmn w2, #4095
+# CHECK-NEXT: 1 1 0.25 adds w20, wsp, #0
+# CHECK-NEXT: 1 1 0.25 cmn x3, #1, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmp sp, #20, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmp x30, #4095
+# CHECK-NEXT: 1 1 0.25 subs x4, sp, #3822
+# CHECK-NEXT: 1 1 0.25 cmn w3, #291, lsl #12
+# CHECK-NEXT: 1 1 0.25 cmn wsp, #1365
+# CHECK-NEXT: 1 1 0.25 cmn sp, #1092, lsl #12
+# CHECK-NEXT: 1 1 0.25 mov sp, x30
+# CHECK-NEXT: 1 1 0.25 mov wsp, w20
+# CHECK-NEXT: 1 1 0.25 mov x11, sp
+# CHECK-NEXT: 1 1 0.25 mov w24, wsp
+# CHECK-NEXT: 1 1 0.25 add w3, w5, w7
+# CHECK-NEXT: 1 1 0.25 add wzr, w3, w5
+# CHECK-NEXT: 1 1 0.25 add w20, wzr, w4
+# CHECK-NEXT: 1 1 0.25 add w4, w6, wzr
+# CHECK-NEXT: 1 1 0.25 add w11, w13, w15
+# CHECK-NEXT: 1 1 0.25 add w9, w3, wzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 add w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.25 add w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 1 0.25 add w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 1 0.25 add w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.25 add w2, w3, w4, asr #0
+# CHECK-NEXT: 1 1 0.25 add w5, w6, w7, asr #21
+# CHECK-NEXT: 1 1 0.25 add w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.25 add x3, x5, x7
+# CHECK-NEXT: 1 1 0.25 add xzr, x3, x5
+# CHECK-NEXT: 1 1 0.25 add x20, xzr, x4
+# CHECK-NEXT: 1 1 0.25 add x4, x6, xzr
+# CHECK-NEXT: 1 1 0.25 add x11, x13, x15
+# CHECK-NEXT: 1 1 0.25 add x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 add x17, x29, x20, lsl #63
+# CHECK-NEXT: 1 1 0.25 add x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 1 0.25 add x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 1 0.25 add x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.25 add x2, x3, x4, asr #0
+# CHECK-NEXT: 1 1 0.25 add x5, x6, x7, asr #21
+# CHECK-NEXT: 1 1 0.25 add x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.25 adds w3, w5, w7
+# CHECK-NEXT: 1 1 0.25 cmn w3, w5
+# CHECK-NEXT: 1 1 0.25 adds w20, wzr, w4
+# CHECK-NEXT: 1 1 0.25 adds w4, w6, wzr
+# CHECK-NEXT: 1 1 0.25 adds w11, w13, w15
+# CHECK-NEXT: 1 1 0.25 adds w9, w3, wzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 adds w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.25 adds w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 1 0.25 adds w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 1 0.25 adds w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.25 adds w2, w3, w4, asr #0
+# CHECK-NEXT: 1 1 0.25 adds w5, w6, w7, asr #21
+# CHECK-NEXT: 1 1 0.25 adds w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.25 adds x3, x5, x7
+# CHECK-NEXT: 1 1 0.25 cmn x3, x5
+# CHECK-NEXT: 1 1 0.25 adds x20, xzr, x4
+# CHECK-NEXT: 1 1 0.25 adds x4, x6, xzr
+# CHECK-NEXT: 1 1 0.25 adds x11, x13, x15
+# CHECK-NEXT: 1 1 0.25 adds x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 adds x17, x29, x20, lsl #63
+# CHECK-NEXT: 1 1 0.25 adds x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 1 0.25 adds x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 1 0.25 adds x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.25 adds x2, x3, x4, asr #0
+# CHECK-NEXT: 1 1 0.25 adds x5, x6, x7, asr #21
+# CHECK-NEXT: 1 1 0.25 adds x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.25 sub w3, w5, w7
+# CHECK-NEXT: 1 1 0.25 sub wzr, w3, w5
+# CHECK-NEXT: 1 1 0.25 sub w4, w6, wzr
+# CHECK-NEXT: 1 1 0.25 sub w11, w13, w15
+# CHECK-NEXT: 1 1 0.25 sub w9, w3, wzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 sub w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.25 sub w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 1 0.25 sub w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 1 0.25 sub w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.25 sub w2, w3, w4, asr #0
+# CHECK-NEXT: 1 1 0.25 sub w5, w6, w7, asr #21
+# CHECK-NEXT: 1 1 0.25 sub w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.25 sub x3, x5, x7
+# CHECK-NEXT: 1 1 0.25 sub xzr, x3, x5
+# CHECK-NEXT: 1 1 0.25 sub x4, x6, xzr
+# CHECK-NEXT: 1 1 0.25 sub x11, x13, x15
+# CHECK-NEXT: 1 1 0.25 sub x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 sub x17, x29, x20, lsl #63
+# CHECK-NEXT: 1 1 0.25 sub x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 1 0.25 sub x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 1 0.25 sub x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.25 sub x2, x3, x4, asr #0
+# CHECK-NEXT: 1 1 0.25 sub x5, x6, x7, asr #21
+# CHECK-NEXT: 1 1 0.25 sub x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.25 subs w3, w5, w7
+# CHECK-NEXT: 1 1 0.25 cmp w3, w5
+# CHECK-NEXT: 1 1 0.25 subs w4, w6, wzr
+# CHECK-NEXT: 1 1 0.25 subs w11, w13, w15
+# CHECK-NEXT: 1 1 0.25 subs w9, w3, wzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 subs w17, w29, w20, lsl #31
+# CHECK-NEXT: 1 1 0.25 subs w21, w22, w23, lsr #0
+# CHECK-NEXT: 1 1 0.25 subs w24, w25, w26, lsr #18
+# CHECK-NEXT: 1 1 0.25 subs w27, w28, w29, lsr #31
+# CHECK-NEXT: 1 1 0.25 subs w2, w3, w4, asr #0
+# CHECK-NEXT: 1 1 0.25 subs w5, w6, w7, asr #21
+# CHECK-NEXT: 1 1 0.25 subs w8, w9, w10, asr #31
+# CHECK-NEXT: 1 1 0.25 subs x3, x5, x7
+# CHECK-NEXT: 1 1 0.25 cmp x3, x5
+# CHECK-NEXT: 1 1 0.25 subs x4, x6, xzr
+# CHECK-NEXT: 1 1 0.25 subs x11, x13, x15
+# CHECK-NEXT: 1 1 0.25 subs x9, x3, xzr, lsl #10
+# CHECK-NEXT: 1 1 0.25 subs x17, x29, x20, lsl #63
+# CHECK-NEXT: 1 1 0.25 subs x21, x22, x23, lsr #0
+# CHECK-NEXT: 1 1 0.25 subs x24, x25, x26, lsr #18
+# CHECK-NEXT: 1 1 0.25 subs x27, x28, x29, lsr #63
+# CHECK-NEXT: 1 1 0.25 subs x2, x3, x4, asr #0
+# CHECK-NEXT: 1 1 0.25 subs x5, x6, x7, asr #21
+# CHECK-NEXT: 1 1 0.25 subs x8, x9, x10, asr #63
+# CHECK-NEXT: 1 1 0.25 cmn wzr, w4
+# CHECK-NEXT: 1 1 0.25 cmn w5, wzr
+# CHECK-NEXT: 1 1 0.25 cmn w6, w7
+# CHECK-NEXT: 1 1 0.25 cmn w8, w9, lsl #15
+# CHECK-NEXT: 1 1 0.25 cmn w10, w11, lsl #31
+# CHECK-NEXT: 1 1 0.25 cmn w12, w13, lsr #0
+# CHECK-NEXT: 1 1 0.25 cmn w14, w15, lsr #21
+# CHECK-NEXT: 1 1 0.25 cmn w16, w17, lsr #31
+# CHECK-NEXT: 1 1 0.25 cmn w18, w19, asr #0
+# CHECK-NEXT: 1 1 0.25 cmn w20, w21, asr #22
+# CHECK-NEXT: 1 1 0.25 cmn w22, w23, asr #31
+# CHECK-NEXT: 1 1 0.25 cmn x0, x3
+# CHECK-NEXT: 1 1 0.25 cmn xzr, x4
+# CHECK-NEXT: 1 1 0.25 cmn x5, xzr
+# CHECK-NEXT: 1 1 0.25 cmn x6, x7
+# CHECK-NEXT: 1 1 0.25 cmn x8, x9, lsl #15
+# CHECK-NEXT: 1 1 0.25 cmn x10, x11, lsl #63
+# CHECK-NEXT: 1 1 0.25 cmn x12, x13, lsr #0
+# CHECK-NEXT: 1 1 0.25 cmn x14, x15, lsr #41
+# CHECK-NEXT: 1 1 0.25 cmn x16, x17, lsr #63
+# CHECK-NEXT: 1 1 0.25 cmn x18, x19, asr #0
+# CHECK-NEXT: 1 1 0.25 cmn x20, x21, asr #55
+# CHECK-NEXT: 1 1 0.25 cmn x22, x23, asr #63
+# CHECK-NEXT: 1 1 0.25 cmp w0, w3
+# CHECK-NEXT: 1 1 0.25 cmp wzr, w4
+# CHECK-NEXT: 1 1 0.25 cmp w5, wzr
+# CHECK-NEXT: 1 1 0.25 cmp w6, w7
+# CHECK-NEXT: 1 1 0.25 cmp w8, w9, lsl #15
+# CHECK-NEXT: 1 1 0.25 cmp w10, w11, lsl #31
+# CHECK-NEXT: 1 1 0.25 cmp w12, w13, lsr #0
+# CHECK-NEXT: 1 1 0.25 cmp w14, w15, lsr #21
+# CHECK-NEXT: 1 1 0.25 cmp w18, w19, asr #0
+# CHECK-NEXT: 1 1 0.25 cmp w20, w21, asr #22
+# CHECK-NEXT: 1 1 0.25 cmp w22, w23, asr #31
+# CHECK-NEXT: 1 1 0.25 cmp x0, x3
+# CHECK-NEXT: 1 1 0.25 cmp xzr, x4
+# CHECK-NEXT: 1 1 0.25 cmp x5, xzr
+# CHECK-NEXT: 1 1 0.25 cmp x6, x7
+# CHECK-NEXT: 1 1 0.25 cmp x8, x9, lsl #15
+# CHECK-NEXT: 1 1 0.25 cmp x10, x11, lsl #63
+# CHECK-NEXT: 1 1 0.25 cmp x12, x13, lsr #0
+# CHECK-NEXT: 1 1 0.25 cmp x14, x15, lsr #41
+# CHECK-NEXT: 1 1 0.25 cmp x16, x17, lsr #63
+# CHECK-NEXT: 1 1 0.25 cmp x18, x19, asr #0
+# CHECK-NEXT: 1 1 0.25 cmp x20, x21, asr #55
+# CHECK-NEXT: 1 1 0.25 cmp x22, x23, asr #63
+# CHECK-NEXT: 1 1 0.25 cmp wzr, w0
+# CHECK-NEXT: 1 1 0.25 cmp xzr, x0
+# CHECK-NEXT: 1 1 0.25 adc w29, w27, w25
+# CHECK-NEXT: 1 1 0.25 adc wzr, w3, w4
+# CHECK-NEXT: 1 1 0.25 adc w9, wzr, w10
+# CHECK-NEXT: 1 1 0.25 adc w20, w0, wzr
+# CHECK-NEXT: 1 1 0.25 adc x29, x27, x25
+# CHECK-NEXT: 1 1 0.25 adc xzr, x3, x4
+# CHECK-NEXT: 1 1 0.25 adc x9, xzr, x10
+# CHECK-NEXT: 1 1 0.25 adc x20, x0, xzr
+# CHECK-NEXT: 1 1 0.25 adcs w29, w27, w25
+# CHECK-NEXT: 1 1 0.25 adcs wzr, w3, w4
+# CHECK-NEXT: 1 1 0.25 adcs w9, wzr, w10
+# CHECK-NEXT: 1 1 0.25 adcs w20, w0, wzr
+# CHECK-NEXT: 1 1 0.25 adcs x29, x27, x25
+# CHECK-NEXT: 1 1 0.25 adcs xzr, x3, x4
+# CHECK-NEXT: 1 1 0.25 adcs x9, xzr, x10
+# CHECK-NEXT: 1 1 0.25 adcs x20, x0, xzr
+# CHECK-NEXT: 1 1 0.25 sbc w29, w27, w25
+# CHECK-NEXT: 1 1 0.25 sbc wzr, w3, w4
+# CHECK-NEXT: 1 1 0.25 ngc w9, w10
+# CHECK-NEXT: 1 1 0.25 sbc w20, w0, wzr
+# CHECK-NEXT: 1 1 0.25 sbc x29, x27, x25
+# CHECK-NEXT: 1 1 0.25 sbc xzr, x3, x4
+# CHECK-NEXT: 1 1 0.25 ngc x9, x10
+# CHECK-NEXT: 1 1 0.25 sbc x20, x0, xzr
+# CHECK-NEXT: 1 1 0.25 sbcs w29, w27, w25
+# CHECK-NEXT: 1 1 0.25 sbcs wzr, w3, w4
+# CHECK-NEXT: 1 1 0.25 ngcs w9, w10
+# CHECK-NEXT: 1 1 0.25 sbcs w20, w0, wzr
+# CHECK-NEXT: 1 1 0.25 sbcs x29, x27, x25
+# CHECK-NEXT: 1 1 0.25 sbcs xzr, x3, x4
+# CHECK-NEXT: 1 1 0.25 ngcs x9, x10
+# CHECK-NEXT: 1 1 0.25 sbcs x20, x0, xzr
+# CHECK-NEXT: 1 1 0.25 ngc w3, w12
+# CHECK-NEXT: 1 1 0.25 ngc wzr, w9
+# CHECK-NEXT: 1 1 0.25 ngc w23, wzr
+# CHECK-NEXT: 1 1 0.25 ngc x29, x30
+# CHECK-NEXT: 1 1 0.25 ngc xzr, x0
+# CHECK-NEXT: 1 1 0.25 ngc x0, xzr
+# CHECK-NEXT: 1 1 0.25 ngcs w3, w12
+# CHECK-NEXT: 1 1 0.25 ngcs wzr, w9
+# CHECK-NEXT: 1 1 0.25 ngcs w23, wzr
+# CHECK-NEXT: 1 1 0.25 ngcs x29, x30
+# CHECK-NEXT: 1 1 0.25 ngcs xzr, x0
+# CHECK-NEXT: 1 1 0.25 ngcs x0, xzr
+# CHECK-NEXT: 1 1 0.50 sbfx x1, x2, #3, #2
+# CHECK-NEXT: 1 1 0.50 asr x3, x4, #63
+# CHECK-NEXT: 1 1 0.50 asr wzr, wzr, #31
+# CHECK-NEXT: 1 1 0.50 sbfx w12, w9, #0, #1
+# CHECK-NEXT: 1 1 0.50 ubfiz x4, x5, #52, #11
+# CHECK-NEXT: 1 1 0.50 ubfx xzr, x4, #0, #1
+# CHECK-NEXT: 1 1 0.50 ubfiz x4, xzr, #1, #6
+# CHECK-NEXT: 1 1 0.50 lsr x5, x6, #12
+# CHECK-NEXT: 4 4 0.50 bfi x4, x5, #52, #11
+# CHECK-NEXT: 4 4 0.50 bfxil xzr, x4, #0, #1
+# CHECK-NEXT: 4 4 0.50 bfc x4, #1, #6
+# CHECK-NEXT: 4 4 0.50 bfxil x5, x6, #12, #52
+# CHECK-NEXT: 1 1 0.50 sxtb w1, w2
+# CHECK-NEXT: 1 1 0.50 sxtb xzr, w3
+# CHECK-NEXT: 1 1 0.50 sxth w9, w10
+# CHECK-NEXT: 1 1 0.50 sxth x0, w1
+# CHECK-NEXT: 1 1 0.50 sxtw x3, w30
+# CHECK-NEXT: 1 1 0.50 uxtb w1, w2
+# CHECK-NEXT: 1 1 0.50 uxth w9, w10
+# CHECK-NEXT: 1 1 0.50 ubfx x3, x30, #0, #32
+# CHECK-NEXT: 1 1 0.50 asr w3, w2, #0
+# CHECK-NEXT: 1 1 0.50 asr w9, w10, #31
+# CHECK-NEXT: 1 1 0.50 asr x20, x21, #63
+# CHECK-NEXT: 1 1 0.50 asr w1, wzr, #3
+# CHECK-NEXT: 1 1 0.50 lsr w3, w2, #0
+# CHECK-NEXT: 1 1 0.50 lsr w9, w10, #31
+# CHECK-NEXT: 1 1 0.50 lsr x20, x21, #63
+# CHECK-NEXT: 1 1 0.50 lsr wzr, wzr, #3
+# CHECK-NEXT: 1 1 0.50 lsr w3, w2, #0
+# CHECK-NEXT: 1 1 0.50 lsl w9, w10, #31
+# CHECK-NEXT: 1 1 0.50 lsl x20, x21, #63
+# CHECK-NEXT: 1 1 0.50 lsl w1, wzr, #3
+# CHECK-NEXT: 1 1 0.50 sbfx w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 sbfiz x2, x3, #63, #1
+# CHECK-NEXT: 1 1 0.50 asr x19, x20, #0
+# CHECK-NEXT: 1 1 0.50 sbfiz x9, x10, #5, #59
+# CHECK-NEXT: 1 1 0.50 asr w9, w10, #0
+# CHECK-NEXT: 1 1 0.50 sbfiz w11, w12, #31, #1
+# CHECK-NEXT: 1 1 0.50 sbfiz w13, w14, #29, #3
+# CHECK-NEXT: 1 1 0.50 sbfiz xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 sbfx w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 asr x2, x3, #63
+# CHECK-NEXT: 1 1 0.50 asr x19, x20, #0
+# CHECK-NEXT: 1 1 0.50 asr x9, x10, #5
+# CHECK-NEXT: 1 1 0.50 asr w9, w10, #0
+# CHECK-NEXT: 1 1 0.50 asr w11, w12, #31
+# CHECK-NEXT: 1 1 0.50 asr w13, w14, #29
+# CHECK-NEXT: 1 1 0.50 sbfx xzr, xzr, #10, #11
+# CHECK-NEXT: 4 4 0.50 bfxil w9, w10, #0, #1
+# CHECK-NEXT: 4 4 0.50 bfi x2, x3, #63, #1
+# CHECK-NEXT: 4 4 0.50 bfxil x19, x20, #0, #64
+# CHECK-NEXT: 4 4 0.50 bfi x9, x10, #5, #59
+# CHECK-NEXT: 4 4 0.50 bfxil w9, w10, #0, #32
+# CHECK-NEXT: 4 4 0.50 bfi w11, w12, #31, #1
+# CHECK-NEXT: 4 4 0.50 bfi w13, w14, #29, #3
+# CHECK-NEXT: 4 4 0.50 bfc xzr, #10, #11
+# CHECK-NEXT: 4 4 0.50 bfxil w9, w10, #0, #1
+# CHECK-NEXT: 4 4 0.50 bfxil x2, x3, #63, #1
+# CHECK-NEXT: 4 4 0.50 bfxil x19, x20, #0, #64
+# CHECK-NEXT: 4 4 0.50 bfxil x9, x10, #5, #59
+# CHECK-NEXT: 4 4 0.50 bfxil w9, w10, #0, #32
+# CHECK-NEXT: 4 4 0.50 bfxil w11, w12, #31, #1
+# CHECK-NEXT: 4 4 0.50 bfxil w13, w14, #29, #3
+# CHECK-NEXT: 4 4 0.50 bfxil xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 ubfx w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 lsl x2, x3, #63
+# CHECK-NEXT: 1 1 0.50 lsr x19, x20, #0
+# CHECK-NEXT: 1 1 0.50 lsl x9, x10, #5
+# CHECK-NEXT: 1 1 0.50 lsr w9, w10, #0
+# CHECK-NEXT: 1 1 0.50 lsl w11, w12, #31
+# CHECK-NEXT: 1 1 0.50 lsl w13, w14, #29
+# CHECK-NEXT: 1 1 0.50 ubfiz xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 0.50 ubfx w9, w10, #0, #1
+# CHECK-NEXT: 1 1 0.50 lsr x2, x3, #63
+# CHECK-NEXT: 1 1 0.50 lsr x19, x20, #0
+# CHECK-NEXT: 1 1 0.50 lsr x9, x10, #5
+# CHECK-NEXT: 1 1 0.50 lsr w9, w10, #0
+# CHECK-NEXT: 1 1 0.50 lsr w11, w12, #31
+# CHECK-NEXT: 1 1 0.50 lsr w13, w14, #29
+# CHECK-NEXT: 1 1 0.50 ubfx xzr, xzr, #10, #11
+# CHECK-NEXT: 1 1 1.00 cbz w5, #4
+# CHECK-NEXT: 1 1 1.00 cbz x5, #0
+# CHECK-NEXT: 1 1 1.00 cbnz x2, #-4
+# CHECK-NEXT: 1 1 1.00 cbnz x26, #1048572
+# CHECK-NEXT: 1 1 1.00 cbz wzr, #0
+# CHECK-NEXT: 1 1 1.00 cbnz xzr, #0
+# CHECK-NEXT: 1 1 1.00 b.ne #4
+# CHECK-NEXT: 1 1 1.00 b.ge #1048572
+# CHECK-NEXT: 1 1 1.00 b.ge #-4
+# CHECK-NEXT: 1 1 0.25 ccmp w1, #31, #0, eq
+# CHECK-NEXT: 1 1 0.25 ccmp w3, #0, #15, hs
+# CHECK-NEXT: 1 1 0.25 ccmp wzr, #15, #13, hs
+# CHECK-NEXT: 1 1 0.25 ccmp x9, #31, #0, le
+# CHECK-NEXT: 1 1 0.25 ccmp x3, #0, #15, gt
+# CHECK-NEXT: 1 1 0.25 ccmp xzr, #5, #7, ne
+# CHECK-NEXT: 1 1 0.25 ccmn w1, #31, #0, eq
+# CHECK-NEXT: 1 1 0.25 ccmn w3, #0, #15, hs
+# CHECK-NEXT: 1 1 0.25 ccmn wzr, #15, #13, hs
+# CHECK-NEXT: 1 1 0.25 ccmn x9, #31, #0, le
+# CHECK-NEXT: 1 1 0.25 ccmn x3, #0, #15, gt
+# CHECK-NEXT: 1 1 0.25 ccmn xzr, #5, #7, ne
+# CHECK-NEXT: 1 1 0.25 ccmp w1, wzr, #0, eq
+# CHECK-NEXT: 1 1 0.25 ccmp w3, w0, #15, hs
+# CHECK-NEXT: 1 1 0.25 ccmp wzr, w15, #13, hs
+# CHECK-NEXT: 1 1 0.25 ccmp x9, xzr, #0, le
+# CHECK-NEXT: 1 1 0.25 ccmp x3, x0, #15, gt
+# CHECK-NEXT: 1 1 0.25 ccmp xzr, x5, #7, ne
+# CHECK-NEXT: 1 1 0.25 ccmn w1, wzr, #0, eq
+# CHECK-NEXT: 1 1 0.25 ccmn w3, w0, #15, hs
+# CHECK-NEXT: 1 1 0.25 ccmn wzr, w15, #13, hs
+# CHECK-NEXT: 1 1 0.25 ccmn x9, xzr, #0, le
+# CHECK-NEXT: 1 1 0.25 ccmn x3, x0, #15, gt
+# CHECK-NEXT: 1 1 0.25 ccmn xzr, x5, #7, ne
+# CHECK-NEXT: 1 1 0.25 csel w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.25 csel wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.25 csel w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.25 csel w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.25 csel x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.25 csel xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.25 csel x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.25 csel x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.25 csinc w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.25 csinc wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.25 csinc w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.25 csinc w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.25 csinc x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.25 csinc xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.25 csinc x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.25 csinc x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.25 csinv w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.25 csinv wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.25 csinv w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.25 csinv w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.25 csinv x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.25 csinv xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.25 csinv x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.25 csinv x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.25 csneg w1, w0, w19, ne
+# CHECK-NEXT: 1 1 0.25 csneg wzr, w5, w9, eq
+# CHECK-NEXT: 1 1 0.25 csneg w9, wzr, w30, gt
+# CHECK-NEXT: 1 1 0.25 csneg w1, w28, wzr, mi
+# CHECK-NEXT: 1 1 0.25 csneg x19, x23, x29, lt
+# CHECK-NEXT: 1 1 0.25 csneg xzr, x3, x4, ge
+# CHECK-NEXT: 1 1 0.25 csneg x5, xzr, x6, hs
+# CHECK-NEXT: 1 1 0.25 csneg x7, x8, xzr, lo
+# CHECK-NEXT: 1 1 0.25 cset w3, eq
+# CHECK-NEXT: 1 1 0.25 cset x9, pl
+# CHECK-NEXT: 1 1 0.25 csetm w20, ne
+# CHECK-NEXT: 1 1 0.25 csetm x30, ge
+# CHECK-NEXT: 1 1 0.25 csinc w2, wzr, wzr, al
+# CHECK-NEXT: 1 1 0.25 csinv x3, xzr, xzr, nv
+# CHECK-NEXT: 1 1 0.25 cinc w3, w5, gt
+# CHECK-NEXT: 1 1 0.25 cinc wzr, w4, le
+# CHECK-NEXT: 1 1 0.25 cset w9, lt
+# CHECK-NEXT: 1 1 0.25 cinc x3, x5, gt
+# CHECK-NEXT: 1 1 0.25 cinc xzr, x4, le
+# CHECK-NEXT: 1 1 0.25 cset x9, lt
+# CHECK-NEXT: 1 1 0.25 csinc w5, w6, w6, nv
+# CHECK-NEXT: 1 1 0.25 csinc x1, x2, x2, al
+# CHECK-NEXT: 1 1 0.25 cinv w3, w5, gt
+# CHECK-NEXT: 1 1 0.25 cinv wzr, w4, le
+# CHECK-NEXT: 1 1 0.25 csetm w9, lt
+# CHECK-NEXT: 1 1 0.25 cinv x3, x5, gt
+# CHECK-NEXT: 1 1 0.25 cinv xzr, x4, le
+# CHECK-NEXT: 1 1 0.25 csetm x9, lt
+# CHECK-NEXT: 1 1 0.25 csinv x1, x0, x0, al
+# CHECK-NEXT: 1 1 0.25 csinv w9, w8, w8, nv
+# CHECK-NEXT: 1 1 0.25 cneg w3, w5, gt
+# CHECK-NEXT: 1 1 0.25 cneg wzr, w4, le
+# CHECK-NEXT: 1 1 0.25 cneg w9, wzr, lt
+# CHECK-NEXT: 1 1 0.25 cneg x3, x5, gt
+# CHECK-NEXT: 1 1 0.25 cneg xzr, x4, le
+# CHECK-NEXT: 1 1 0.25 cneg x9, xzr, lt
+# CHECK-NEXT: 1 1 0.25 csneg x4, x8, x8, al
+# CHECK-NEXT: 1 1 0.25 csinv w9, w8, w8, nv
+# CHECK-NEXT: 1 4 0.50 rbit w0, w7
+# CHECK-NEXT: 1 4 0.50 rbit x18, x3
+# CHECK-NEXT: 1 1 0.25 rev16 w17, w1
+# CHECK-NEXT: 1 1 0.25 rev16 x5, x2
+# CHECK-NEXT: 1 1 0.25 rev w18, w0
+# CHECK-NEXT: 1 1 0.25 rev32 x20, x1
+# CHECK-NEXT: 1 1 0.25 rev x22, x2
+# CHECK-NEXT: 1 2 1.00 clz w24, w3
+# CHECK-NEXT: 1 2 1.00 clz x26, x4
+# CHECK-NEXT: 1 2 1.00 cls w3, w5
+# CHECK-NEXT: 1 2 1.00 cls x20, x5
+# CHECK-NEXT: 1 39 39.00 udiv w0, w7, w10
+# CHECK-NEXT: 1 23 23.00 udiv x9, x22, x4
+# CHECK-NEXT: 1 39 39.00 sdiv w12, w21, w0
+# CHECK-NEXT: 1 23 23.00 sdiv x13, x2, x1
+# CHECK-NEXT: 1 2 0.50 lsl w11, w12, w13
+# CHECK-NEXT: 1 2 0.50 lsl x14, x15, x16
+# CHECK-NEXT: 1 1 0.25 lsr w17, w18, w19
+# CHECK-NEXT: 1 1 0.25 lsr x20, x21, x22
+# CHECK-NEXT: 1 2 0.50 asr w23, w24, w25
+# CHECK-NEXT: 1 2 0.50 asr x26, x27, x28
+# CHECK-NEXT: 1 2 0.50 ror w0, w1, w2
+# CHECK-NEXT: 1 2 0.50 ror x3, x4, x5
+# CHECK-NEXT: 1 2 0.50 lsl w6, w7, w8
+# CHECK-NEXT: 1 2 0.50 lsl x9, x10, x11
+# CHECK-NEXT: 1 1 0.25 lsr w12, w13, w14
+# CHECK-NEXT: 1 1 0.25 lsr x15, x16, x17
+# CHECK-NEXT: 1 2 0.50 asr w18, w19, w20
+# CHECK-NEXT: 1 2 0.50 asr x21, x22, x23
+# CHECK-NEXT: 1 2 0.50 ror w24, w25, w26
+# CHECK-NEXT: 1 2 0.50 ror x27, x28, x29
+# CHECK-NEXT: 1 5 1.00 smulh x30, x29, x28
+# CHECK-NEXT: 1 5 1.00 smulh xzr, x27, x26
+# CHECK-NEXT: 1 5 1.00 umulh x30, x29, x28
+# CHECK-NEXT: 1 5 1.00 umulh x23, x30, xzr
+# CHECK-NEXT: 1 5 0.25 madd w1, w3, w7, w4
+# CHECK-NEXT: 1 5 0.25 madd wzr, w0, w9, w11
+# CHECK-NEXT: 1 5 0.25 madd w13, wzr, w4, w4
+# CHECK-NEXT: 1 5 0.25 madd w19, w30, wzr, w29
+# CHECK-NEXT: 1 5 0.25 mul w4, w5, w6
+# CHECK-NEXT: 1 5 0.25 madd x1, x3, x7, x4
+# CHECK-NEXT: 1 5 0.25 madd xzr, x0, x9, x11
+# CHECK-NEXT: 1 5 0.25 madd x13, xzr, x4, x4
+# CHECK-NEXT: 1 5 0.25 madd x19, x30, xzr, x29
+# CHECK-NEXT: 1 5 0.25 mul x4, x5, x6
+# CHECK-NEXT: 1 5 0.25 msub w1, w3, w7, w4
+# CHECK-NEXT: 1 5 0.25 msub wzr, w0, w9, w11
+# CHECK-NEXT: 1 5 0.25 msub w13, wzr, w4, w4
+# CHECK-NEXT: 1 5 0.25 msub w19, w30, wzr, w29
+# CHECK-NEXT: 1 5 0.25 mneg w4, w5, w6
+# CHECK-NEXT: 1 5 0.25 msub x1, x3, x7, x4
+# CHECK-NEXT: 1 5 0.25 msub xzr, x0, x9, x11
+# CHECK-NEXT: 1 5 0.25 msub x13, xzr, x4, x4
+# CHECK-NEXT: 1 5 0.25 msub x19, x30, xzr, x29
+# CHECK-NEXT: 1 5 0.25 mneg x4, x5, x6
+# CHECK-NEXT: 1 6 0.50 smaddl x3, w5, w2, x9
+# CHECK-NEXT: 1 6 0.50 smaddl xzr, w10, w11, x12
+# CHECK-NEXT: 1 6 0.50 smaddl x13, wzr, w14, x15
+# CHECK-NEXT: 1 6 0.50 smaddl x16, w17, wzr, x18
+# CHECK-NEXT: 1 6 0.50 smull x19, w20, w21
+# CHECK-NEXT: 1 6 0.50 smsubl x3, w5, w2, x9
+# CHECK-NEXT: 1 6 0.50 smsubl xzr, w10, w11, x12
+# CHECK-NEXT: 1 6 0.50 smsubl x13, wzr, w14, x15
+# CHECK-NEXT: 1 6 0.50 smsubl x16, w17, wzr, x18
+# CHECK-NEXT: 1 6 0.50 smnegl x19, w20, w21
+# CHECK-NEXT: 1 6 0.50 umaddl x3, w5, w2, x9
+# CHECK-NEXT: 1 6 0.50 umaddl xzr, w10, w11, x12
+# CHECK-NEXT: 1 6 0.50 umaddl x13, wzr, w14, x15
+# CHECK-NEXT: 1 6 0.50 umaddl x16, w17, wzr, x18
+# CHECK-NEXT: 1 6 0.50 umull x19, w20, w21
+# CHECK-NEXT: 1 6 0.50 umsubl x3, w5, w2, x9
+# CHECK-NEXT: 1 6 0.50 umsubl x16, w17, wzr, x18
+# CHECK-NEXT: 1 6 0.50 umnegl x19, w20, w21
+# CHECK-NEXT: 1 5 1.00 smulh x30, x29, x28
+# CHECK-NEXT: 1 5 1.00 smulh x23, x22, xzr
+# CHECK-NEXT: 1 5 1.00 umulh x23, x22, xzr
+# CHECK-NEXT: 1 5 0.25 mul x19, x20, xzr
+# CHECK-NEXT: 1 5 0.25 mneg w21, w22, w23
+# CHECK-NEXT: 1 6 0.50 smull x11, w13, w17
+# CHECK-NEXT: 1 6 0.50 umull x11, w13, w17
+# CHECK-NEXT: 1 6 0.50 smnegl x11, w13, w17
+# CHECK-NEXT: 1 6 0.50 umnegl x11, w13, w17
+# CHECK-NEXT: 1 2 0.50 extr w3, w5, w7, #0
+# CHECK-NEXT: 1 2 0.50 extr w11, w13, w17, #31
+# CHECK-NEXT: 1 2 0.50 extr x3, x5, x7, #15
+# CHECK-NEXT: 1 2 0.50 extr x11, x13, x17, #63
+# CHECK-NEXT: 1 2 0.50 ror x19, x23, #24
+# CHECK-NEXT: 1 2 0.50 ror x29, xzr, #63
+# CHECK-NEXT: 1 2 0.50 ror w9, w13, #31
+# CHECK-NEXT: 1 4 1.00 fcmp s3, s5
+# CHECK-NEXT: 1 4 1.00 fcmp s31, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmp s31, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmpe s29, s30
+# CHECK-NEXT: 1 4 1.00 fcmpe s15, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmpe s15, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmp d4, d12
+# CHECK-NEXT: 1 4 1.00 fcmp d23, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmp d23, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmpe d26, d22
+# CHECK-NEXT: 1 4 1.00 fcmpe d29, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmpe d29, #0.0
+# CHECK-NEXT: 1 4 1.00 fccmp s1, s31, #0, eq
+# CHECK-NEXT: 1 4 1.00 fccmp s3, s0, #15, hs
+# CHECK-NEXT: 1 4 1.00 fccmp s31, s15, #13, hs
+# CHECK-NEXT: 1 4 1.00 fccmp d9, d31, #0, le
+# CHECK-NEXT: 1 4 1.00 fccmp d3, d0, #15, gt
+# CHECK-NEXT: 1 4 1.00 fccmp d31, d5, #7, ne
+# CHECK-NEXT: 1 4 1.00 fccmpe s1, s31, #0, eq
+# CHECK-NEXT: 1 4 1.00 fccmpe s3, s0, #15, hs
+# CHECK-NEXT: 1 4 1.00 fccmpe s31, s15, #13, hs
+# CHECK-NEXT: 1 4 1.00 fccmpe d9, d31, #0, le
+# CHECK-NEXT: 1 4 1.00 fccmpe d3, d0, #15, gt
+# CHECK-NEXT: 1 4 1.00 fccmpe d31, d5, #7, ne
+# CHECK-NEXT: 1 4 0.50 fcsel s3, s20, s9, pl
+# CHECK-NEXT: 1 4 0.50 fcsel d9, d10, d11, mi
+# CHECK-NEXT: 1 4 1.00 fmov s0, s1
+# CHECK-NEXT: 1 4 1.00 fabs s2, s3
+# CHECK-NEXT: 1 4 1.00 fneg s4, s5
+# CHECK-NEXT: 1 29 1.00 fsqrt s6, s7
+# CHECK-NEXT: 1 9 1.00 fcvt d8, s9
+# CHECK-NEXT: 1 9 1.00 fcvt h10, s11
+# CHECK-NEXT: 1 9 0.50 frintn s12, s13
+# CHECK-NEXT: 1 9 0.50 frintp s14, s15
+# CHECK-NEXT: 1 9 0.50 frintm s16, s17
+# CHECK-NEXT: 1 9 0.50 frintz s18, s19
+# CHECK-NEXT: 1 9 0.50 frinta s20, s21
+# CHECK-NEXT: 1 9 0.50 frintx s22, s23
+# CHECK-NEXT: 1 9 0.50 frinti s24, s25
+# CHECK-NEXT: 1 4 1.00 fmov d0, d1
+# CHECK-NEXT: 1 4 1.00 fabs d2, d3
+# CHECK-NEXT: 1 4 1.00 fneg d4, d5
+# CHECK-NEXT: 1 43 1.00 fsqrt d6, d7
+# CHECK-NEXT: 1 9 1.00 fcvt s8, d9
+# CHECK-NEXT: 1 9 1.00 fcvt h10, d11
+# CHECK-NEXT: 1 9 0.50 frintn d12, d13
+# CHECK-NEXT: 1 9 0.50 frintp d14, d15
+# CHECK-NEXT: 1 9 0.50 frintm d16, d17
+# CHECK-NEXT: 1 9 0.50 frintz d18, d19
+# CHECK-NEXT: 1 9 0.50 frinta d20, d21
+# CHECK-NEXT: 1 9 0.50 frintx d22, d23
+# CHECK-NEXT: 1 9 0.50 frinti d24, d25
+# CHECK-NEXT: 1 9 1.00 fcvt s26, h27
+# CHECK-NEXT: 1 9 1.00 fcvt d28, h29
+# CHECK-NEXT: 1 9 0.50 fmul s20, s19, s17
+# CHECK-NEXT: 1 29 1.00 fdiv s1, s2, s3
+# CHECK-NEXT: 1 4 1.00 fadd s4, s5, s6
+# CHECK-NEXT: 1 4 1.00 fsub s7, s8, s9
+# CHECK-NEXT: 1 4 1.00 fmax s10, s11, s12
+# CHECK-NEXT: 1 4 1.00 fmin s13, s14, s15
+# CHECK-NEXT: 1 4 1.00 fmaxnm s16, s17, s18
+# CHECK-NEXT: 1 4 1.00 fminnm s19, s20, s21
+# CHECK-NEXT: 1 9 0.50 fnmul s22, s23, s2
+# CHECK-NEXT: 1 9 0.50 fmul d20, d19, d17
+# CHECK-NEXT: 1 43 1.00 fdiv d1, d2, d3
+# CHECK-NEXT: 1 4 0.50 fadd d4, d5, d6
+# CHECK-NEXT: 1 4 0.50 fsub d7, d8, d9
+# CHECK-NEXT: 1 4 1.00 fmax d10, d11, d12
+# CHECK-NEXT: 1 4 1.00 fmin d13, d14, d15
+# CHECK-NEXT: 1 4 1.00 fmaxnm d16, d17, d18
+# CHECK-NEXT: 1 4 1.00 fminnm d19, d20, d21
+# CHECK-NEXT: 1 9 0.50 fnmul d22, d23, d24
+# CHECK-NEXT: 1 9 0.50 fmadd s3, s5, s6, s31
+# CHECK-NEXT: 1 9 0.50 fmadd d3, d13, d0, d23
+# CHECK-NEXT: 1 9 0.50 fmsub s3, s5, s6, s31
+# CHECK-NEXT: 1 9 0.50 fmsub d3, d13, d0, d23
+# CHECK-NEXT: 1 9 0.50 fnmadd s3, s5, s6, s31
+# CHECK-NEXT: 1 9 0.50 fnmadd d3, d13, d0, d23
+# CHECK-NEXT: 1 9 0.50 fnmsub s3, s5, s6, s31
+# CHECK-NEXT: 1 9 0.50 fnmsub d3, d13, d0, d23
+# CHECK-NEXT: 1 9 1.00 fcvtzs w3, h5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzs wzr, h20, #13
+# CHECK-NEXT: 1 9 1.00 fcvtzs w19, h0, #32
+# CHECK-NEXT: 1 9 1.00 fcvtzs x3, h5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzs x12, h30, #45
+# CHECK-NEXT: 1 9 1.00 fcvtzs x19, h0, #64
+# CHECK-NEXT: 1 9 1.00 fcvtzs w3, s5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzs wzr, s20, #13
+# CHECK-NEXT: 1 9 1.00 fcvtzs w19, s0, #32
+# CHECK-NEXT: 1 9 1.00 fcvtzs x3, s5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzs x12, s30, #45
+# CHECK-NEXT: 1 9 1.00 fcvtzs x19, s0, #64
+# CHECK-NEXT: 1 9 1.00 fcvtzs w3, d5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzs wzr, d20, #13
+# CHECK-NEXT: 1 9 1.00 fcvtzs w19, d0, #32
+# CHECK-NEXT: 1 9 1.00 fcvtzs x3, d5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzs x12, d30, #45
+# CHECK-NEXT: 1 9 1.00 fcvtzs x19, d0, #64
+# CHECK-NEXT: 1 9 1.00 fcvtzu w3, h5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzu wzr, h20, #13
+# CHECK-NEXT: 1 9 1.00 fcvtzu w19, h0, #32
+# CHECK-NEXT: 1 9 1.00 fcvtzu x3, h5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzu x12, h30, #45
+# CHECK-NEXT: 1 9 1.00 fcvtzu x19, h0, #64
+# CHECK-NEXT: 1 9 1.00 fcvtzu w3, s5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzu wzr, s20, #13
+# CHECK-NEXT: 1 9 1.00 fcvtzu w19, s0, #32
+# CHECK-NEXT: 1 9 1.00 fcvtzu x3, s5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzu x12, s30, #45
+# CHECK-NEXT: 1 9 1.00 fcvtzu x19, s0, #64
+# CHECK-NEXT: 1 9 1.00 fcvtzu w3, d5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzu wzr, d20, #13
+# CHECK-NEXT: 1 9 1.00 fcvtzu w19, d0, #32
+# CHECK-NEXT: 1 9 1.00 fcvtzu x3, d5, #1
+# CHECK-NEXT: 1 9 1.00 fcvtzu x12, d30, #45
+# CHECK-NEXT: 1 9 1.00 fcvtzu x19, d0, #64
+# CHECK-NEXT: 1 9 1.00 scvtf h23, w19, #1
+# CHECK-NEXT: 1 9 1.00 scvtf h31, wzr, #20
+# CHECK-NEXT: 1 9 1.00 scvtf h14, w0, #32
+# CHECK-NEXT: 1 9 1.00 scvtf h23, x19, #1
+# CHECK-NEXT: 1 9 1.00 scvtf h31, xzr, #20
+# CHECK-NEXT: 1 9 1.00 scvtf h14, x0, #64
+# CHECK-NEXT: 1 9 1.00 scvtf s23, w19, #1
+# CHECK-NEXT: 1 9 1.00 scvtf s31, wzr, #20
+# CHECK-NEXT: 1 9 1.00 scvtf s14, w0, #32
+# CHECK-NEXT: 1 9 1.00 scvtf s23, x19, #1
+# CHECK-NEXT: 1 9 1.00 scvtf s31, xzr, #20
+# CHECK-NEXT: 1 9 1.00 scvtf s14, x0, #64
+# CHECK-NEXT: 1 9 1.00 scvtf d23, w19, #1
+# CHECK-NEXT: 1 9 1.00 scvtf d31, wzr, #20
+# CHECK-NEXT: 1 9 1.00 scvtf d14, w0, #32
+# CHECK-NEXT: 1 9 1.00 scvtf d23, x19, #1
+# CHECK-NEXT: 1 9 1.00 scvtf d31, xzr, #20
+# CHECK-NEXT: 1 9 1.00 scvtf d14, x0, #64
+# CHECK-NEXT: 1 9 1.00 ucvtf h23, w19, #1
+# CHECK-NEXT: 1 9 1.00 ucvtf h31, wzr, #20
+# CHECK-NEXT: 1 9 1.00 ucvtf h14, w0, #32
+# CHECK-NEXT: 1 9 1.00 ucvtf h23, x19, #1
+# CHECK-NEXT: 1 9 1.00 ucvtf h31, xzr, #20
+# CHECK-NEXT: 1 9 1.00 ucvtf h14, x0, #64
+# CHECK-NEXT: 1 9 1.00 ucvtf s23, w19, #1
+# CHECK-NEXT: 1 9 1.00 ucvtf s31, wzr, #20
+# CHECK-NEXT: 1 9 1.00 ucvtf s14, w0, #32
+# CHECK-NEXT: 1 9 1.00 ucvtf s23, x19, #1
+# CHECK-NEXT: 1 9 1.00 ucvtf s31, xzr, #20
+# CHECK-NEXT: 1 9 1.00 ucvtf s14, x0, #64
+# CHECK-NEXT: 1 9 1.00 ucvtf d23, w19, #1
+# CHECK-NEXT: 1 9 1.00 ucvtf d31, wzr, #20
+# CHECK-NEXT: 1 9 1.00 ucvtf d14, w0, #32
+# CHECK-NEXT: 1 9 1.00 ucvtf d23, x19, #1
+# CHECK-NEXT: 1 9 1.00 ucvtf d31, xzr, #20
+# CHECK-NEXT: 1 9 1.00 ucvtf d14, x0, #64
+# CHECK-NEXT: 1 9 1.00 fcvtns w3, h31
+# CHECK-NEXT: 1 9 1.00 fcvtns xzr, h12
+# CHECK-NEXT: 1 9 1.00 fcvtnu wzr, h12
+# CHECK-NEXT: 1 9 1.00 fcvtnu x0, h0
+# CHECK-NEXT: 1 9 1.00 fcvtps wzr, h9
+# CHECK-NEXT: 1 9 1.00 fcvtps x12, h20
+# CHECK-NEXT: 1 9 1.00 fcvtpu w30, h23
+# CHECK-NEXT: 1 9 1.00 fcvtpu x29, h3
+# CHECK-NEXT: 1 9 1.00 fcvtms w2, h3
+# CHECK-NEXT: 1 9 1.00 fcvtms x4, h5
+# CHECK-NEXT: 1 9 1.00 fcvtmu w6, h7
+# CHECK-NEXT: 1 9 1.00 fcvtmu x8, h9
+# CHECK-NEXT: 1 9 1.00 fcvtzs w10, h11
+# CHECK-NEXT: 1 9 1.00 fcvtzs x12, h13
+# CHECK-NEXT: 1 9 1.00 fcvtzu w14, h15
+# CHECK-NEXT: 1 9 1.00 fcvtzu x15, h16
+# CHECK-NEXT: 1 9 1.00 scvtf h17, w18
+# CHECK-NEXT: 1 9 1.00 scvtf h19, x20
+# CHECK-NEXT: 1 9 1.00 ucvtf h21, w22
+# CHECK-NEXT: 1 9 1.00 scvtf h23, x24
+# CHECK-NEXT: 1 9 1.00 fcvtas w25, h26
+# CHECK-NEXT: 1 9 1.00 fcvtas x27, h28
+# CHECK-NEXT: 1 9 1.00 fcvtau w29, h30
+# CHECK-NEXT: 1 9 1.00 fcvtau xzr, h0
+# CHECK-NEXT: 1 9 1.00 fcvtns w3, s31
+# CHECK-NEXT: 1 9 1.00 fcvtns xzr, s12
+# CHECK-NEXT: 1 9 1.00 fcvtnu wzr, s12
+# CHECK-NEXT: 1 9 1.00 fcvtnu x0, s0
+# CHECK-NEXT: 1 9 1.00 fcvtps wzr, s9
+# CHECK-NEXT: 1 9 1.00 fcvtps x12, s20
+# CHECK-NEXT: 1 9 1.00 fcvtpu w30, s23
+# CHECK-NEXT: 1 9 1.00 fcvtpu x29, s3
+# CHECK-NEXT: 1 9 1.00 fcvtms w2, s3
+# CHECK-NEXT: 1 9 1.00 fcvtms x4, s5
+# CHECK-NEXT: 1 9 1.00 fcvtmu w6, s7
+# CHECK-NEXT: 1 9 1.00 fcvtmu x8, s9
+# CHECK-NEXT: 1 9 1.00 fcvtzs w10, s11
+# CHECK-NEXT: 1 9 1.00 fcvtzs x12, s13
+# CHECK-NEXT: 1 9 1.00 fcvtzu w14, s15
+# CHECK-NEXT: 1 9 1.00 fcvtzu x15, s16
+# CHECK-NEXT: 1 9 1.00 scvtf s17, w18
+# CHECK-NEXT: 1 9 1.00 scvtf s19, x20
+# CHECK-NEXT: 1 9 1.00 ucvtf s21, w22
+# CHECK-NEXT: 1 9 1.00 scvtf s23, x24
+# CHECK-NEXT: 1 9 1.00 fcvtas w25, s26
+# CHECK-NEXT: 1 9 1.00 fcvtas x27, s28
+# CHECK-NEXT: 1 9 1.00 fcvtau w29, s30
+# CHECK-NEXT: 1 9 1.00 fcvtau xzr, s0
+# CHECK-NEXT: 1 9 1.00 fcvtns w3, d31
+# CHECK-NEXT: 1 9 1.00 fcvtns xzr, d12
+# CHECK-NEXT: 1 9 1.00 fcvtnu wzr, d12
+# CHECK-NEXT: 1 9 1.00 fcvtnu x0, d0
+# CHECK-NEXT: 1 9 1.00 fcvtps wzr, d9
+# CHECK-NEXT: 1 9 1.00 fcvtps x12, d20
+# CHECK-NEXT: 1 9 1.00 fcvtpu w30, d23
+# CHECK-NEXT: 1 9 1.00 fcvtpu x29, d3
+# CHECK-NEXT: 1 9 1.00 fcvtms w2, d3
+# CHECK-NEXT: 1 9 1.00 fcvtms x4, d5
+# CHECK-NEXT: 1 9 1.00 fcvtmu w6, d7
+# CHECK-NEXT: 1 9 1.00 fcvtmu x8, d9
+# CHECK-NEXT: 1 9 1.00 fcvtzs w10, d11
+# CHECK-NEXT: 1 9 1.00 fcvtzs x12, d13
+# CHECK-NEXT: 1 9 1.00 fcvtzu w14, d15
+# CHECK-NEXT: 1 9 1.00 fcvtzu x15, d16
+# CHECK-NEXT: 1 9 1.00 scvtf d17, w18
+# CHECK-NEXT: 1 9 1.00 scvtf d19, x20
+# CHECK-NEXT: 1 9 1.00 ucvtf d21, w22
+# CHECK-NEXT: 1 9 1.00 ucvtf d23, x24
+# CHECK-NEXT: 1 9 1.00 fcvtas w25, d26
+# CHECK-NEXT: 1 9 1.00 fcvtas x27, d28
+# CHECK-NEXT: 1 9 1.00 fcvtau w29, d30
+# CHECK-NEXT: 1 9 1.00 fcvtau xzr, d0
+# CHECK-NEXT: 1 4 2.00 fmov w3, s9
+# CHECK-NEXT: 1 4 2.00 fmov s9, w3
+# CHECK-NEXT: 1 4 2.00 fmov x20, d31
+# CHECK-NEXT: 1 4 2.00 fmov d1, x15
+# CHECK-NEXT: 1 14 0.50 fmov x3, v12.d[1]
+# CHECK-NEXT: 1 10 0.50 fmov v1.d[1], x19
+# CHECK-NEXT: 1 4 2.00 fmov s2, #0.12500000
+# CHECK-NEXT: 1 4 2.00 fmov s3, #1.00000000
+# CHECK-NEXT: 1 4 2.00 fmov d30, #16.00000000
+# CHECK-NEXT: 1 4 2.00 fmov s4, #1.06250000
+# CHECK-NEXT: 1 4 2.00 fmov d10, #1.93750000
+# CHECK-NEXT: 1 4 2.00 fmov s12, #-1.00000000
+# CHECK-NEXT: 1 4 2.00 fmov d16, #8.50000000
+# CHECK-NEXT: 1 5 1.00 * ldr w3, #0
+# CHECK-NEXT: 1 5 1.00 * ldr x29, #4
+# CHECK-NEXT: 1 4 0.50 * ldrsw xzr, #-4
+# CHECK-NEXT: 1 4 0.50 * ldr s0, #8
+# CHECK-NEXT: 1 5 1.00 * ldr d0, #1048572
+# CHECK-NEXT: 1 5 1.00 * ldr q0, #-1048576
+# CHECK-NEXT: 1 0 0.50 U prfm pldl1strm, #0
+# CHECK-NEXT: 1 0 0.50 U prfm #22, #0
+# CHECK-NEXT: 2 5 1.00 * * U stxrb w18, w8, [sp]
+# CHECK-NEXT: 2 5 1.00 * * U stxrh w24, w15, [x16]
+# CHECK-NEXT: 2 5 1.00 * * U stxr w5, w6, [x17]
+# CHECK-NEXT: 2 5 1.00 * * U stxr w1, x10, [x21]
+# CHECK-NEXT: 1 4 0.50 * * U ldxrb w30, [x0]
+# CHECK-NEXT: 1 4 0.50 * * U ldxrh w17, [x4]
+# CHECK-NEXT: 1 4 0.50 * * U ldxr w22, [sp]
+# CHECK-NEXT: 1 4 0.50 * * U ldxr x11, [x29]
+# CHECK-NEXT: 1 4 0.50 * * U ldxr x11, [x29]
+# CHECK-NEXT: 1 4 0.50 * * U ldxr x11, [x29]
+# CHECK-NEXT: 2 5 1.00 * * U stxp w12, w11, w10, [sp]
+# CHECK-NEXT: 2 5 1.00 * * U stxp wzr, x27, x9, [x12]
+# CHECK-NEXT: 2 5 0.50 * * U ldxp w0, wzr, [sp]
+# CHECK-NEXT: 2 5 0.50 * * U ldxp x17, x0, [x18]
+# CHECK-NEXT: 2 5 0.50 * * U ldxp x17, x0, [x18]
+# CHECK-NEXT: 2 5 1.00 * * U stlxrb w12, w22, [x0]
+# CHECK-NEXT: 2 5 1.00 * * U stlxrh w10, w1, [x1]
+# CHECK-NEXT: 2 5 1.00 * * U stlxr w9, w2, [x2]
+# CHECK-NEXT: 2 5 1.00 * * U stlxr w9, x3, [sp]
+# CHECK-NEXT: 1 4 0.50 * * U ldaxrb w8, [x4]
+# CHECK-NEXT: 1 4 0.50 * * U ldaxrh w7, [x5]
+# CHECK-NEXT: 1 4 0.50 * * U ldaxr w6, [sp]
+# CHECK-NEXT: 1 4 0.50 * * U ldaxr x5, [x6]
+# CHECK-NEXT: 1 4 0.50 * * U ldaxr x5, [x6]
+# CHECK-NEXT: 1 4 0.50 * * U ldaxr x5, [x6]
+# CHECK-NEXT: 2 5 1.00 * * U stlxp w4, w5, w6, [sp]
+# CHECK-NEXT: 2 5 1.00 * * U stlxp wzr, x6, x7, [x1]
+# CHECK-NEXT: 2 5 0.50 * * U ldaxp w5, w18, [sp]
+# CHECK-NEXT: 2 5 0.50 * * U ldaxp x6, x19, [x22]
+# CHECK-NEXT: 2 5 0.50 * * U ldaxp x6, x19, [x22]
+# CHECK-NEXT: 1 1 0.50 * U stlrb w24, [sp]
+# CHECK-NEXT: 1 1 0.50 * U stlrh w25, [x30]
+# CHECK-NEXT: 1 1 0.50 * U stlr w26, [x29]
+# CHECK-NEXT: 1 1 0.50 * U stlr x27, [x28]
+# CHECK-NEXT: 1 1 0.50 * U stlr x27, [x28]
+# CHECK-NEXT: 1 1 0.50 * U stlr x27, [x28]
+# CHECK-NEXT: 1 4 0.50 * U ldarb w23, [sp]
+# CHECK-NEXT: 1 4 0.50 * U ldarh w22, [x30]
+# CHECK-NEXT: 1 4 0.50 * U ldar wzr, [x29]
+# CHECK-NEXT: 1 4 0.50 * U ldar x21, [x28]
+# CHECK-NEXT: 1 4 0.50 * U ldar x21, [x28]
+# CHECK-NEXT: 1 4 0.50 * U ldar x21, [x28]
+# CHECK-NEXT: 1 0 0.50 * sturb w9, [sp]
+# CHECK-NEXT: 1 0 0.50 * sturh wzr, [x12, #255]
+# CHECK-NEXT: 1 0 0.50 * stur w16, [x0, #-256]
+# CHECK-NEXT: 1 0 0.50 * stur x28, [x14, #1]
+# CHECK-NEXT: 1 5 0.50 * ldurb w1, [x20, #255]
+# CHECK-NEXT: 1 5 0.50 * ldurh w20, [x1, #255]
+# CHECK-NEXT: 1 4 0.50 * ldur w12, [sp, #255]
+# CHECK-NEXT: 1 5 0.50 * ldur xzr, [x12, #255]
+# CHECK-NEXT: 1 5 0.50 * ldursb x9, [x7, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldursh x17, [x19, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldursw x20, [x15, #-256]
+# CHECK-NEXT: 1 0 0.50 U prfum pldl2keep, [sp, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldursb w19, [x1, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldursh w15, [x21, #-256]
+# CHECK-NEXT: 1 0 0.50 * stur b0, [sp, #1]
+# CHECK-NEXT: 1 0 0.50 * stur h12, [x12, #-1]
+# CHECK-NEXT: 1 0 0.50 * stur s15, [x0, #255]
+# CHECK-NEXT: 1 0 0.50 * stur d31, [x5, #25]
+# CHECK-NEXT: 1 0 0.50 * stur q9, [x5]
+# CHECK-NEXT: 1 5 0.50 * ldur b3, [sp]
+# CHECK-NEXT: 1 5 0.50 * ldur h5, [x4, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldur s7, [x12, #-1]
+# CHECK-NEXT: 1 5 0.50 * ldur d11, [x19, #4]
+# CHECK-NEXT: 1 5 0.50 * ldur q13, [x1, #2]
+# CHECK-NEXT: 2 1 0.50 * strb w9, [x2], #255
+# CHECK-NEXT: 2 1 0.50 * strb w10, [x3], #1
+# CHECK-NEXT: 2 1 0.50 * strb w10, [x3], #-256
+# CHECK-NEXT: 2 1 0.50 * strh w9, [x2], #255
+# CHECK-NEXT: 2 1 0.50 * strh w9, [x2], #1
+# CHECK-NEXT: 2 1 0.50 * strh w10, [x3], #-256
+# CHECK-NEXT: 2 1 0.50 * str w19, [sp], #255
+# CHECK-NEXT: 2 1 0.50 * str w20, [x30], #1
+# CHECK-NEXT: 2 1 0.50 * str w21, [x12], #-256
+# CHECK-NEXT: 2 1 0.50 * str xzr, [x9], #255
+# CHECK-NEXT: 2 1 0.50 * str x2, [x3], #1
+# CHECK-NEXT: 2 1 0.50 * str x19, [x12], #-256
+# CHECK-NEXT: 3 5 0.50 * ldrb w9, [x2], #255
+# CHECK-NEXT: 3 5 0.50 * ldrb w10, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldrb w10, [x3], #-256
+# CHECK-NEXT: 3 5 0.50 * ldrh w9, [x2], #255
+# CHECK-NEXT: 3 5 0.50 * ldrh w9, [x2], #1
+# CHECK-NEXT: 3 5 0.50 * ldrh w10, [x3], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr w19, [sp], #255
+# CHECK-NEXT: 3 5 0.50 * ldr w20, [x30], #1
+# CHECK-NEXT: 3 5 0.50 * ldr w21, [x12], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr xzr, [x9], #255
+# CHECK-NEXT: 3 5 0.50 * ldr x2, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldr x19, [x12], #-256
+# CHECK-NEXT: 3 5 0.50 * ldrsb xzr, [x9], #255
+# CHECK-NEXT: 3 5 0.50 * ldrsb x2, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldrsb x19, [x12], #-256
+# CHECK-NEXT: 3 5 0.50 * ldrsh xzr, [x9], #255
+# CHECK-NEXT: 3 5 0.50 * ldrsh x2, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldrsh x19, [x12], #-256
+# CHECK-NEXT: 2 4 0.50 * ldrsw xzr, [x9], #255
+# CHECK-NEXT: 2 4 0.50 * ldrsw x2, [x3], #1
+# CHECK-NEXT: 2 4 0.50 * ldrsw x19, [x12], #-256
+# CHECK-NEXT: 3 5 0.50 * ldrsb wzr, [x9], #255
+# CHECK-NEXT: 3 5 0.50 * ldrsb w2, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldrsb w19, [x12], #-256
+# CHECK-NEXT: 3 5 0.50 * ldrsh wzr, [x9], #255
+# CHECK-NEXT: 3 5 0.50 * ldrsh w2, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldrsh w19, [x12], #-256
+# CHECK-NEXT: 2 1 0.50 * str b0, [x0], #255
+# CHECK-NEXT: 2 1 0.50 * str b3, [x3], #1
+# CHECK-NEXT: 2 1 0.50 * str b5, [sp], #-256
+# CHECK-NEXT: 2 1 0.50 * str h10, [x10], #255
+# CHECK-NEXT: 2 1 0.50 * str h13, [x23], #1
+# CHECK-NEXT: 2 1 0.50 * str h15, [sp], #-256
+# CHECK-NEXT: 2 1 0.50 * str s20, [x20], #255
+# CHECK-NEXT: 2 1 0.50 * str s23, [x23], #1
+# CHECK-NEXT: 2 1 0.50 * str s25, [x0], #-256
+# CHECK-NEXT: 2 1 0.50 * str d20, [x20], #255
+# CHECK-NEXT: 2 1 0.50 * str d23, [x23], #1
+# CHECK-NEXT: 2 1 0.50 * str d25, [x0], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr b0, [x0], #255
+# CHECK-NEXT: 3 5 0.50 * ldr b3, [x3], #1
+# CHECK-NEXT: 3 5 0.50 * ldr b5, [sp], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr h10, [x10], #255
+# CHECK-NEXT: 3 5 0.50 * ldr h13, [x23], #1
+# CHECK-NEXT: 3 5 0.50 * ldr h15, [sp], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr s20, [x20], #255
+# CHECK-NEXT: 3 5 0.50 * ldr s23, [x23], #1
+# CHECK-NEXT: 3 5 0.50 * ldr s25, [x0], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr d20, [x20], #255
+# CHECK-NEXT: 3 5 0.50 * ldr d23, [x23], #1
+# CHECK-NEXT: 3 5 0.50 * ldr d25, [x0], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr q20, [x1], #255
+# CHECK-NEXT: 3 5 0.50 * ldr q23, [x9], #1
+# CHECK-NEXT: 3 5 0.50 * ldr q25, [x20], #-256
+# CHECK-NEXT: 2 1 0.50 * str q10, [x1], #255
+# CHECK-NEXT: 2 1 0.50 * str q22, [sp], #1
+# CHECK-NEXT: 2 1 0.50 * str q21, [x20], #-256
+# CHECK-NEXT: 3 5 0.50 * ldr x3, [x4, #0]!
+# CHECK-NEXT: 2 1 0.50 * strb w9, [x2, #255]!
+# CHECK-NEXT: 2 1 0.50 * strb w10, [x3, #1]!
+# CHECK-NEXT: 2 1 0.50 * strb w10, [x3, #-256]!
+# CHECK-NEXT: 2 1 0.50 * strh w9, [x2, #255]!
+# CHECK-NEXT: 2 1 0.50 * strh w9, [x2, #1]!
+# CHECK-NEXT: 2 1 0.50 * strh w10, [x3, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str w19, [sp, #255]!
+# CHECK-NEXT: 2 1 0.50 * str w20, [x30, #1]!
+# CHECK-NEXT: 2 1 0.50 * str w21, [x12, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str xzr, [x9, #255]!
+# CHECK-NEXT: 2 1 0.50 * str x2, [x3, #1]!
+# CHECK-NEXT: 2 1 0.50 * str x19, [x12, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldrb w9, [x2, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldrb w10, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldrb w10, [x3, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldrh w9, [x2, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldrh w9, [x2, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldrh w10, [x3, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr w19, [sp, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr w20, [x30, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr w21, [x12, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr xzr, [x9, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr x2, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr x19, [x12, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldrsb xzr, [x9, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldrsb x2, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldrsb x19, [x12, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldrsh xzr, [x9, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldrsh x2, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldrsh x19, [x12, #-256]!
+# CHECK-NEXT: 2 4 0.50 * ldrsw xzr, [x9, #255]!
+# CHECK-NEXT: 2 4 0.50 * ldrsw x2, [x3, #1]!
+# CHECK-NEXT: 2 4 0.50 * ldrsw x19, [x12, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldrsb wzr, [x9, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldrsb w2, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldrsb w19, [x12, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldrsh wzr, [x9, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldrsh w2, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldrsh w19, [x12, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str b0, [x0, #255]!
+# CHECK-NEXT: 2 1 0.50 * str b3, [x3, #1]!
+# CHECK-NEXT: 2 1 0.50 * str b5, [sp, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str h10, [x10, #255]!
+# CHECK-NEXT: 2 1 0.50 * str h13, [x23, #1]!
+# CHECK-NEXT: 2 1 0.50 * str h15, [sp, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str s20, [x20, #255]!
+# CHECK-NEXT: 2 1 0.50 * str s23, [x23, #1]!
+# CHECK-NEXT: 2 1 0.50 * str s25, [x0, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str d20, [x20, #255]!
+# CHECK-NEXT: 2 1 0.50 * str d23, [x23, #1]!
+# CHECK-NEXT: 2 1 0.50 * str d25, [x0, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr b0, [x0, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr b3, [x3, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr b5, [sp, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr h10, [x10, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr h13, [x23, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr h15, [sp, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr s20, [x20, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr s23, [x23, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr s25, [x0, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr d20, [x20, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr d23, [x23, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr d25, [x0, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldr q20, [x1, #255]!
+# CHECK-NEXT: 3 5 0.50 * ldr q23, [x9, #1]!
+# CHECK-NEXT: 3 5 0.50 * ldr q25, [x20, #-256]!
+# CHECK-NEXT: 2 1 0.50 * str q10, [x1, #255]!
+# CHECK-NEXT: 2 1 0.50 * str q22, [sp, #1]!
+# CHECK-NEXT: 2 1 0.50 * str q21, [x20, #-256]!
+# CHECK-NEXT: 2 1 0.50 * sttrb w9, [sp]
+# CHECK-NEXT: 2 1 0.50 * sttrh wzr, [x12, #255]
+# CHECK-NEXT: 2 1 0.50 * sttr w16, [x0, #-256]
+# CHECK-NEXT: 2 1 0.50 * sttr x28, [x14, #1]
+# CHECK-NEXT: 1 5 0.50 * ldtrb w1, [x20, #255]
+# CHECK-NEXT: 1 5 0.50 * ldtrh w20, [x1, #255]
+# CHECK-NEXT: 1 5 0.50 * ldtr w12, [sp, #255]
+# CHECK-NEXT: 1 5 0.50 * ldtr xzr, [x12, #255]
+# CHECK-NEXT: 1 5 0.50 * ldtrsb x9, [x7, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldtrsh x17, [x19, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldtrsw x20, [x15, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldtrsb w19, [x1, #-256]
+# CHECK-NEXT: 1 5 0.50 * ldtrsh w15, [x21, #-256]
+# CHECK-NEXT: 1 4 0.50 * ldr x4, [x29]
+# CHECK-NEXT: 1 4 0.50 * ldr x30, [x12, #32760]
+# CHECK-NEXT: 1 4 0.50 * ldr x20, [sp, #8]
+# CHECK-NEXT: 1 4 0.50 * ldr xzr, [sp]
+# CHECK-NEXT: 1 4 0.50 * ldr w2, [sp]
+# CHECK-NEXT: 1 4 0.50 * ldr w17, [sp, #16380]
+# CHECK-NEXT: 1 4 0.50 * ldr w13, [x2, #4]
+# CHECK-NEXT: 1 4 0.50 * ldrsw x2, [x5, #4]
+# CHECK-NEXT: 1 4 0.50 * ldrsw x23, [sp, #16380]
+# CHECK-NEXT: 1 4 0.50 * ldrh w2, [x4]
+# CHECK-NEXT: 1 4 0.50 * ldrsh w23, [x6, #8190]
+# CHECK-NEXT: 1 4 0.50 * ldrsh wzr, [sp, #2]
+# CHECK-NEXT: 1 4 0.50 * ldrsh x29, [x2, #2]
+# CHECK-NEXT: 1 4 0.50 * ldrb w26, [x3, #121]
+# CHECK-NEXT: 1 4 0.50 * ldrb w12, [x2]
+# CHECK-NEXT: 1 4 0.50 * ldrsb w27, [sp, #4095]
+# CHECK-NEXT: 1 4 0.50 * ldrsb xzr, [x15]
+# CHECK-NEXT: 1 0 0.50 * str x30, [sp]
+# CHECK-NEXT: 1 0 0.50 * str w20, [x4, #16380]
+# CHECK-NEXT: 1 1 0.50 * strh w17, [sp, #8190]
+# CHECK-NEXT: 1 1 0.50 * strb w23, [x3, #4095]
+# CHECK-NEXT: 1 1 0.50 * strb wzr, [x2]
+# CHECK-NEXT: 1 5 0.50 * ldr b31, [sp, #4095]
+# CHECK-NEXT: 1 5 0.50 * ldr h20, [x2, #8190]
+# CHECK-NEXT: 1 5 0.50 * ldr s10, [x19, #16380]
+# CHECK-NEXT: 1 5 0.50 * ldr d3, [x10, #32760]
+# CHECK-NEXT: 1 0 0.50 * str q12, [sp, #65520]
+# CHECK-NEXT: 1 1 0.50 * ldrb w3, [sp, x5]
+# CHECK-NEXT: 1 1 0.50 * ldrb w9, [x27, x6]
+# CHECK-NEXT: 1 1 0.50 * ldrsb w10, [x30, x7]
+# CHECK-NEXT: 1 1 0.50 * ldrb w11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 0 0.50 * strb w12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 1 0.50 * ldrb w14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 1 0.50 * ldrsb w15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 1 0.50 * ldrb w17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 1 0.50 * ldrsb x18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 5 0.50 * ldrsh w3, [sp, x5]
+# CHECK-NEXT: 1 5 0.50 * ldrsh w9, [x27, x6]
+# CHECK-NEXT: 1 5 0.50 * ldrh w10, [x30, x7, lsl #1]
+# CHECK-NEXT: 1 0 0.50 * strh w11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 5 0.50 * ldrh w12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 5 0.50 * ldrsh x13, [x27, x5, sxtx #1]
+# CHECK-NEXT: 1 5 0.50 * ldrh w14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldrh w15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldrsh w16, [x24, w8, uxtw #1]
+# CHECK-NEXT: 1 5 0.50 * ldrh w17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 5 0.50 * ldrh w18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 0 0.50 * strh w19, [x21, wzr, sxtw #1]
+# CHECK-NEXT: 1 5 0.50 * ldr w3, [sp, x5]
+# CHECK-NEXT: 1 5 0.50 * ldr s9, [x27, x6]
+# CHECK-NEXT: 1 5 0.50 * ldr w10, [x30, x7, lsl #2]
+# CHECK-NEXT: 1 5 0.50 * ldr w11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 0 0.50 * str s12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 0 0.50 * str w13, [x27, x5, sxtx #2]
+# CHECK-NEXT: 1 0 0.50 * str w14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr w15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr w16, [x24, w8, uxtw #2]
+# CHECK-NEXT: 1 1 0.50 * ldrsw x17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr w18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 1 0.50 * ldrsw x19, [x21, wzr, sxtw #2]
+# CHECK-NEXT: 1 5 0.50 * ldr x3, [sp, x5]
+# CHECK-NEXT: 1 0 0.50 * str x9, [x27, x6]
+# CHECK-NEXT: 1 5 0.50 * ldr d10, [x30, x7, lsl #3]
+# CHECK-NEXT: 1 0 0.50 * str x11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 5 0.50 * ldr x12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 5 0.50 * ldr x13, [x27, x5, sxtx #3]
+# CHECK-NEXT: 1 0 0.50 U prfm pldl1keep, [x26, w6, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr x15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr x16, [x24, w8, uxtw #3]
+# CHECK-NEXT: 1 5 0.50 * ldr x17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr x18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 0 0.50 * str d19, [x21, wzr, sxtw #3]
+# CHECK-NEXT: 1 5 0.50 * ldr q3, [sp, x5]
+# CHECK-NEXT: 1 5 0.50 * ldr q9, [x27, x6]
+# CHECK-NEXT: 1 5 0.50 * ldr q10, [x30, x7, lsl #4]
+# CHECK-NEXT: 1 0 0.50 * str q11, [x29, x3, sxtx]
+# CHECK-NEXT: 1 0 0.50 * str q12, [x28, xzr, sxtx]
+# CHECK-NEXT: 1 0 0.50 * str q13, [x27, x5, sxtx #4]
+# CHECK-NEXT: 1 5 0.50 * ldr q14, [x26, w6, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr q15, [x25, w7, uxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr q16, [x24, w8, uxtw #4]
+# CHECK-NEXT: 1 5 0.50 * ldr q17, [x23, w9, sxtw]
+# CHECK-NEXT: 1 0 0.50 * str q18, [x22, w10, sxtw]
+# CHECK-NEXT: 1 5 0.50 * ldr q19, [x21, wzr, sxtw #4]
+# CHECK-NEXT: 3 5 0.50 * ldp w3, w5, [sp]
+# CHECK-NEXT: 1 0 0.50 * stp wzr, w9, [sp, #252]
+# CHECK-NEXT: 3 5 0.50 * ldp w2, wzr, [sp, #-256]
+# CHECK-NEXT: 3 5 0.50 * ldp w9, w10, [sp, #4]
+# CHECK-NEXT: 3 5 0.50 * ldpsw x9, x10, [sp, #4]
+# CHECK-NEXT: 3 5 0.50 * ldpsw x9, x10, [x2, #-256]
+# CHECK-NEXT: 3 5 0.50 * ldpsw x20, x30, [sp, #252]
+# CHECK-NEXT: 3 5 0.50 * ldp x21, x29, [x2, #504]
+# CHECK-NEXT: 3 5 0.50 * ldp x22, x23, [x3, #-512]
+# CHECK-NEXT: 3 5 0.50 * ldp x24, x25, [x4, #8]
+# CHECK-NEXT: 3 5 0.50 * ldp s29, s28, [sp, #252]
+# CHECK-NEXT: 1 1 0.50 * stp s27, s26, [sp, #-256]
+# CHECK-NEXT: 3 5 0.50 * ldp s1, s2, [x3, #44]
+# CHECK-NEXT: 1 0 0.50 * stp d3, d5, [x9, #504]
+# CHECK-NEXT: 1 0 0.50 * stp d7, d11, [x10, #-512]
+# CHECK-NEXT: 3 5 0.50 * ldp d2, d3, [x30, #-8]
+# CHECK-NEXT: 1 0 0.50 * stp q3, q5, [sp]
+# CHECK-NEXT: 1 0 0.50 * stp q17, q19, [sp, #1008]
+# CHECK-NEXT: 3 5 0.50 * ldp q23, q29, [x1, #-1024]
+# CHECK-NEXT: 5 5 0.50 * ldp w3, w5, [sp], #0
+# CHECK-NEXT: 1 0 0.50 * stp wzr, w9, [sp], #252
+# CHECK-NEXT: 5 5 0.50 * ldp w2, wzr, [sp], #-256
+# CHECK-NEXT: 5 5 0.50 * ldp w9, w10, [sp], #4
+# CHECK-NEXT: 3 5 0.50 * ldpsw x9, x10, [sp], #4
+# CHECK-NEXT: 3 5 0.50 * ldpsw x9, x10, [x2], #-256
+# CHECK-NEXT: 3 5 0.50 * ldpsw x20, x30, [sp], #252
+# CHECK-NEXT: 5 5 0.50 * ldp x21, x29, [x2], #504
+# CHECK-NEXT: 5 5 0.50 * ldp x22, x23, [x3], #-512
+# CHECK-NEXT: 5 5 0.50 * ldp x24, x25, [x4], #8
+# CHECK-NEXT: 5 5 0.50 * ldp s29, s28, [sp], #252
+# CHECK-NEXT: 1 0 0.50 * stp s27, s26, [sp], #-256
+# CHECK-NEXT: 5 5 0.50 * ldp s1, s2, [x3], #44
+# CHECK-NEXT: 1 0 0.50 * stp d3, d5, [x9], #504
+# CHECK-NEXT: 1 0 0.50 * stp d7, d11, [x10], #-512
+# CHECK-NEXT: 5 5 0.50 * ldp d2, d3, [x30], #-8
+# CHECK-NEXT: 1 0 0.50 * stp q3, q5, [sp], #0
+# CHECK-NEXT: 1 0 0.50 * stp q17, q19, [sp], #1008
+# CHECK-NEXT: 5 5 0.50 * ldp q23, q29, [x1], #-1024
+# CHECK-NEXT: 5 5 0.50 * ldp w3, w5, [sp, #0]!
+# CHECK-NEXT: 1 0 0.50 * stp wzr, w9, [sp, #252]!
+# CHECK-NEXT: 5 5 0.50 * ldp w2, wzr, [sp, #-256]!
+# CHECK-NEXT: 5 5 0.50 * ldp w9, w10, [sp, #4]!
+# CHECK-NEXT: 3 5 0.50 * ldpsw x9, x10, [sp, #4]!
+# CHECK-NEXT: 3 5 0.50 * ldpsw x9, x10, [x2, #-256]!
+# CHECK-NEXT: 3 5 0.50 * ldpsw x20, x30, [sp, #252]!
+# CHECK-NEXT: 5 5 0.50 * ldp x21, x29, [x2, #504]!
+# CHECK-NEXT: 5 5 0.50 * ldp x22, x23, [x3, #-512]!
+# CHECK-NEXT: 5 5 0.50 * ldp x24, x25, [x4, #8]!
+# CHECK-NEXT: 5 5 0.50 * ldp s29, s28, [sp, #252]!
+# CHECK-NEXT: 1 0 0.50 * stp s27, s26, [sp, #-256]!
+# CHECK-NEXT: 5 5 0.50 * ldp s1, s2, [x3, #44]!
+# CHECK-NEXT: 1 0 0.50 * stp d3, d5, [x9, #504]!
+# CHECK-NEXT: 1 0 0.50 * stp d7, d11, [x10, #-512]!
+# CHECK-NEXT: 5 5 0.50 * ldp d2, d3, [x30, #-8]!
+# CHECK-NEXT: 1 0 0.50 * stp q3, q5, [sp, #0]!
+# CHECK-NEXT: 1 0 0.50 * stp q17, q19, [sp, #1008]!
+# CHECK-NEXT: 5 5 0.50 * ldp q23, q29, [x1, #-1024]!
+# CHECK-NEXT: 3 5 0.50 * ldnp w3, w5, [sp]
+# CHECK-NEXT: 1 0 0.50 * stnp wzr, w9, [sp, #252]
+# CHECK-NEXT: 3 5 0.50 * ldnp w2, wzr, [sp, #-256]
+# CHECK-NEXT: 3 5 0.50 * ldnp w9, w10, [sp, #4]
+# CHECK-NEXT: 3 5 0.50 * ldnp x21, x29, [x2, #504]
+# CHECK-NEXT: 3 5 0.50 * ldnp x22, x23, [x3, #-512]
+# CHECK-NEXT: 3 5 0.50 * ldnp x24, x25, [x4, #8]
+# CHECK-NEXT: 3 5 0.50 * ldnp s29, s28, [sp, #252]
+# CHECK-NEXT: 1 1 0.50 * stnp s27, s26, [sp, #-256]
+# CHECK-NEXT: 3 5 0.50 * ldnp s1, s2, [x3, #44]
+# CHECK-NEXT: 1 0 0.50 * stnp d3, d5, [x9, #504]
+# CHECK-NEXT: 1 0 0.50 * stnp d7, d11, [x10, #-512]
+# CHECK-NEXT: 3 5 0.50 * ldnp d2, d3, [x30, #-8]
+# CHECK-NEXT: 1 0 0.50 * stnp q3, q5, [sp]
+# CHECK-NEXT: 1 0 0.50 * stnp q17, q19, [sp, #1008]
+# CHECK-NEXT: 3 5 0.50 * ldnp q23, q29, [x1, #-1024]
+# CHECK-NEXT: 1 1 0.25 mov w3, #983055
+# CHECK-NEXT: 1 1 0.25 mov x10, #-6148914691236517206
+# CHECK-NEXT: 1 1 0.25 and w12, w23, w21
+# CHECK-NEXT: 1 1 0.25 and w16, w15, w1, lsl #1
+# CHECK-NEXT: 1 1 0.25 and w9, w4, w10, lsl #31
+# CHECK-NEXT: 1 1 0.25 and w3, w30, w11
+# CHECK-NEXT: 1 1 0.25 and x3, x5, x7, lsl #63
+# CHECK-NEXT: 1 1 0.25 and x5, x14, x19, asr #4
+# CHECK-NEXT: 1 1 0.25 and w3, w17, w19, ror #31
+# CHECK-NEXT: 1 1 0.25 and w0, w2, wzr, lsr #17
+# CHECK-NEXT: 1 1 0.25 and w3, w30, w11, asr #2
+# CHECK-NEXT: 1 1 0.25 and xzr, x4, x26
+# CHECK-NEXT: 1 1 0.25 and w3, wzr, w20, ror #2
+# CHECK-NEXT: 1 1 0.25 and x7, x20, xzr, asr #63
+# CHECK-NEXT: 1 1 0.25 bic x13, x20, x14, lsl #47
+# CHECK-NEXT: 1 1 0.25 bic w2, w7, w9
+# CHECK-NEXT: 1 1 0.25 orr w2, w7, w0, asr #31
+# CHECK-NEXT: 1 1 0.25 orr x8, x9, x10, lsl #12
+# CHECK-NEXT: 1 1 0.25 orn x3, x5, x7, asr #2
+# CHECK-NEXT: 1 1 0.25 orn w2, w5, w29
+# CHECK-NEXT: 1 1 0.25 ands w7, wzr, w9, lsl #1
+# CHECK-NEXT: 1 1 0.25 ands x3, x5, x20, ror #63
+# CHECK-NEXT: 1 1 0.25 bics w3, w5, w7
+# CHECK-NEXT: 1 1 0.25 bics x3, xzr, x3, lsl #1
+# CHECK-NEXT: 1 1 0.25 tst w3, w7, lsl #31
+# CHECK-NEXT: 1 1 0.25 tst x2, x20, asr #2
+# CHECK-NEXT: 1 1 0.25 mov x3, x6
+# CHECK-NEXT: 1 1 0.25 mov x3, xzr
+# CHECK-NEXT: 1 1 0.25 mov wzr, w2
+# CHECK-NEXT: 1 1 0.25 mov w3, w5
+# CHECK-NEXT: 1 1 0.25 movz w2, #0, lsl #16
+# CHECK-NEXT: 1 1 0.25 mov w2, #-1235
+# CHECK-NEXT: 1 1 0.25 mov x2, #5299989643264
+# CHECK-NEXT: 1 1 0.25 mov x2, #0
+# CHECK-NEXT: 1 1 0.25 movk w3, #0
+# CHECK-NEXT: 1 1 0.25 movz x4, #0, lsl #16
+# CHECK-NEXT: 1 1 0.25 movk w5, #0, lsl #16
+# CHECK-NEXT: 1 1 0.25 movz x6, #0, lsl #32
+# CHECK-NEXT: 1 1 0.25 movk x7, #0, lsl #32
+# CHECK-NEXT: 1 1 0.25 movz x8, #0, lsl #48
+# CHECK-NEXT: 1 1 0.25 movk x9, #0, lsl #48
+# CHECK-NEXT: 1 1 0.25 adr x2, #1600
+# CHECK-NEXT: 1 1 0.25 adrp x21, #6553600
+# CHECK-NEXT: 1 1 0.25 adr x0, #262144
+# CHECK-NEXT: 1 1 1.00 tbz x12, #62, #0
+# CHECK-NEXT: 1 1 1.00 tbz x12, #62, #4
+# CHECK-NEXT: 1 1 1.00 tbz x12, #62, #-32768
+# CHECK-NEXT: 1 1 1.00 tbnz x12, #60, #32764
+# CHECK-NEXT: 1 1 1.00 b #4
+# CHECK-NEXT: 1 1 1.00 b #-4
+# CHECK-NEXT: 1 1 1.00 b #134217724
+# CHECK-NEXT: 1 1 1.00 br x20
+# CHECK-NEXT: 1 1 1.00 blr xzr
+# CHECK-NEXT: 1 1 1.00 U ret x10
+# CHECK-NEXT: 1 1 1.00 U ret
+# CHECK-NEXT: 1 1 1.00 U eret
+# CHECK-NEXT: 1 1 1.00 U drps
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - A64FXIPBR
+# CHECK-NEXT: [1] - A64FXIPEAGA
+# CHECK-NEXT: [2] - A64FXIPEAGB
+# CHECK-NEXT: [3] - A64FXIPEXA
+# CHECK-NEXT: [4] - A64FXIPEXB
+# CHECK-NEXT: [5] - A64FXIPFLA
+# CHECK-NEXT: [6] - A64FXIPFLB
+# CHECK-NEXT: [7] - A64FXIPPR
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
+# CHECK-NEXT: 22.00 308.50 312.50 219.00 336.00 248.00 218.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w2, w3, #4095
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w30, w29, #1, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w13, w5, #4095, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x5, x7, #1638
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w20, wsp, #801
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add wsp, wsp, #1104
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add wsp, w30, #4084
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x0, x24, #291
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x3, x24, #4095, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x8, sp, #1074
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add sp, x29, #3816
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w0, wsp, #4077
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w4, w20, #546, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub sp, sp, #288
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub wsp, w19, #16
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w13, w23, #291, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w2, #4095
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w20, wsp, #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x3, #1, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp sp, #20, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x30, #4095
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x4, sp, #3822
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w3, #291, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn wsp, #1365
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn sp, #1092, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov sp, x30
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov wsp, w20
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov x11, sp
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov w24, wsp
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w3, w5, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add wzr, w3, w5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w20, wzr, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w4, w6, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w11, w13, w15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w9, w3, wzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w17, w29, w20, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w21, w22, w23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w24, w25, w26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w27, w28, w29, lsr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w2, w3, w4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w5, w6, w7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add w8, w9, w10, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x3, x5, x7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add xzr, x3, x5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x20, xzr, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x4, x6, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x11, x13, x15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x9, x3, xzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x17, x29, x20, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x21, x22, x23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x24, x25, x26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x27, x28, x29, lsr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x2, x3, x4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x5, x6, x7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - add x8, x9, x10, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w3, w5, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w3, w5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w20, wzr, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w4, w6, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w11, w13, w15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w9, w3, wzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w17, w29, w20, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w21, w22, w23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w24, w25, w26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w27, w28, w29, lsr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w2, w3, w4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w5, w6, w7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds w8, w9, w10, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x3, x5, x7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x3, x5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x20, xzr, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x4, x6, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x11, x13, x15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x9, x3, xzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x17, x29, x20, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x21, x22, x23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x24, x25, x26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x27, x28, x29, lsr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x2, x3, x4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x5, x6, x7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adds x8, x9, x10, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w3, w5, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub wzr, w3, w5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w4, w6, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w11, w13, w15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w9, w3, wzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w17, w29, w20, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w21, w22, w23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w24, w25, w26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w27, w28, w29, lsr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w2, w3, w4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w5, w6, w7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub w8, w9, w10, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x3, x5, x7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub xzr, x3, x5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x4, x6, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x11, x13, x15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x9, x3, xzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x17, x29, x20, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x21, x22, x23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x24, x25, x26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x27, x28, x29, lsr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x2, x3, x4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x5, x6, x7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sub x8, x9, x10, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w3, w5, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w3, w5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w4, w6, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w11, w13, w15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w9, w3, wzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w17, w29, w20, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w21, w22, w23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w24, w25, w26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w27, w28, w29, lsr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w2, w3, w4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w5, w6, w7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs w8, w9, w10, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x3, x5, x7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x3, x5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x4, x6, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x11, x13, x15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x9, x3, xzr, lsl #10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x17, x29, x20, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x21, x22, x23, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x24, x25, x26, lsr #18
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x27, x28, x29, lsr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x2, x3, x4, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x5, x6, x7, asr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - subs x8, x9, x10, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn wzr, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w5, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w6, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w8, w9, lsl #15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w10, w11, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w12, w13, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w14, w15, lsr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w16, w17, lsr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w18, w19, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w20, w21, asr #22
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn w22, w23, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x0, x3
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn xzr, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x5, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x6, x7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x8, x9, lsl #15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x10, x11, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x12, x13, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x14, x15, lsr #41
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x16, x17, lsr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x18, x19, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x20, x21, asr #55
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmn x22, x23, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w0, w3
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp wzr, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w5, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w6, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w8, w9, lsl #15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w10, w11, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w12, w13, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w14, w15, lsr #21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w18, w19, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w20, w21, asr #22
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp w22, w23, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x0, x3
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp xzr, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x5, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x6, x7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x8, x9, lsl #15
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x10, x11, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x12, x13, lsr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x14, x15, lsr #41
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x16, x17, lsr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x18, x19, asr #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x20, x21, asr #55
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp x22, x23, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp wzr, w0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cmp xzr, x0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc w29, w27, w25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc wzr, w3, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc w9, wzr, w10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc w20, w0, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc x29, x27, x25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc xzr, x3, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc x9, xzr, x10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adc x20, x0, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs w29, w27, w25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs wzr, w3, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs w9, wzr, w10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs w20, w0, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs x29, x27, x25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs xzr, x3, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs x9, xzr, x10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adcs x20, x0, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbc w29, w27, w25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbc wzr, w3, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc w9, w10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbc w20, w0, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbc x29, x27, x25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbc xzr, x3, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc x9, x10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbc x20, x0, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbcs w29, w27, w25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbcs wzr, w3, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs w9, w10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbcs w20, w0, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbcs x29, x27, x25
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbcs xzr, x3, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs x9, x10
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - sbcs x20, x0, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc w3, w12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc wzr, w9
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc w23, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc x29, x30
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc xzr, x0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngc x0, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs w3, w12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs wzr, w9
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs w23, wzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs x29, x30
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs xzr, x0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ngcs x0, xzr
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfx x1, x2, #3, #2
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x3, x4, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr wzr, wzr, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfx w12, w9, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfiz x4, x5, #52, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfx xzr, x4, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfiz x4, xzr, #1, #6
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr x5, x6, #12
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfi x4, x5, #52, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil xzr, x4, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfc x4, #1, #6
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil x5, x6, #12, #52
+# CHECK-NEXT: - - - 0.50 0.50 - - - sxtb w1, w2
+# CHECK-NEXT: - - - 0.50 0.50 - - - sxtb xzr, w3
+# CHECK-NEXT: - - - 0.50 0.50 - - - sxth w9, w10
+# CHECK-NEXT: - - - 0.50 0.50 - - - sxth x0, w1
+# CHECK-NEXT: - - - 0.50 0.50 - - - sxtw x3, w30
+# CHECK-NEXT: - - - 0.50 0.50 - - - uxtb w1, w2
+# CHECK-NEXT: - - - 0.50 0.50 - - - uxth w9, w10
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfx x3, x30, #0, #32
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w3, w2, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w9, w10, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x20, x21, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w1, wzr, #3
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w3, w2, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w9, w10, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr x20, x21, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr wzr, wzr, #3
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w3, w2, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl w9, w10, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl x20, x21, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl w1, wzr, #3
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfx w9, w10, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfiz x2, x3, #63, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x19, x20, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfiz x9, x10, #5, #59
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w9, w10, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfiz w11, w12, #31, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfiz w13, w14, #29, #3
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfiz xzr, xzr, #10, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfx w9, w10, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x2, x3, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x19, x20, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x9, x10, #5
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w9, w10, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w11, w12, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w13, w14, #29
+# CHECK-NEXT: - - - 0.50 0.50 - - - sbfx xzr, xzr, #10, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil w9, w10, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfi x2, x3, #63, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil x19, x20, #0, #64
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfi x9, x10, #5, #59
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil w9, w10, #0, #32
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfi w11, w12, #31, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfi w13, w14, #29, #3
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfc xzr, #10, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil w9, w10, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil x2, x3, #63, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil x19, x20, #0, #64
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil x9, x10, #5, #59
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil w9, w10, #0, #32
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil w11, w12, #31, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil w13, w14, #29, #3
+# CHECK-NEXT: - - - 0.50 0.50 - - - bfxil xzr, xzr, #10, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfx w9, w10, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl x2, x3, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr x19, x20, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl x9, x10, #5
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w9, w10, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl w11, w12, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl w13, w14, #29
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfiz xzr, xzr, #10, #11
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfx w9, w10, #0, #1
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr x2, x3, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr x19, x20, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr x9, x10, #5
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w9, w10, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w11, w12, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsr w13, w14, #29
+# CHECK-NEXT: - - - 0.50 0.50 - - - ubfx xzr, xzr, #10, #11
+# CHECK-NEXT: 1.00 - - - - - - - cbz w5, #4
+# CHECK-NEXT: 1.00 - - - - - - - cbz x5, #0
+# CHECK-NEXT: 1.00 - - - - - - - cbnz x2, #-4
+# CHECK-NEXT: 1.00 - - - - - - - cbnz x26, #1048572
+# CHECK-NEXT: 1.00 - - - - - - - cbz wzr, #0
+# CHECK-NEXT: 1.00 - - - - - - - cbnz xzr, #0
+# CHECK-NEXT: 1.00 - - - - - - - b.ne #4
+# CHECK-NEXT: 1.00 - - - - - - - b.ge #1048572
+# CHECK-NEXT: 1.00 - - - - - - - b.ge #-4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp w1, #31, #0, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp w3, #0, #15, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp wzr, #15, #13, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp x9, #31, #0, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp x3, #0, #15, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp xzr, #5, #7, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn w1, #31, #0, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn w3, #0, #15, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn wzr, #15, #13, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn x9, #31, #0, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn x3, #0, #15, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn xzr, #5, #7, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp w1, wzr, #0, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp w3, w0, #15, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp wzr, w15, #13, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp x9, xzr, #0, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp x3, x0, #15, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmp xzr, x5, #7, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn w1, wzr, #0, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn w3, w0, #15, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn wzr, w15, #13, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn x9, xzr, #0, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn x3, x0, #15, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ccmn xzr, x5, #7, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel w1, w0, w19, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel wzr, w5, w9, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel w9, wzr, w30, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel w1, w28, wzr, mi
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel x19, x23, x29, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel xzr, x3, x4, ge
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel x5, xzr, x6, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csel x7, x8, xzr, lo
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc w1, w0, w19, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc wzr, w5, w9, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc w9, wzr, w30, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc w1, w28, wzr, mi
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc x19, x23, x29, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc xzr, x3, x4, ge
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc x5, xzr, x6, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc x7, x8, xzr, lo
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv w1, w0, w19, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv wzr, w5, w9, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv w9, wzr, w30, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv w1, w28, wzr, mi
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv x19, x23, x29, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv xzr, x3, x4, ge
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv x5, xzr, x6, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv x7, x8, xzr, lo
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg w1, w0, w19, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg wzr, w5, w9, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg w9, wzr, w30, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg w1, w28, wzr, mi
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg x19, x23, x29, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg xzr, x3, x4, ge
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg x5, xzr, x6, hs
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg x7, x8, xzr, lo
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cset w3, eq
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cset x9, pl
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csetm w20, ne
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csetm x30, ge
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc w2, wzr, wzr, al
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv x3, xzr, xzr, nv
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinc w3, w5, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinc wzr, w4, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cset w9, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinc x3, x5, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinc xzr, x4, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cset x9, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc w5, w6, w6, nv
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinc x1, x2, x2, al
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinv w3, w5, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinv wzr, w4, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csetm w9, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinv x3, x5, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cinv xzr, x4, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csetm x9, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv x1, x0, x0, al
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv w9, w8, w8, nv
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cneg w3, w5, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cneg wzr, w4, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cneg w9, wzr, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cneg x3, x5, gt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cneg xzr, x4, le
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - cneg x9, xzr, lt
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csneg x4, x8, x8, al
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - csinv w9, w8, w8, nv
+# CHECK-NEXT: - - - - - 0.50 0.50 - rbit w0, w7
+# CHECK-NEXT: - - - - - 0.50 0.50 - rbit x18, x3
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rev16 w17, w1
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rev16 x5, x2
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rev w18, w0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rev32 x20, x1
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rev x22, x2
+# CHECK-NEXT: - - - - - 1.00 - - clz w24, w3
+# CHECK-NEXT: - - - - - 1.00 - - clz x26, x4
+# CHECK-NEXT: - - - - - 1.00 - - cls w3, w5
+# CHECK-NEXT: - - - - - 1.00 - - cls x20, x5
+# CHECK-NEXT: - - - - 39.00 - - - udiv w0, w7, w10
+# CHECK-NEXT: - - - - 23.00 - - - udiv x9, x22, x4
+# CHECK-NEXT: - - - - 39.00 - - - sdiv w12, w21, w0
+# CHECK-NEXT: - - - - 23.00 - - - sdiv x13, x2, x1
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl w11, w12, w13
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl x14, x15, x16
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - lsr w17, w18, w19
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - lsr x20, x21, x22
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w23, w24, w25
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x26, x27, x28
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror w0, w1, w2
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror x3, x4, x5
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl w6, w7, w8
+# CHECK-NEXT: - - - 0.50 0.50 - - - lsl x9, x10, x11
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - lsr w12, w13, w14
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - lsr x15, x16, x17
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr w18, w19, w20
+# CHECK-NEXT: - - - 0.50 0.50 - - - asr x21, x22, x23
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror w24, w25, w26
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror x27, x28, x29
+# CHECK-NEXT: - - - 1.00 - - - - smulh x30, x29, x28
+# CHECK-NEXT: - - - 1.00 - - - - smulh xzr, x27, x26
+# CHECK-NEXT: - - - 1.00 - - - - umulh x30, x29, x28
+# CHECK-NEXT: - - - 1.00 - - - - umulh x23, x30, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd w1, w3, w7, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd wzr, w0, w9, w11
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd w13, wzr, w4, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd w19, w30, wzr, w29
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mul w4, w5, w6
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd x1, x3, x7, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd xzr, x0, x9, x11
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd x13, xzr, x4, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - madd x19, x30, xzr, x29
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mul x4, x5, x6
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub w1, w3, w7, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub wzr, w0, w9, w11
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub w13, wzr, w4, w4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub w19, w30, wzr, w29
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mneg w4, w5, w6
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub x1, x3, x7, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub xzr, x0, x9, x11
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub x13, xzr, x4, x4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - msub x19, x30, xzr, x29
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mneg x4, x5, x6
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaddl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaddl xzr, w10, w11, x12
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaddl x13, wzr, w14, x15
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaddl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull x19, w20, w21
+# CHECK-NEXT: - - - - - 0.50 0.50 - smsubl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - 0.50 0.50 - smsubl xzr, w10, w11, x12
+# CHECK-NEXT: - - - - - 0.50 0.50 - smsubl x13, wzr, w14, x15
+# CHECK-NEXT: - - - - - 0.50 0.50 - smsubl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - 0.50 0.50 - smnegl x19, w20, w21
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaddl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaddl xzr, w10, w11, x12
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaddl x13, wzr, w14, x15
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaddl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull x19, w20, w21
+# CHECK-NEXT: - - - - - 0.50 0.50 - umsubl x3, w5, w2, x9
+# CHECK-NEXT: - - - - - 0.50 0.50 - umsubl x16, w17, wzr, x18
+# CHECK-NEXT: - - - - - 0.50 0.50 - umnegl x19, w20, w21
+# CHECK-NEXT: - - - 1.00 - - - - smulh x30, x29, x28
+# CHECK-NEXT: - - - 1.00 - - - - smulh x23, x22, xzr
+# CHECK-NEXT: - - - 1.00 - - - - umulh x23, x22, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mul x19, x20, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mneg w21, w22, w23
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull x11, w13, w17
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull x11, w13, w17
+# CHECK-NEXT: - - - - - 0.50 0.50 - smnegl x11, w13, w17
+# CHECK-NEXT: - - - - - 0.50 0.50 - umnegl x11, w13, w17
+# CHECK-NEXT: - - - 0.50 0.50 - - - extr w3, w5, w7, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - extr w11, w13, w17, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - extr x3, x5, x7, #15
+# CHECK-NEXT: - - - 0.50 0.50 - - - extr x11, x13, x17, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror x19, x23, #24
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror x29, xzr, #63
+# CHECK-NEXT: - - - 0.50 0.50 - - - ror w9, w13, #31
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmp s3, s5
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmp s31, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmp s31, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmpe s29, s30
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmpe s15, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmpe s15, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmp d4, d12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmp d23, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmp d23, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmpe d26, d22
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmpe d29, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcmpe d29, #0.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmp s1, s31, #0, eq
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmp s3, s0, #15, hs
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmp s31, s15, #13, hs
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmp d9, d31, #0, le
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmp d3, d0, #15, gt
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmp d31, d5, #7, ne
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmpe s1, s31, #0, eq
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmpe s3, s0, #15, hs
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmpe s31, s15, #13, hs
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmpe d9, d31, #0, le
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmpe d3, d0, #15, gt
+# CHECK-NEXT: - - - - - 1.00 1.00 - fccmpe d31, d5, #7, ne
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcsel s3, s20, s9, pl
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcsel d9, d10, d11, mi
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmov s0, s1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fabs s2, s3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fneg s4, s5
+# CHECK-NEXT: - - - - - 1.00 - - fsqrt s6, s7
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvt d8, s9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvt h10, s11
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp s14, s15
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm s16, s17
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz s18, s19
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta s20, s21
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx s22, s23
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti s24, s25
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmov d0, d1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fabs d2, d3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fneg d4, d5
+# CHECK-NEXT: - - - - - 1.00 - - fsqrt d6, d7
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvt s8, d9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvt h10, d11
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn d12, d13
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp d14, d15
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm d16, d17
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz d18, d19
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta d20, d21
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx d22, d23
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti d24, d25
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvt s26, h27
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvt d28, h29
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul s20, s19, s17
+# CHECK-NEXT: - - - - - 1.00 - - fdiv s1, s2, s3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fadd s4, s5, s6
+# CHECK-NEXT: - - - - - 1.00 1.00 - fsub s7, s8, s9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmax s10, s11, s12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmin s13, s14, s15
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmaxnm s16, s17, s18
+# CHECK-NEXT: - - - - - 1.00 1.00 - fminnm s19, s20, s21
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmul s22, s23, s2
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul d20, d19, d17
+# CHECK-NEXT: - - - - - 1.00 - - fdiv d1, d2, d3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd d4, d5, d6
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub d7, d8, d9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmax d10, d11, d12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmin d13, d14, d15
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmaxnm d16, d17, d18
+# CHECK-NEXT: - - - - - 1.00 1.00 - fminnm d19, d20, d21
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmul d22, d23, d24
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmadd s3, s5, s6, s31
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmadd d3, d13, d0, d23
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmsub s3, s5, s6, s31
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmsub d3, d13, d0, d23
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmadd s3, s5, s6, s31
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmadd d3, d13, d0, d23
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmsub s3, s5, s6, s31
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmsub d3, d13, d0, d23
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w3, h5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs wzr, h20, #13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w19, h0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x3, h5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x12, h30, #45
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x19, h0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w3, s5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs wzr, s20, #13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w19, s0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x3, s5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x12, s30, #45
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x19, s0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w3, d5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs wzr, d20, #13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w19, d0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x3, d5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x12, d30, #45
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x19, d0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w3, h5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu wzr, h20, #13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w19, h0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x3, h5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x12, h30, #45
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x19, h0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w3, s5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu wzr, s20, #13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w19, s0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x3, s5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x12, s30, #45
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x19, s0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w3, d5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu wzr, d20, #13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w19, d0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x3, d5, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x12, d30, #45
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x19, d0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h23, w19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h31, wzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h14, w0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h23, x19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h31, xzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h14, x0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s23, w19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s31, wzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s14, w0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s23, x19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s31, xzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s14, x0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d23, w19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d31, wzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d14, w0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d23, x19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d31, xzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d14, x0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h23, w19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h31, wzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h14, w0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h23, x19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h31, xzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h14, x0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s23, w19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s31, wzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s14, w0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s23, x19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s31, xzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s14, x0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d23, w19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d31, wzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d14, w0, #32
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d23, x19, #1
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d31, xzr, #20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d14, x0, #64
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtns w3, h31
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtns xzr, h12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtnu wzr, h12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtnu x0, h0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtps wzr, h9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtps x12, h20
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtpu w30, h23
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtpu x29, h3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtms w2, h3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtms x4, h5
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtmu w6, h7
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtmu x8, h9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w10, h11
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x12, h13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w14, h15
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x15, h16
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h17, w18
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h19, x20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf h21, w22
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf h23, x24
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtas w25, h26
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtas x27, h28
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtau w29, h30
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtau xzr, h0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtns w3, s31
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtns xzr, s12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtnu wzr, s12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtnu x0, s0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtps wzr, s9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtps x12, s20
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtpu w30, s23
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtpu x29, s3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtms w2, s3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtms x4, s5
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtmu w6, s7
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtmu x8, s9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w10, s11
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x12, s13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w14, s15
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x15, s16
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s17, w18
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s19, x20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf s21, w22
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf s23, x24
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtas w25, s26
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtas x27, s28
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtau w29, s30
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtau xzr, s0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtns w3, d31
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtns xzr, d12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtnu wzr, d12
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtnu x0, d0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtps wzr, d9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtps x12, d20
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtpu w30, d23
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtpu x29, d3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtms w2, d3
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtms x4, d5
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtmu w6, d7
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtmu x8, d9
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs w10, d11
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzs x12, d13
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu w14, d15
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtzu x15, d16
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d17, w18
+# CHECK-NEXT: - - - - - 1.00 1.00 - scvtf d19, x20
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d21, w22
+# CHECK-NEXT: - - - - - 1.00 1.00 - ucvtf d23, x24
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtas w25, d26
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtas x27, d28
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtau w29, d30
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcvtau xzr, d0
+# CHECK-NEXT: - - - - - 2.00 - - fmov w3, s9
+# CHECK-NEXT: - - - - - 2.00 - - fmov s9, w3
+# CHECK-NEXT: - - - - - 2.00 - - fmov x20, d31
+# CHECK-NEXT: - - - - - 2.00 - - fmov d1, x15
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmov x3, v12.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmov v1.d[1], x19
+# CHECK-NEXT: - - - - - 2.00 - - fmov s2, #0.12500000
+# CHECK-NEXT: - - - - - 2.00 - - fmov s3, #1.00000000
+# CHECK-NEXT: - - - - - 2.00 - - fmov d30, #16.00000000
+# CHECK-NEXT: - - - - - 2.00 - - fmov s4, #1.06250000
+# CHECK-NEXT: - - - - - 2.00 - - fmov d10, #1.93750000
+# CHECK-NEXT: - - - - - 2.00 - - fmov s12, #-1.00000000
+# CHECK-NEXT: - - - - - 2.00 - - fmov d16, #8.50000000
+# CHECK-NEXT: - - 1.00 - - - - - ldr w3, #0
+# CHECK-NEXT: - - 1.00 - - - - - ldr x29, #4
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsw xzr, #-4
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr s0, #8
+# CHECK-NEXT: - - 1.00 - - - - - ldr d0, #1048572
+# CHECK-NEXT: - - 1.00 - - - - - ldr q0, #-1048576
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfm pldl1strm, #0
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfm #22, #0
+# CHECK-NEXT: - 1.00 1.00 - - - - - stxrb w18, w8, [sp]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stxrh w24, w15, [x16]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stxr w5, w6, [x17]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stxr w1, x10, [x21]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxrb w30, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxrh w17, [x4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxr w22, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxr x11, [x29]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxr x11, [x29]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxr x11, [x29]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stxp w12, w11, w10, [sp]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stxp wzr, x27, x9, [x12]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxp w0, wzr, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxp x17, x0, [x18]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldxp x17, x0, [x18]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stlxrb w12, w22, [x0]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stlxrh w10, w1, [x1]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stlxr w9, w2, [x2]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stlxr w9, x3, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxrb w8, [x4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxrh w7, [x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxr w6, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxr x5, [x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxr x5, [x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxr x5, [x6]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stlxp w4, w5, w6, [sp]
+# CHECK-NEXT: - 1.00 1.00 - - - - - stlxp wzr, x6, x7, [x1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxp w5, w18, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxp x6, x19, [x22]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldaxp x6, x19, [x22]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stlrb w24, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stlrh w25, [x30]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stlr w26, [x29]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stlr x27, [x28]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stlr x27, [x28]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stlr x27, [x28]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldarb w23, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldarh w22, [x30]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldar wzr, [x29]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldar x21, [x28]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldar x21, [x28]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldar x21, [x28]
+# CHECK-NEXT: - 0.50 0.50 - - - - - sturb w9, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - sturh wzr, [x12, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur w16, [x0, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur x28, [x14, #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldurb w1, [x20, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldurh w20, [x1, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur w12, [sp, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur xzr, [x12, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldursb x9, [x7, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldursh x17, [x19, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldursw x20, [x15, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfum pldl2keep, [sp, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldursb w19, [x1, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldursh w15, [x21, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur b0, [sp, #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur h12, [x12, #-1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur s15, [x0, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur d31, [x5, #25]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stur q9, [x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur b3, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur h5, [x4, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur s7, [x12, #-1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur d11, [x19, #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldur q13, [x1, #2]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strb w9, [x2], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strb w10, [x3], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strb w10, [x3], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strh w9, [x2], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strh w9, [x2], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strh w10, [x3], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str w19, [sp], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str w20, [x30], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str w21, [x12], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str xzr, [x9], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str x2, [x3], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str x19, [x12], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrb w9, [x2], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrb w10, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrb w10, [x3], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrh w9, [x2], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrh w9, [x2], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrh w10, [x3], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr w19, [sp], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr w20, [x30], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr w21, [x12], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr xzr, [x9], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr x2, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr x19, [x12], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb xzr, [x9], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb x2, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb x19, [x12], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh xzr, [x9], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh x2, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh x19, [x12], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldrsw xzr, [x9], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldrsw x2, [x3], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldrsw x19, [x12], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb wzr, [x9], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb w2, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb w19, [x12], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh wzr, [x9], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh w2, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh w19, [x12], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str b0, [x0], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str b3, [x3], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str b5, [sp], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str h10, [x10], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str h13, [x23], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str h15, [sp], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str s20, [x20], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str s23, [x23], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str s25, [x0], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str d20, [x20], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str d23, [x23], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str d25, [x0], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr b0, [x0], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr b3, [x3], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr b5, [sp], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr h10, [x10], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr h13, [x23], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr h15, [sp], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr s20, [x20], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr s23, [x23], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr s25, [x0], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr d20, [x20], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr d23, [x23], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr d25, [x0], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr q20, [x1], #255
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr q23, [x9], #1
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr q25, [x20], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str q10, [x1], #255
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str q22, [sp], #1
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str q21, [x20], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr x3, [x4, #0]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strb w9, [x2, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strb w10, [x3, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strb w10, [x3, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strh w9, [x2, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strh w9, [x2, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - strh w10, [x3, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str w19, [sp, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str w20, [x30, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str w21, [x12, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str xzr, [x9, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str x2, [x3, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str x19, [x12, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrb w9, [x2, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrb w10, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrb w10, [x3, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrh w9, [x2, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrh w9, [x2, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrh w10, [x3, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr w19, [sp, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr w20, [x30, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr w21, [x12, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr xzr, [x9, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr x2, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr x19, [x12, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb xzr, [x9, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb x2, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb x19, [x12, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh xzr, [x9, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh x2, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh x19, [x12, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldrsw xzr, [x9, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldrsw x2, [x3, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldrsw x19, [x12, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb wzr, [x9, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb w2, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsb w19, [x12, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh wzr, [x9, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh w2, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldrsh w19, [x12, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str b0, [x0, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str b3, [x3, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str b5, [sp, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str h10, [x10, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str h13, [x23, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str h15, [sp, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str s20, [x20, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str s23, [x23, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str s25, [x0, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str d20, [x20, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str d23, [x23, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str d25, [x0, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr b0, [x0, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr b3, [x3, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr b5, [sp, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr h10, [x10, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr h13, [x23, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr h15, [sp, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr s20, [x20, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr s23, [x23, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr s25, [x0, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr d20, [x20, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr d23, [x23, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr d25, [x0, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr q20, [x1, #255]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr q23, [x9, #1]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldr q25, [x20, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str q10, [x1, #255]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str q22, [sp, #1]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - str q21, [x20, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - sttrb w9, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - sttrh wzr, [x12, #255]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - sttr w16, [x0, #-256]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - sttr x28, [x14, #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrb w1, [x20, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrh w20, [x1, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtr w12, [sp, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtr xzr, [x12, #255]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrsb x9, [x7, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrsh x17, [x19, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrsw x20, [x15, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrsb w19, [x1, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldtrsh w15, [x21, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x4, [x29]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x30, [x12, #32760]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x20, [sp, #8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr xzr, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w2, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w17, [sp, #16380]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w13, [x2, #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsw x2, [x5, #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsw x23, [sp, #16380]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w2, [x4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh w23, [x6, #8190]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh wzr, [sp, #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh x29, [x2, #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w26, [x3, #121]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w12, [x2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsb w27, [sp, #4095]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsb xzr, [x15]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str x30, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str w20, [x4, #16380]
+# CHECK-NEXT: - 0.50 0.50 - - - - - strh w17, [sp, #8190]
+# CHECK-NEXT: - 0.50 0.50 - - - - - strb w23, [x3, #4095]
+# CHECK-NEXT: - 0.50 0.50 - - - - - strb wzr, [x2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr b31, [sp, #4095]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr h20, [x2, #8190]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr s10, [x19, #16380]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr d3, [x10, #32760]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str q12, [sp, #65520]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w3, [sp, x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w9, [x27, x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsb w10, [x30, x7]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w11, [x29, x3, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - strb w12, [x28, xzr, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w14, [x26, w6, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsb w15, [x25, w7, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrb w17, [x23, w9, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsb x18, [x22, w10, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh w3, [sp, x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh w9, [x27, x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w10, [x30, x7, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - strh w11, [x29, x3, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w12, [x28, xzr, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh x13, [x27, x5, sxtx #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w14, [x26, w6, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w15, [x25, w7, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsh w16, [x24, w8, uxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w17, [x23, w9, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrh w18, [x22, w10, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - strh w19, [x21, wzr, sxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w3, [sp, x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr s9, [x27, x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w10, [x30, x7, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w11, [x29, x3, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str s12, [x28, xzr, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str w13, [x27, x5, sxtx #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str w14, [x26, w6, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w15, [x25, w7, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w16, [x24, w8, uxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsw x17, [x23, w9, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr w18, [x22, w10, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldrsw x19, [x21, wzr, sxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x3, [sp, x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str x9, [x27, x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr d10, [x30, x7, lsl #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str x11, [x29, x3, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x12, [x28, xzr, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x13, [x27, x5, sxtx #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfm pldl1keep, [x26, w6, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x15, [x25, w7, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x16, [x24, w8, uxtw #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x17, [x23, w9, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr x18, [x22, w10, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str d19, [x21, wzr, sxtw #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q3, [sp, x5]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q9, [x27, x6]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q10, [x30, x7, lsl #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str q11, [x29, x3, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str q12, [x28, xzr, sxtx]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str q13, [x27, x5, sxtx #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q14, [x26, w6, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q15, [x25, w7, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q16, [x24, w8, uxtw #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q17, [x23, w9, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - str q18, [x22, w10, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldr q19, [x21, wzr, sxtw #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp w3, w5, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp wzr, w9, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp w2, wzr, [sp, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp w9, w10, [sp, #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldpsw x9, x10, [sp, #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldpsw x9, x10, [x2, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldpsw x20, x30, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp x21, x29, [x2, #504]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp x22, x23, [x3, #-512]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp x24, x25, [x4, #8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp s29, s28, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp s27, s26, [sp, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp s1, s2, [x3, #44]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp d3, d5, [x9, #504]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp d7, d11, [x10, #-512]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp d2, d3, [x30, #-8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp q3, q5, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp q17, q19, [sp, #1008]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldp q23, q29, [x1, #-1024]
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp w3, w5, [sp], #0
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp wzr, w9, [sp], #252
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp w2, wzr, [sp], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp w9, w10, [sp], #4
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldpsw x9, x10, [sp], #4
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldpsw x9, x10, [x2], #-256
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldpsw x20, x30, [sp], #252
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp x21, x29, [x2], #504
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp x22, x23, [x3], #-512
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp x24, x25, [x4], #8
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp s29, s28, [sp], #252
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp s27, s26, [sp], #-256
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp s1, s2, [x3], #44
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp d3, d5, [x9], #504
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp d7, d11, [x10], #-512
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp d2, d3, [x30], #-8
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp q3, q5, [sp], #0
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp q17, q19, [sp], #1008
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp q23, q29, [x1], #-1024
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp w3, w5, [sp, #0]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp wzr, w9, [sp, #252]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp w2, wzr, [sp, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp w9, w10, [sp, #4]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldpsw x9, x10, [sp, #4]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldpsw x9, x10, [x2, #-256]!
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ldpsw x20, x30, [sp, #252]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp x21, x29, [x2, #504]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp x22, x23, [x3, #-512]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp x24, x25, [x4, #8]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp s29, s28, [sp, #252]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp s27, s26, [sp, #-256]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp s1, s2, [x3, #44]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp d3, d5, [x9, #504]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp d7, d11, [x10, #-512]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp d2, d3, [x30, #-8]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp q3, q5, [sp, #0]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - stp q17, q19, [sp, #1008]!
+# CHECK-NEXT: - 0.50 0.50 0.50 0.50 - - - ldp q23, q29, [x1, #-1024]!
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp w3, w5, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stnp wzr, w9, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp w2, wzr, [sp, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp w9, w10, [sp, #4]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp x21, x29, [x2, #504]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp x22, x23, [x3, #-512]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp x24, x25, [x4, #8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp s29, s28, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stnp s27, s26, [sp, #-256]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp s1, s2, [x3, #44]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stnp d3, d5, [x9, #504]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stnp d7, d11, [x10, #-512]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp d2, d3, [x30, #-8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stnp q3, q5, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - stnp q17, q19, [sp, #1008]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnp q23, q29, [x1, #-1024]
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov w3, #983055
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov x10, #-6148914691236517206
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w12, w23, w21
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w16, w15, w1, lsl #1
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w9, w4, w10, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w3, w30, w11
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and x3, x5, x7, lsl #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and x5, x14, x19, asr #4
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w3, w17, w19, ror #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w0, w2, wzr, lsr #17
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w3, w30, w11, asr #2
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and xzr, x4, x26
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and w3, wzr, w20, ror #2
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - and x7, x20, xzr, asr #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - bic x13, x20, x14, lsl #47
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - bic w2, w7, w9
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - orr w2, w7, w0, asr #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - orr x8, x9, x10, lsl #12
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - orn x3, x5, x7, asr #2
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - orn w2, w5, w29
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ands w7, wzr, w9, lsl #1
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - ands x3, x5, x20, ror #63
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - bics w3, w5, w7
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - bics x3, xzr, x3, lsl #1
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - tst w3, w7, lsl #31
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - tst x2, x20, asr #2
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov x3, x6
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov x3, xzr
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov wzr, w2
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov w3, w5
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movz w2, #0, lsl #16
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov w2, #-1235
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov x2, #5299989643264
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - mov x2, #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movk w3, #0
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movz x4, #0, lsl #16
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movk w5, #0, lsl #16
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movz x6, #0, lsl #32
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movk x7, #0, lsl #32
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movz x8, #0, lsl #48
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - movk x9, #0, lsl #48
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adr x2, #1600
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adrp x21, #6553600
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - adr x0, #262144
+# CHECK-NEXT: 1.00 - - - - - - - tbz x12, #62, #0
+# CHECK-NEXT: 1.00 - - - - - - - tbz x12, #62, #4
+# CHECK-NEXT: 1.00 - - - - - - - tbz x12, #62, #-32768
+# CHECK-NEXT: 1.00 - - - - - - - tbnz x12, #60, #32764
+# CHECK-NEXT: 1.00 - - - - - - - b #4
+# CHECK-NEXT: 1.00 - - - - - - - b #-4
+# CHECK-NEXT: 1.00 - - - - - - - b #134217724
+# CHECK-NEXT: 1.00 - - - - - - - br x20
+# CHECK-NEXT: 1.00 - - - - - - - blr xzr
+# CHECK-NEXT: 1.00 - - - - - - - ret x10
+# CHECK-NEXT: 1.00 - - - - - - - ret
+# CHECK-NEXT: 1.00 - - - - - - - eret
+# CHECK-NEXT: 1.00 - - - - - - - drps
--- /dev/null
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=a64fx -instruction-tables < %s | FileCheck %s
+
+abs d29, d24
+abs v0.16b, v0.16b
+abs v0.2d, v0.2d
+abs v0.2s, v0.2s
+abs v0.4h, v0.4h
+abs v0.4s, v0.4s
+abs v0.8b, v0.8b
+abs v0.8h, v0.8h
+add d17, d31, d29
+add v0.8b, v0.8b, v0.8b
+addhn v0.2s, v0.2d, v0.2d
+addhn v0.4h, v0.4s, v0.4s
+addhn v0.8b, v0.8h, v0.8h
+addhn2 v0.16b, v0.8h, v0.8h
+addhn2 v0.4s, v0.2d, v0.2d
+addhn2 v0.8h, v0.4s, v0.4s
+addp v0.2d, v0.2d, v0.2d
+addp v0.8b, v0.8b, v0.8b
+and v0.8b, v0.8b, v0.8b
+bic v0.4h, #15, lsl #8
+bic v0.8b, v0.8b, v0.8b
+bif v0.16b, v0.16b, v0.16b
+bit v0.16b, v0.16b, v0.16b
+bsl v0.8b, v0.8b, v0.8b
+cls v0.16b, v0.16b
+cls v0.2s, v0.2s
+cls v0.4h, v0.4h
+cls v0.4s, v0.4s
+cls v0.8b, v0.8b
+cls v0.8h, v0.8h
+clz v0.16b, v0.16b
+clz v0.2s, v0.2s
+clz v0.4h, v0.4h
+clz v0.4s, v0.4s
+clz v0.8b, v0.8b
+clz v0.8h, v0.8h
+cmeq d20, d21, 0
+cmeq d20, d21, d22
+cmeq v0.16b, v0.16b, 0
+cmeq v0.16b, v0.16b, v0.16b
+cmge d20, d21, 0
+cmge d20, d21, d22
+cmge v0.4h, v0.4h, v0.4h
+cmge v0.8b, v0.8b, 0
+cmgt d20, d21, 0
+cmgt d20, d21, d22
+cmgt v0.2s, v0.2s, 0
+cmgt v0.4s, v0.4s, v0.4s
+cmhi d20, d21, d22
+cmhi v0.8h, v0.8h, v0.8h
+cmhs d20, d21, d22
+cmhs v0.8b, v0.8b, v0.8b
+cmle d20, d21, 0
+cmle v0.2d, v0.2d, 0
+cmlt d20, d21, 0
+cmlt v0.8h, v0.8h, 0
+cmtst d20, d21, d22
+cmtst v0.2s, v0.2s, v0.2s
+cnt v0.16b, v0.16b
+cnt v0.8b, v0.8b
+dup v0.16b,w28
+dup v0.2d,x28
+dup v0.2s,w28
+dup v0.4h,w28
+dup v0.4s,w28
+dup v0.8b,w28
+dup v0.8h,w28
+eor v0.16b, v0.16b, v0.16b
+ext v0.16b, v0.16b, v0.16b, #3
+ext v0.8b, v0.8b, v0.8b, #3
+fabd d29, d24, d20
+fabd s29, s24, s20
+fabd v0.4s, v0.4s, v0.4s
+fabs v0.2d, v0.2d
+fabs v0.2s, v0.2s
+fabs v0.4h, v0.4h
+fabs v0.4s, v0.4s
+fabs v0.8h, v0.8h
+facge d20, d21, d22
+facge s10, s11, s12
+facge v0.4s, v0.4s, v0.4s
+facgt d20, d21, d22
+facgt s10, s11, s12
+facgt v0.2d, v0.2d, v0.2d
+fadd v0.4s, v0.4s, v0.4s
+faddp v0.2s, v0.2s, v0.2s
+faddp v0.4s, v0.4s, v0.4s
+fcmeq d20, d21, #0.0
+fcmeq d20, d21, d22
+fcmeq s10, s11, #0.0
+fcmeq s10, s11, s12
+fcmeq v0.2s, v0.2s, #0.0
+fcmeq v0.2s, v0.2s, v0.2s
+fcmge d20, d21, #0.0
+fcmge d20, d21, d22
+fcmge s10, s11, #0.0
+fcmge s10, s11, s12
+fcmge v0.2d, v0.2d, #0.0
+fcmge v0.4s, v0.4s, v0.4s
+fcmgt d20, d21, #0.0
+fcmgt d20, d21, d22
+fcmgt s10, s11, #0.0
+fcmgt s10, s11, s12
+fcmgt v0.4s, v0.4s, #0.0
+fcmgt v0.4s, v0.4s, v0.4s
+fcmle d20, d21, #0.0
+fcmle s10, s11, #0.0
+fcmle v0.2d, v0.2d, #0.0
+fcmlt d20, d21, #0.0
+fcmlt s10, s11, #0.0
+fcmlt v0.4s, v0.4s, #0.0
+fcvtas d21, d14
+fcvtas s12, s13
+fcvtas v0.2d, v0.2d
+fcvtas v0.2s, v0.2s
+fcvtas v0.4h, v0.4h
+fcvtas v0.4s, v0.4s
+fcvtas v0.8h, v0.8h
+fcvtau d21, d14
+fcvtau s12, s13
+fcvtau v0.2d, v0.2d
+fcvtau v0.2s, v0.2s
+fcvtau v0.4h, v0.4h
+fcvtau v0.4s, v0.4s
+fcvtau v0.8h, v0.8h
+fcvtl v0.2d, v0.2s
+fcvtl v0.4s, v0.4h
+fcvtl2 v0.2d, v0.4s
+fcvtl2 v0.4s, v0.8h
+fcvtms d21, d14
+fcvtms s22, s13
+fcvtms v0.2d, v0.2d
+fcvtms v0.2s, v0.2s
+fcvtms v0.4h, v0.4h
+fcvtms v0.4s, v0.4s
+fcvtms v0.8h, v0.8h
+fcvtmu d21, d14
+fcvtmu s12, s13
+fcvtmu v0.2d, v0.2d
+fcvtmu v0.2s, v0.2s
+fcvtmu v0.4h, v0.4h
+fcvtmu v0.4s, v0.4s
+fcvtmu v0.8h, v0.8h
+fcvtn v0.2s, v0.2d
+fcvtn v0.4h, v0.4s
+fcvtn2 v0.4s, v0.2d
+fcvtn2 v0.8h, v0.4s
+fcvtns d21, d14
+fcvtns s22, s13
+fcvtns v0.2d, v0.2d
+fcvtns v0.2s, v0.2s
+fcvtns v0.4h, v0.4h
+fcvtns v0.4s, v0.4s
+fcvtns v0.8h, v0.8h
+fcvtnu d21, d14
+fcvtnu s12, s13
+fcvtnu v0.2d, v0.2d
+fcvtnu v0.2s, v0.2s
+fcvtnu v0.4h, v0.4h
+fcvtnu v0.4s, v0.4s
+fcvtnu v0.8h, v0.8h
+fcvtps d21, d14
+fcvtps s22, s13
+fcvtps v0.2d, v0.2d
+fcvtps v0.2s, v0.2s
+fcvtps v0.4h, v0.4h
+fcvtps v0.4s, v0.4s
+fcvtps v0.8h, v0.8h
+fcvtpu d21, d14
+fcvtpu s12, s13
+fcvtpu v0.2d, v0.2d
+fcvtpu v0.2s, v0.2s
+fcvtpu v0.4h, v0.4h
+fcvtpu v0.4s, v0.4s
+fcvtpu v0.8h, v0.8h
+fcvtxn s22, d13
+fcvtxn v0.2s, v0.2d
+fcvtxn2 v0.4s, v0.2d
+fcvtzs d21, d12, #1
+fcvtzs d21, d14
+fcvtzs s12, s13
+fcvtzs s21, s12, #1
+fcvtzs v0.2d, v0.2d
+fcvtzs v0.2d, v0.2d, #3
+fcvtzs v0.2s, v0.2s
+fcvtzs v0.2s, v0.2s, #3
+fcvtzs v0.4h, v0.4h
+fcvtzs v0.4s, v0.4s
+fcvtzs v0.4s, v0.4s, #3
+fcvtzs v0.8h, v0.8h
+fcvtzu d21, d12, #1
+fcvtzu d21, d14
+fcvtzu s12, s13
+fcvtzu s21, s12, #1
+fcvtzu v0.2d, v0.2d
+fcvtzu v0.2d, v0.2d, #3
+fcvtzu v0.2s, v0.2s
+fcvtzu v0.2s, v0.2s, #3
+fcvtzu v0.4h, v0.4h
+fcvtzu v0.4s, v0.4s
+fcvtzu v0.4s, v0.4s, #3
+fcvtzu v0.8h, v0.8h
+fdiv v0.2s, v0.2s, v0.2s
+fmax v0.2d, v0.2d, v0.2d
+fmax v0.2s, v0.2s, v0.2s
+fmax v0.4s, v0.4s, v0.4s
+fmaxnm v0.2d, v0.2d, v0.2d
+fmaxnm v0.2s, v0.2s, v0.2s
+fmaxnm v0.4s, v0.4s, v0.4s
+fmaxnmp v0.2d, v0.2d, v0.2d
+fmaxnmp v0.2s, v0.2s, v0.2s
+fmaxnmp v0.4s, v0.4s, v0.4s
+fmaxp v0.2d, v0.2d, v0.2d
+fmaxp v0.2s, v0.2s, v0.2s
+fmaxp v0.4s, v0.4s, v0.4s
+fmin v0.2d, v0.2d, v0.2d
+fmin v0.2s, v0.2s, v0.2s
+fmin v0.4s, v0.4s, v0.4s
+fminnm v0.2d, v0.2d, v0.2d
+fminnm v0.2s, v0.2s, v0.2s
+fminnm v0.4s, v0.4s, v0.4s
+fminnmp v0.2d, v0.2d, v0.2d
+fminnmp v0.2s, v0.2s, v0.2s
+fminnmp v0.4s, v0.4s, v0.4s
+fminp v0.2d, v0.2d, v0.2d
+fminp v0.2s, v0.2s, v0.2s
+fminp v0.4s, v0.4s, v0.4s
+fmla d0, d1, v0.d[1]
+fmla s0, s1, v0.s[3]
+fmla v0.2s, v0.2s, v0.2s
+fmls d0, d4, v0.d[1]
+fmls s3, s5, v0.s[3]
+fmls v0.2s, v0.2s, v0.2s
+fmov v0.2d, #-1.25
+fmov v0.2s, #13.0
+fmov v0.4s, #1.0
+fmul d0, d1, v0.d[1]
+fmul s0, s1, v0.s[3]
+fmul v0.2s, v0.2s, v0.2s
+fmulx d0, d4, v0.d[1]
+fmulx d23, d11, d1
+fmulx s20, s22, s15
+fmulx s3, s5, v0.s[3]
+fmulx v0.2d, v0.2d, v0.2d
+fmulx v0.2s, v0.2s, v0.2s
+fmulx v0.4s, v0.4s, v0.4s
+fneg v0.2d, v0.2d
+fneg v0.2s, v0.2s
+fneg v0.4h, v0.4h
+fneg v0.4s, v0.4s
+fneg v0.8h, v0.8h
+frecpe d13, d13
+frecpe s19, s14
+frecpe v0.2d, v0.2d
+frecpe v0.2s, v0.2s
+frecpe v0.4h, v0.4h
+frecpe v0.4s, v0.4s
+frecpe v0.8h, v0.8h
+frecps v0.4s, v0.4s, v0.4s
+frecps d22, d30, d21
+frecps s21, s16, s13
+frecpx d16, d19
+frecpx s18, s10
+frinta v0.2d, v0.2d
+frinta v0.2s, v0.2s
+frinta v0.4h, v0.4h
+frinta v0.4s, v0.4s
+frinta v0.8h, v0.8h
+frinti v0.2d, v0.2d
+frinti v0.2s, v0.2s
+frinti v0.4h, v0.4h
+frinti v0.4s, v0.4s
+frinti v0.8h, v0.8h
+frintm v0.2d, v0.2d
+frintm v0.2s, v0.2s
+frintm v0.4h, v0.4h
+frintm v0.4s, v0.4s
+frintm v0.8h, v0.8h
+frintn v0.2d, v0.2d
+frintn v0.2s, v0.2s
+frintn v0.4h, v0.4h
+frintn v0.4s, v0.4s
+frintn v0.8h, v0.8h
+frintp v0.2d, v0.2d
+frintp v0.2s, v0.2s
+frintp v0.4h, v0.4h
+frintp v0.4s, v0.4s
+frintp v0.8h, v0.8h
+frintx v0.2d, v0.2d
+frintx v0.2s, v0.2s
+frintx v0.4h, v0.4h
+frintx v0.4s, v0.4s
+frintx v0.8h, v0.8h
+frintz v0.2d, v0.2d
+frintz v0.2s, v0.2s
+frintz v0.4h, v0.4h
+frintz v0.4s, v0.4s
+frintz v0.8h, v0.8h
+frsqrte d21, d12
+frsqrte s22, s13
+frsqrte v0.2d, v0.2d
+frsqrte v0.2s, v0.2s
+frsqrte v0.4h, v0.4h
+frsqrte v0.4s, v0.4s
+frsqrte v0.8h, v0.8h
+frsqrts d8, d22, d18
+frsqrts s21, s5, s12
+frsqrts v0.2d, v0.2d, v0.2d
+fsqrt v0.2d, v0.2d
+fsqrt v0.2s, v0.2s
+fsqrt v0.4h, v0.4h
+fsqrt v0.4s, v0.4s
+fsqrt v0.8h, v0.8h
+fsub v0.2s, v0.2s, v0.2s
+ld1 { v0.16b }, [x0]
+ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+ld1 { v0.4s, v1.4s }, [sp], #32
+ld1 { v0.4s, v1.4s, v2.4s }, [sp]
+ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+ld1 { v0.8h }, [x15], x2
+ld1 { v0.8h, v1.8h }, [x15]
+ld1 { v0.b }[9], [x0]
+ld1 { v0.b }[9], [x0], #1
+ld1r { v0.16b }, [x0]
+ld1r { v0.16b }, [x0], #1
+ld1r { v0.8h }, [x15]
+ld1r { v0.8h }, [x15], #2
+ld2 { v0.16b, v1.16b }, [x0], x1
+ld2 { v0.8b, v1.8b }, [x0]
+ld2 { v0.h, v1.h }[7], [x15]
+ld2 { v0.h, v1.h }[7], [x15], #4
+ld2r { v0.2d, v1.2d }, [x0]
+ld2r { v0.2d, v1.2d }, [x0], #16
+ld2r { v0.4s, v1.4s }, [sp]
+ld2r { v0.4s, v1.4s }, [sp], #8
+ld3 { v0.4h, v1.4h, v2.4h }, [x15]
+ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+ld3 { v0.s, v1.s, v2.s }[3], [sp]
+ld3 { v0.s, v1.s, v2.s }[3], [sp], x3
+ld3r { v0.4h, v1.4h, v2.4h }, [x15]
+ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6
+ld3r { v0.8b, v1.8b, v2.8b }, [x0]
+ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3
+ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
+ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
+ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0
+ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp]
+ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7
+ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
+mla v0.8b, v0.8b, v0.8b
+mls v0.4h, v0.4h, v0.4h
+mov b0, v0.b[15]
+mov d6, v0.d[1]
+mov h2, v0.h[5]
+mov s17, v0.s[2]
+mov v0.16b, v0.16b
+mov v0.8b, v0.8b
+movi d15, #0xff00ff00ff00ff
+movi v0.16b, #31
+movi v0.2d, #0xff0000ff0000ffff
+movi v0.2s, #8, msl #8
+movi v0.4s, #255, lsl #24
+movi v0.8b, #255
+mul v0.8b, v0.8b, v0.8b
+mvni v0.2s, 0
+mvni v0.4s, #16, msl #16
+neg d29, d24
+neg v0.16b, v0.16b
+neg v0.2d, v0.2d
+neg v0.2s, v0.2s
+neg v0.4h, v0.4h
+neg v0.4s, v0.4s
+neg v0.8b, v0.8b
+neg v0.8h, v0.8h
+not v0.16b, v0.16b
+not v0.8b, v0.8b
+orn v0.16b, v0.16b, v0.16b
+orr v0.16b, v0.16b, v0.16b
+orr v0.8h, #31
+pmul v0.16b, v0.16b, v0.16b
+pmul v0.8b, v0.8b, v0.8b
+pmull v0.8h, v0.8b, v0.8b
+pmull2 v0.8h, v0.16b, v0.16b
+raddhn v0.2s, v0.2d, v0.2d
+raddhn v0.4h, v0.4s, v0.4s
+raddhn v0.8b, v0.8h, v0.8h
+raddhn2 v0.16b, v0.8h, v0.8h
+raddhn2 v0.4s, v0.2d, v0.2d
+raddhn2 v0.8h, v0.4s, v0.4s
+rbit v0.16b, v0.16b
+rbit v0.8b, v0.8b
+rev16 v21.8b, v1.8b
+rev16 v30.16b, v31.16b
+rev32 v0.4h, v9.4h
+rev32 v21.8b, v1.8b
+rev32 v30.16b, v31.16b
+rev32 v4.8h, v7.8h
+rev64 v0.16b, v31.16b
+rev64 v1.8b, v9.8b
+rev64 v13.4h, v21.4h
+rev64 v2.8h, v4.8h
+rev64 v4.2s, v0.2s
+rev64 v6.4s, v8.4s
+rshrn v0.2s, v0.2d, #3
+rshrn v0.4h, v0.4s, #3
+rshrn v0.8b, v0.8h, #3
+rshrn2 v0.16b, v0.8h, #3
+rshrn2 v0.4s, v0.2d, #3
+rshrn2 v0.8h, v0.4s, #3
+rsubhn v0.2s, v0.2d, v0.2d
+rsubhn v0.4h, v0.4s, v0.4s
+rsubhn v0.8b, v0.8h, v0.8h
+rsubhn2 v0.16b, v0.8h, v0.8h
+rsubhn2 v0.4s, v0.2d, v0.2d
+rsubhn2 v0.8h, v0.4s, v0.4s
+saba v0.16b, v0.16b, v0.16b
+sabal v0.2d, v0.2s, v0.2s
+sabal v0.4s, v0.4h, v0.4h
+sabal v0.8h, v0.8b, v0.8b
+sabal2 v0.2d, v0.4s, v0.4s
+sabal2 v0.4s, v0.8h, v0.8h
+sabal2 v0.8h, v0.16b, v0.16b
+sabd v0.4h, v0.4h, v0.4h
+sabdl v0.2d, v0.2s, v0.2s
+sabdl v0.4s, v0.4h, v0.4h
+sabdl v0.8h, v0.8b, v0.8b
+sabdl2 v0.2d, v0.4s, v0.4s
+sabdl2 v0.4s, v0.8h, v0.8h
+sabdl2 v0.8h, v0.16b, v0.16b
+sadalp v0.1d, v0.2s
+sadalp v0.2d, v0.4s
+sadalp v0.2s, v0.4h
+sadalp v0.4h, v0.8b
+sadalp v0.4s, v0.8h
+sadalp v0.8h, v0.16b
+saddl v0.2d, v0.2s, v0.2s
+saddl v0.4s, v0.4h, v0.4h
+saddl v0.8h, v0.8b, v0.8b
+saddl2 v0.2d, v0.4s, v0.4s
+saddl2 v0.4s, v0.8h, v0.8h
+saddl2 v0.8h, v0.16b, v0.16b
+saddlp v0.1d, v0.2s
+saddlp v0.2d, v0.4s
+saddlp v0.2s, v0.4h
+saddlp v0.4h, v0.8b
+saddlp v0.4s, v0.8h
+saddlp v0.8h, v0.16b
+saddw v0.2d, v0.2d, v0.2s
+saddw v0.4s, v0.4s, v0.4h
+saddw v0.8h, v0.8h, v0.8b
+saddw2 v0.2d, v0.2d, v0.4s
+saddw2 v0.4s, v0.4s, v0.8h
+saddw2 v0.8h, v0.8h, v0.16b
+scvtf d21, d12
+scvtf d21, d12, #64
+scvtf s22, s13
+scvtf s22, s13, #32
+scvtf v0.2d, v0.2d
+scvtf v0.2d, v0.2d, #3
+scvtf v0.2s, v0.2s
+scvtf v0.2s, v0.2s, #3
+scvtf v0.4h, v0.4h
+scvtf v0.4s, v0.4s
+scvtf v0.4s, v0.4s, #3
+scvtf v0.8h, v0.8h
+shadd v0.8b, v0.8b, v0.8b
+shl d7, d10, #12
+shl v0.16b, v0.16b, #3
+shl v0.2d, v0.2d, #3
+shl v0.4h, v0.4h, #3
+shl v0.4s, v0.4s, #3
+shll v0.2d, v0.2s, #32
+shll v0.4s, v0.4h, #16
+shll v0.8h, v0.8b, #8
+shll v0.2d, v0.2s, #32
+shll v0.4s, v0.4h, #16
+shll v0.8h, v0.8b, #8
+shll2 v0.2d, v0.4s, #32
+shll2 v0.4s, v0.8h, #16
+shll2 v0.8h, v0.16b, #8
+shll2 v0.2d, v0.4s, #32
+shll2 v0.4s, v0.8h, #16
+shll2 v0.8h, v0.16b, #8
+shrn v0.2s, v0.2d, #3
+shrn v0.4h, v0.4s, #3
+shrn v0.8b, v0.8h, #3
+shrn2 v0.16b, v0.8h, #3
+shrn2 v0.4s, v0.2d, #3
+shrn2 v0.8h, v0.4s, #3
+shsub v0.2s, v0.2s, v0.2s
+shsub v0.4h, v0.4h, v0.4h
+sli d10, d14, #12
+sli v0.16b, v0.16b, #3
+sli v0.2d, v0.2d, #3
+sli v0.2s, v0.2s, #3
+sli v0.4h, v0.4h, #3
+sli v0.4s, v0.4s, #3
+sli v0.8b, v0.8b, #3
+sli v0.8h, v0.8h, #3
+smax v0.2s, v0.2s, v0.2s
+smax v0.4h, v0.4h, v0.4h
+smax v0.8b, v0.8b, v0.8b
+smaxp v0.2s, v0.2s, v0.2s
+smaxp v0.4h, v0.4h, v0.4h
+smaxp v0.8b, v0.8b, v0.8b
+smin v0.16b, v0.16b, v0.16b
+smin v0.4s, v0.4s, v0.4s
+smin v0.8h, v0.8h, v0.8h
+sminp v0.16b, v0.16b, v0.16b
+sminp v0.4s, v0.4s, v0.4s
+sminp v0.8h, v0.8h, v0.8h
+smlal v0.2d, v0.2s, v0.2s
+smlal v0.4s, v0.4h, v0.4h
+smlal v0.8h, v0.8b, v0.8b
+smlal2 v0.2d, v0.4s, v0.4s
+smlal2 v0.4s, v0.8h, v0.8h
+smlal2 v0.8h, v0.16b, v0.16b
+smlsl v0.2d, v0.2s, v0.2s
+smlsl v0.4s, v0.4h, v0.4h
+smlsl v0.8h, v0.8b, v0.8b
+smlsl2 v0.2d, v0.4s, v0.4s
+smlsl2 v0.4s, v0.8h, v0.8h
+smlsl2 v0.8h, v0.16b, v0.16b
+smull v0.2d, v0.2s, v0.2s
+smull v0.4s, v0.4h, v0.4h
+smull v0.8h, v0.8b, v0.8b
+smull2 v0.2d, v0.4s, v0.4s
+smull2 v0.4s, v0.8h, v0.8h
+smull2 v0.8h, v0.16b, v0.16b
+sqabs b19, b14
+sqabs d18, d12
+sqabs h21, h15
+sqabs s20, s12
+sqabs v0.16b, v0.16b
+sqabs v0.2d, v0.2d
+sqabs v0.2s, v0.2s
+sqabs v0.4h, v0.4h
+sqabs v0.4s, v0.4s
+sqabs v0.8b, v0.8b
+sqabs v0.8h, v0.8h
+sqadd b20, b11, b15
+sqadd v0.16b, v0.16b, v0.16b
+sqadd v0.2s, v0.2s, v0.2s
+sqdmlal d19, s24, s12
+sqdmlal d8, s9, v0.s[1]
+sqdmlal s0, h0, v0.h[3]
+sqdmlal s17, h27, h12
+sqdmlal v0.2d, v0.2s, v0.2s
+sqdmlal v0.4s, v0.4h, v0.4h
+sqdmlal2 v0.2d, v0.4s, v0.4s
+sqdmlal2 v0.4s, v0.8h, v0.8h
+sqdmlsl d12, s23, s13
+sqdmlsl d8, s9, v0.s[1]
+sqdmlsl s0, h0, v0.h[3]
+sqdmlsl s14, h12, h25
+sqdmlsl v0.2d, v0.2s, v0.2s
+sqdmlsl v0.4s, v0.4h, v0.4h
+sqdmlsl2 v0.2d, v0.4s, v0.4s
+sqdmlsl2 v0.4s, v0.8h, v0.8h
+sqdmulh h10, h11, h12
+sqdmulh h7, h15, v0.h[3]
+sqdmulh s15, s14, v0.s[1]
+sqdmulh s20, s21, s2
+sqdmulh v0.2s, v0.2s, v0.2s
+sqdmulh v0.4s, v0.4s, v0.4s
+sqdmull d1, s1, v0.s[1]
+sqdmull d15, s22, s12
+sqdmull s1, h1, v0.h[3]
+sqdmull s12, h22, h12
+sqdmull v0.2d, v0.2s, v0.2s
+sqdmull v0.4s, v0.4h, v0.4h
+sqdmull2 v0.2d, v0.4s, v0.4s
+sqdmull2 v0.4s, v0.8h, v0.8h
+sqneg b19, b14
+sqneg d18, d12
+sqneg h21, h15
+sqneg s20, s12
+sqneg v0.16b, v0.16b
+sqneg v0.2d, v0.2d
+sqneg v0.2s, v0.2s
+sqneg v0.4h, v0.4h
+sqneg v0.4s, v0.4s
+sqneg v0.8b, v0.8b
+sqneg v0.8h, v0.8h
+sqrdmulh h10, h11, h12
+sqrdmulh h7, h15, v0.h[3]
+sqrdmulh s15, s14, v0.s[1]
+sqrdmulh s20, s21, s2
+sqrdmulh v0.4h, v0.4h, v0.4h
+sqrdmulh v0.8h, v0.8h, v0.8h
+sqrshl d31, d31, d31
+sqrshl h3, h4, h15
+sqrshl v0.2s, v0.2s, v0.2s
+sqrshl v0.4h, v0.4h, v0.4h
+sqrshl v0.8b, v0.8b, v0.8b
+sqrshrn b10, h13, #2
+sqrshrn h15, s10, #6
+sqrshrn s15, d12, #9
+sqrshrn v0.2s, v0.2d, #3
+sqrshrn v0.4h, v0.4s, #3
+sqrshrn v0.8b, v0.8h, #3
+sqrshrn2 v0.16b, v0.8h, #3
+sqrshrn2 v0.4s, v0.2d, #3
+sqrshrn2 v0.8h, v0.4s, #3
+sqrshrun b17, h10, #6
+sqrshrun h10, s13, #15
+sqrshrun s22, d16, #31
+sqrshrun v0.2s, v0.2d, #3
+sqrshrun v0.4h, v0.4s, #3
+sqrshrun v0.8b, v0.8h, #3
+sqrshrun2 v0.16b, v0.8h, #3
+sqrshrun2 v0.4s, v0.2d, #3
+sqrshrun2 v0.8h, v0.4s, #3
+sqshl b11, b19, #7
+sqshl d15, d16, #51
+sqshl d31, d31, d31
+sqshl h13, h18, #11
+sqshl h3, h4, h15
+sqshl s14, s17, #22
+sqshl v0.16b, v0.16b, #3
+sqshl v0.2d, v0.2d, #3
+sqshl v0.2s, v0.2s, #3
+sqshl v0.2s, v0.2s, v0.2s
+sqshl v0.4h, v0.4h, #3
+sqshl v0.4h, v0.4h, v0.4h
+sqshl v0.4s, v0.4s, #3
+sqshl v0.8b, v0.8b, #3
+sqshl v0.8b, v0.8b, v0.8b
+sqshl v0.8h, v0.8h, #3
+sqshlu b15, b18, #6
+sqshlu d11, d13, #32
+sqshlu h19, h17, #6
+sqshlu s16, s14, #25
+sqshlu v0.16b, v0.16b, #3
+sqshlu v0.2d, v0.2d, #3
+sqshlu v0.2s, v0.2s, #3
+sqshlu v0.4h, v0.4h, #3
+sqshlu v0.4s, v0.4s, #3
+sqshlu v0.8b, v0.8b, #3
+sqshlu v0.8h, v0.8h, #3
+sqshrn b10, h15, #5
+sqshrn h17, s10, #4
+sqshrn s18, d10, #31
+sqshrn v0.2s, v0.2d, #3
+sqshrn v0.4h, v0.4s, #3
+sqshrn v0.8b, v0.8h, #3
+sqshrn2 v0.16b, v0.8h, #3
+sqshrn2 v0.4s, v0.2d, #3
+sqshrn2 v0.8h, v0.4s, #3
+sqshrun b15, h10, #7
+sqshrun h20, s14, #3
+sqshrun s10, d15, #15
+sqshrun v0.2s, v0.2d, #3
+sqshrun v0.4h, v0.4s, #3
+sqshrun v0.8b, v0.8h, #3
+sqshrun2 v0.16b, v0.8h, #3
+sqshrun2 v0.4s, v0.2d, #3
+sqshrun2 v0.8h, v0.4s, #3
+sqsub s20, s10, s7
+sqsub v0.2d, v0.2d, v0.2d
+sqsub v0.4s, v0.4s, v0.4s
+sqsub v0.8b, v0.8b, v0.8b
+sqxtn b18, h18
+sqxtn h20, s17
+sqxtn s19, d14
+sqxtn v0.2s, v0.2d
+sqxtn v0.4h, v0.4s
+sqxtn v0.8b, v0.8h
+sqxtn2 v0.16b, v0.8h
+sqxtn2 v0.4s, v0.2d
+sqxtn2 v0.8h, v0.4s
+sqxtun b19, h14
+sqxtun h21, s15
+sqxtun s20, d12
+sqxtun v0.2s, v0.2d
+sqxtun v0.4h, v0.4s
+sqxtun v0.8b, v0.8h
+sqxtun2 v0.16b, v0.8h
+sqxtun2 v0.4s, v0.2d
+sqxtun2 v0.8h, v0.4s
+srhadd v0.2s, v0.2s, v0.2s
+srhadd v0.4h, v0.4h, v0.4h
+srhadd v0.8b, v0.8b, v0.8b
+sri d10, d12, #14
+sri v0.16b, v0.16b, #3
+sri v0.2d, v0.2d, #3
+sri v0.2s, v0.2s, #3
+sri v0.4h, v0.4h, #3
+sri v0.4s, v0.4s, #3
+sri v0.8b, v0.8b, #3
+sri v0.8h, v0.8h, #3
+srshl d16, d16, d16
+srshl v0.2s, v0.2s, v0.2s
+srshl v0.4h, v0.4h, v0.4h
+srshl v0.8b, v0.8b, v0.8b
+srshr d19, d18, #7
+srshr v0.16b, v0.16b, #3
+srshr v0.2d, v0.2d, #3
+srshr v0.2s, v0.2s, #3
+srshr v0.4h, v0.4h, #3
+srshr v0.4s, v0.4s, #3
+srshr v0.8b, v0.8b, #3
+srshr v0.8h, v0.8h, #3
+srsra d15, d11, #19
+srsra v0.16b, v0.16b, #3
+srsra v0.2d, v0.2d, #3
+srsra v0.2s, v0.2s, #3
+srsra v0.4h, v0.4h, #3
+srsra v0.4s, v0.4s, #3
+srsra v0.8b, v0.8b, #3
+srsra v0.8h, v0.8h, #3
+sshl d31, d31, d31
+sshl v0.2d, v0.2d, v0.2d
+sshl v0.2s, v0.2s, v0.2s
+sshl v0.4h, v0.4h, v0.4h
+sshl v0.8b, v0.8b, v0.8b
+sshll v0.2d, v0.2s, #3
+sshll2 v0.4s, v0.8h, #3
+sshr d15, d16, #12
+sshr v0.16b, v0.16b, #3
+sshr v0.2d, v0.2d, #3
+sshr v0.2s, v0.2s, #3
+sshr v0.4h, v0.4h, #3
+sshr v0.4s, v0.4s, #3
+sshr v0.8b, v0.8b, #3
+sshr v0.8h, v0.8h, #3
+ssra d18, d12, #21
+ssra v0.16b, v0.16b, #3
+ssra v0.2d, v0.2d, #3
+ssra v0.2s, v0.2s, #3
+ssra v0.4h, v0.4h, #3
+ssra v0.4s, v0.4s, #3
+ssra v0.8b, v0.8b, #3
+ssra v0.8h, v0.8h, #3
+ssubl v0.2d, v0.2s, v0.2s
+ssubl v0.4s, v0.4h, v0.4h
+ssubl v0.8h, v0.8b, v0.8b
+ssubl2 v0.2d, v0.4s, v0.4s
+ssubl2 v0.4s, v0.8h, v0.8h
+ssubl2 v0.8h, v0.16b, v0.16b
+ssubw v0.2d, v0.2d, v0.2s
+ssubw v0.4s, v0.4s, v0.4h
+ssubw v0.8h, v0.8h, v0.8b
+ssubw2 v0.2d, v0.2d, v0.4s
+ssubw2 v0.4s, v0.4s, v0.8h
+ssubw2 v0.8h, v0.8h, v0.16b
+st1 { v0.16b }, [x0]
+st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+st1 { v0.4s, v1.4s }, [sp], #32
+st1 { v0.4s, v1.4s, v2.4s }, [sp]
+st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+st1 { v0.8h }, [x15], x2
+st1 { v0.8h, v1.8h }, [x15]
+st1 { v0.d }[1], [x0]
+st1 { v0.d }[1], [x0], #8
+st2 { v0.16b, v1.16b }, [x0], x1
+st2 { v0.8b, v1.8b }, [x0]
+st2 { v0.s, v1.s }[3], [sp]
+st2 { v0.s, v1.s }[3], [sp], #8
+st3 { v0.4h, v1.4h, v2.4h }, [x15]
+st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+st3 { v0.h, v1.h, v2.h }[7], [x15]
+st3 { v0.h, v1.h, v2.h }[7], [x15], #6
+st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
+st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
+sub d15, d5, d16
+sub v0.2d, v0.2d, v0.2d
+suqadd b19, b14
+suqadd d18, d22
+suqadd h20, h15
+suqadd s21, s12
+suqadd v0.16b, v0.16b
+suqadd v0.2d, v0.2d
+suqadd v0.2s, v0.2s
+suqadd v0.4h, v0.4h
+suqadd v0.4s, v0.4s
+suqadd v0.8b, v0.8b
+suqadd v0.8h, v0.8h
+tbl v0.16b, { v0.16b }, v0.16b
+tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+tbl v0.8b, { v0.16b }, v0.8b
+tbl v0.8b, { v0.16b, v1.16b }, v0.8b
+tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+tbx v0.16b, { v0.16b }, v0.16b
+tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+tbx v0.8b, { v0.16b }, v0.8b
+tbx v0.8b, { v0.16b, v1.16b }, v0.8b
+tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+trn1 v0.16b, v0.16b, v0.16b
+trn1 v0.2d, v0.2d, v0.2d
+trn1 v0.2s, v0.2s, v0.2s
+trn1 v0.4h, v0.4h, v0.4h
+trn1 v0.4s, v0.4s, v0.4s
+trn1 v0.8b, v0.8b, v0.8b
+trn1 v0.8h, v0.8h, v0.8h
+trn2 v0.16b, v0.16b, v0.16b
+trn2 v0.2d, v0.2d, v0.2d
+trn2 v0.2s, v0.2s, v0.2s
+trn2 v0.4h, v0.4h, v0.4h
+trn2 v0.4s, v0.4s, v0.4s
+trn2 v0.8b, v0.8b, v0.8b
+trn2 v0.8h, v0.8h, v0.8h
+uaba v0.8b, v0.8b, v0.8b
+uabal v0.2d, v0.2s, v0.2s
+uabal v0.4s, v0.4h, v0.4h
+uabal v0.8h, v0.8b, v0.8b
+uabal2 v0.2d, v0.4s, v0.4s
+uabal2 v0.4s, v0.8h, v0.8h
+uabal2 v0.8h, v0.16b, v0.16b
+uabd v0.4h, v0.4h, v0.4h
+uabdl v0.2d, v0.2s, v0.2s
+uabdl v0.4s, v0.4h, v0.4h
+uabdl v0.8h, v0.8b, v0.8b
+uabdl2 v0.2d, v0.4s, v0.4s
+uabdl2 v0.4s, v0.8h, v0.8h
+uabdl2 v0.8h, v0.16b, v0.16b
+uadalp v0.1d, v0.2s
+uadalp v0.2d, v0.4s
+uadalp v0.2s, v0.4h
+uadalp v0.4h, v0.8b
+uadalp v0.4s, v0.8h
+uadalp v0.8h, v0.16b
+uaddl v0.2d, v0.2s, v0.2s
+uaddl v0.4s, v0.4h, v0.4h
+uaddl v0.8h, v0.8b, v0.8b
+uaddl2 v0.2d, v0.4s, v0.4s
+uaddl2 v0.4s, v0.8h, v0.8h
+uaddl2 v0.8h, v0.16b, v0.16b
+uaddlp v0.1d, v0.2s
+uaddlp v0.2d, v0.4s
+uaddlp v0.2s, v0.4h
+uaddlp v0.4h, v0.8b
+uaddlp v0.4s, v0.8h
+uaddlp v0.8h, v0.16b
+uaddw v0.2d, v0.2d, v0.2s
+uaddw v0.4s, v0.4s, v0.4h
+uaddw v0.8h, v0.8h, v0.8b
+uaddw2 v0.2d, v0.2d, v0.4s
+uaddw2 v0.4s, v0.4s, v0.8h
+uaddw2 v0.8h, v0.8h, v0.16b
+ucvtf d21, d14
+ucvtf d21, d14, #64
+ucvtf s22, s13
+ucvtf s22, s13, #32
+ucvtf v0.2d, v0.2d
+ucvtf v0.2d, v0.2d, #3
+ucvtf v0.2s, v0.2s
+ucvtf v0.2s, v0.2s, #3
+ucvtf v0.4h, v0.4h
+ucvtf v0.4s, v0.4s
+ucvtf v0.4s, v0.4s, #3
+ucvtf v0.8h, v0.8h
+uhadd v0.16b, v0.16b, v0.16b
+uhadd v0.8h, v0.8h, v0.8h
+uhsub v0.4s, v0.4s, v0.4s
+umax v0.16b, v0.16b, v0.16b
+umax v0.4s, v0.4s, v0.4s
+umax v0.8h, v0.8h, v0.8h
+umaxp v0.16b, v0.16b, v0.16b
+umaxp v0.4s, v0.4s, v0.4s
+umaxp v0.8h, v0.8h, v0.8h
+umin v0.2s, v0.2s, v0.2s
+umin v0.4h, v0.4h, v0.4h
+umin v0.8b, v0.8b, v0.8b
+uminp v0.2s, v0.2s, v0.2s
+uminp v0.4h, v0.4h, v0.4h
+uminp v0.8b, v0.8b, v0.8b
+umlal v0.2d, v0.2s, v0.2s
+umlal v0.4s, v0.4h, v0.4h
+umlal v0.8h, v0.8b, v0.8b
+umlal2 v0.2d, v0.4s, v0.4s
+umlal2 v0.4s, v0.8h, v0.8h
+umlal2 v0.8h, v0.16b, v0.16b
+umlsl v0.2d, v0.2s, v0.2s
+umlsl v0.4s, v0.4h, v0.4h
+umlsl v0.8h, v0.8b, v0.8b
+umlsl2 v0.2d, v0.4s, v0.4s
+umlsl2 v0.4s, v0.8h, v0.8h
+umlsl2 v0.8h, v0.16b, v0.16b
+umull v0.2d, v0.2s, v0.2s
+umull v0.4s, v0.4h, v0.4h
+umull v0.8h, v0.8b, v0.8b
+umull2 v0.2d, v0.4s, v0.4s
+umull2 v0.4s, v0.8h, v0.8h
+umull2 v0.8h, v0.16b, v0.16b
+uqadd h0, h1, h5
+uqadd v0.8h, v0.8h, v0.8h
+uqrshl b11, b20, b30
+uqrshl s23, s20, s16
+uqrshl v0.16b, v0.16b, v0.16b
+uqrshl v0.4s, v0.4s, v0.4s
+uqrshl v0.4s, v0.4s, v0.4s
+uqrshl v0.8h, v0.8h, v0.8h
+uqrshrn b10, h12, #5
+uqrshrn h12, s10, #14
+uqrshrn s10, d10, #25
+uqrshrn v0.2s, v0.2d, #3
+uqrshrn v0.4h, v0.4s, #3
+uqrshrn v0.8b, v0.8h, #3
+uqrshrn2 v0.16b, v0.8h, #3
+uqrshrn2 v0.4s, v0.2d, #3
+uqrshrn2 v0.8h, v0.4s, #3
+uqshl b11, b20, b30
+uqshl b18, b15, #6
+uqshl d15, d12, #19
+uqshl h11, h18, #7
+uqshl s14, s19, #18
+uqshl s23, s20, s16
+uqshl v0.16b, v0.16b, #3
+uqshl v0.16b, v0.16b, v0.16b
+uqshl v0.2d, v0.2d, #3
+uqshl v0.2d, v0.2d, v0.2d
+uqshl v0.2s, v0.2s, #3
+uqshl v0.4h, v0.4h, #3
+uqshl v0.4s, v0.4s, #3
+uqshl v0.4s, v0.4s, v0.4s
+uqshl v0.8b, v0.8b, #3
+uqshl v0.8h, v0.8h, #3
+uqshl v0.8h, v0.8h, v0.8h
+uqshrn b12, h10, #7
+uqshrn h10, s14, #5
+uqshrn s10, d12, #13
+uqshrn v0.2s, v0.2d, #3
+uqshrn v0.4h, v0.4s, #3
+uqshrn v0.8b, v0.8h, #3
+uqshrn2 v0.16b, v0.8h, #3
+uqshrn2 v0.4s, v0.2d, #3
+uqshrn2 v0.8h, v0.4s, #3
+uqsub d16, d16, d16
+uqsub v0.4h, v0.4h, v0.4h
+uqxtn b18, h18
+uqxtn h20, s17
+uqxtn s19, d14
+uqxtn v0.2s, v0.2d
+uqxtn v0.4h, v0.4s
+uqxtn v0.8b, v0.8h
+uqxtn2 v0.16b, v0.8h
+uqxtn2 v0.4s, v0.2d
+uqxtn2 v0.8h, v0.4s
+urecpe v0.2s, v0.2s
+urecpe v0.4s, v0.4s
+urhadd v0.16b, v0.16b, v0.16b
+urhadd v0.4s, v0.4s, v0.4s
+urhadd v0.8h, v0.8h, v0.8h
+urshl d8, d7, d4
+urshl v0.16b, v0.16b, v0.16b
+urshl v0.2d, v0.2d, v0.2d
+urshl v0.4s, v0.4s, v0.4s
+urshl v0.8h, v0.8h, v0.8h
+urshr d20, d23, #31
+urshr v0.16b, v0.16b, #3
+urshr v0.2d, v0.2d, #3
+urshr v0.2s, v0.2s, #3
+urshr v0.4h, v0.4h, #3
+urshr v0.4s, v0.4s, #3
+urshr v0.8b, v0.8b, #3
+urshr v0.8h, v0.8h, #3
+ursqrte v0.2s, v0.2s
+ursqrte v0.4s, v0.4s
+ursra d18, d10, #13
+ursra v0.16b, v0.16b, #3
+ursra v0.2d, v0.2d, #3
+ursra v0.2s, v0.2s, #3
+ursra v0.4h, v0.4h, #3
+ursra v0.4s, v0.4s, #3
+ursra v0.8b, v0.8b, #3
+ursra v0.8h, v0.8h, #3
+ushl d0, d0, d0
+ushl v0.16b, v0.16b, v0.16b
+ushl v0.4s, v0.4s, v0.4s
+ushl v0.8h, v0.8h, v0.8h
+ushll v0.4s, v0.4h, #3
+ushll2 v0.8h, v0.16b, #3
+ushr d10, d17, #18
+ushr v0.16b, v0.16b, #3
+ushr v0.2d, v0.2d, #3
+ushr v0.2s, v0.2s, #3
+ushr v0.4h, v0.4h, #3
+ushr v0.4s, v0.4s, #3
+ushr v0.8b, v0.8b, #3
+ushr v0.8h, v0.8h, #3
+usqadd b19, b14
+usqadd d18, d22
+usqadd h20, h15
+usqadd s21, s12
+usqadd v0.16b, v0.16b
+usqadd v0.2d, v0.2d
+usqadd v0.2s, v0.2s
+usqadd v0.4h, v0.4h
+usqadd v0.4s, v0.4s
+usqadd v0.8b, v0.8b
+usqadd v0.8h, v0.8h
+usra d20, d13, #61
+usra v0.16b, v0.16b, #3
+usra v0.2d, v0.2d, #3
+usra v0.2s, v0.2s, #3
+usra v0.4h, v0.4h, #3
+usra v0.4s, v0.4s, #3
+usra v0.8b, v0.8b, #3
+usra v0.8h, v0.8h, #3
+usubl v0.2d, v0.2s, v0.2s
+usubl v0.4s, v0.4h, v0.4h
+usubl v0.8h, v0.8b, v0.8b
+usubl2 v0.2d, v0.4s, v0.4s
+usubl2 v0.4s, v0.8h, v0.8h
+usubl2 v0.8h, v0.16b, v0.16b
+usubw v0.2d, v0.2d, v0.2s
+usubw v0.4s, v0.4s, v0.4h
+usubw v0.8h, v0.8h, v0.8b
+usubw2 v0.2d, v0.2d, v0.4s
+usubw2 v0.4s, v0.4s, v0.8h
+usubw2 v0.8h, v0.8h, v0.16b
+uzp1 v0.16b, v0.16b, v0.16b
+uzp1 v0.2d, v0.2d, v0.2d
+uzp1 v0.2s, v0.2s, v0.2s
+uzp1 v0.4h, v0.4h, v0.4h
+uzp1 v0.4s, v0.4s, v0.4s
+uzp1 v0.8b, v0.8b, v0.8b
+uzp1 v0.8h, v0.8h, v0.8h
+uzp2 v0.16b, v0.16b, v0.16b
+uzp2 v0.2d, v0.2d, v0.2d
+uzp2 v0.2s, v0.2s, v0.2s
+uzp2 v0.4h, v0.4h, v0.4h
+uzp2 v0.4s, v0.4s, v0.4s
+uzp2 v0.8b, v0.8b, v0.8b
+uzp2 v0.8h, v0.8h, v0.8h
+xtn v0.2s, v0.2d
+xtn v0.4h, v0.4s
+xtn v0.8b, v0.8h
+xtn2 v0.16b, v0.8h
+xtn2 v0.4s, v0.2d
+xtn2 v0.8h, v0.4s
+zip1 v0.16b, v0.16b, v0.16b
+zip1 v0.2d, v0.2d, v0.2d
+zip1 v0.2s, v0.2s, v0.2s
+zip1 v0.4h, v0.4h, v0.4h
+zip1 v0.4s, v0.4s, v0.4s
+zip1 v0.8b, v0.8b, v0.8b
+zip1 v0.8h, v0.8h, v0.8h
+zip2 v0.16b, v0.16b, v0.16b
+zip2 v0.2d, v0.2d, v0.2d
+zip2 v0.2s, v0.2s, v0.2s
+zip2 v0.4h, v0.4h, v0.4h
+zip2 v0.4s, v0.4s, v0.4s
+zip2 v0.8b, v0.8b, v0.8b
+zip2 v0.8h, v0.8h, v0.8h
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 4 0.50 abs d29, d24
+# CHECK-NEXT: 1 4 0.50 abs v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 abs v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 abs v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 abs v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 abs v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 abs v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 abs v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 add d17, d31, d29
+# CHECK-NEXT: 1 4 0.50 add v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 2 10 0.50 addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 2 10 0.50 addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 2 10 0.50 addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 2 10 0.50 addhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 2 10 0.50 addhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 2 10 0.50 addhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 addp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 addp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 and v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 bic v0.4h, #15, lsl #8
+# CHECK-NEXT: 1 4 0.50 bic v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 5 0.50 bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 5 0.50 bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 5 0.50 bsl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 1.00 cls v0.16b, v0.16b
+# CHECK-NEXT: 1 4 1.00 cls v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 cls v0.4h, v0.4h
+# CHECK-NEXT: 1 4 1.00 cls v0.4s, v0.4s
+# CHECK-NEXT: 1 4 1.00 cls v0.8b, v0.8b
+# CHECK-NEXT: 1 4 1.00 cls v0.8h, v0.8h
+# CHECK-NEXT: 1 4 1.00 clz v0.16b, v0.16b
+# CHECK-NEXT: 1 4 1.00 clz v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 clz v0.4h, v0.4h
+# CHECK-NEXT: 1 4 1.00 clz v0.4s, v0.4s
+# CHECK-NEXT: 1 4 1.00 clz v0.8b, v0.8b
+# CHECK-NEXT: 1 4 1.00 clz v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 cmeq d20, d21, #0
+# CHECK-NEXT: 1 4 0.50 cmeq d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 cmeq v0.16b, v0.16b, #0
+# CHECK-NEXT: 1 4 0.50 cmeq v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 cmge d20, d21, #0
+# CHECK-NEXT: 1 4 0.50 cmge d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 cmge v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 cmge v0.8b, v0.8b, #0
+# CHECK-NEXT: 1 4 0.50 cmgt d20, d21, #0
+# CHECK-NEXT: 1 4 0.50 cmgt d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 cmgt v0.2s, v0.2s, #0
+# CHECK-NEXT: 1 4 0.50 cmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 cmhi d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 cmhi v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 cmhs d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 cmhs v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 cmle d20, d21, #0
+# CHECK-NEXT: 1 4 0.50 cmle v0.2d, v0.2d, #0
+# CHECK-NEXT: 1 4 0.50 cmlt d20, d21, #0
+# CHECK-NEXT: 1 4 0.50 cmlt v0.8h, v0.8h, #0
+# CHECK-NEXT: 1 4 0.50 cmtst d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 cmtst v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 cnt v0.16b, v0.16b
+# CHECK-NEXT: 1 4 1.00 cnt v0.8b, v0.8b
+# CHECK-NEXT: 1 10 0.50 dup v0.16b, w28
+# CHECK-NEXT: 1 10 0.50 dup v0.2d, x28
+# CHECK-NEXT: 1 10 0.50 dup v0.2s, w28
+# CHECK-NEXT: 1 10 0.50 dup v0.4h, w28
+# CHECK-NEXT: 1 10 0.50 dup v0.4s, w28
+# CHECK-NEXT: 1 10 0.50 dup v0.8b, w28
+# CHECK-NEXT: 1 10 0.50 dup v0.8h, w28
+# CHECK-NEXT: 1 4 0.50 eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 6 1.00 ext v0.8b, v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 4 0.50 fabd d29, d24, d20
+# CHECK-NEXT: 1 4 0.50 fabd s29, s24, s20
+# CHECK-NEXT: 1 9 0.50 fabd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fabs v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 fabs v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fabs v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 fabs v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fabs v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 facge d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 facge s10, s11, s12
+# CHECK-NEXT: 1 4 0.50 facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 facgt d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 facgt s10, s11, s12
+# CHECK-NEXT: 1 4 0.50 facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 fadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 15 0.50 faddp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 15 0.50 faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcmeq d20, d21, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmeq d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 fcmeq s10, s11, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmeq s10, s11, s12
+# CHECK-NEXT: 1 4 0.50 fcmeq v0.2s, v0.2s, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmeq v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcmge d20, d21, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmge d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 fcmge s10, s11, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmge s10, s11, s12
+# CHECK-NEXT: 1 4 0.50 fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcmgt d20, d21, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmgt d20, d21, d22
+# CHECK-NEXT: 1 4 0.50 fcmgt s10, s11, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmgt s10, s11, s12
+# CHECK-NEXT: 1 4 0.50 fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcmle d20, d21, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmle s10, s11, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmlt d20, d21, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmlt s10, s11, #0.0
+# CHECK-NEXT: 1 4 0.50 fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: 2 15 0.50 fcvtas d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtas s12, s13
+# CHECK-NEXT: 2 15 0.50 fcvtas v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtas v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtas v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtas v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtas v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtau d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtau s12, s13
+# CHECK-NEXT: 2 15 0.50 fcvtau v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtau v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtau v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtau v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtau v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtl v0.2d, v0.2s
+# CHECK-NEXT: 2 15 0.50 fcvtl v0.4s, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtl2 v0.2d, v0.4s
+# CHECK-NEXT: 2 15 0.50 fcvtl2 v0.4s, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtms d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtms s22, s13
+# CHECK-NEXT: 2 15 0.50 fcvtms v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtms v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtms v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtms v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtms v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtmu d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtmu s12, s13
+# CHECK-NEXT: 2 15 0.50 fcvtmu v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtmu v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtmu v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtmu v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtmu v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtn v0.2s, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtn v0.4h, v0.4s
+# CHECK-NEXT: 2 15 0.50 fcvtn2 v0.4s, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: 2 15 0.50 fcvtns d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtns s22, s13
+# CHECK-NEXT: 2 15 0.50 fcvtns v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtns v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtns v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtns v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtns v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtnu d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtnu s12, s13
+# CHECK-NEXT: 2 15 0.50 fcvtnu v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtnu v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtnu v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtnu v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtnu v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtps d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtps s22, s13
+# CHECK-NEXT: 2 15 0.50 fcvtps v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtps v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtps v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtps v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtps v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtpu d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtpu s12, s13
+# CHECK-NEXT: 2 15 0.50 fcvtpu v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtpu v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fcvtpu v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtpu v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fcvtpu v0.8h, v0.8h
+# CHECK-NEXT: 2 15 0.50 fcvtxn s22, d13
+# CHECK-NEXT: 2 15 0.50 fcvtxn v0.2s, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtxn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 4 0.50 fcvtzs d21, d12, #1
+# CHECK-NEXT: 2 15 0.50 fcvtzs d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtzs s12, s13
+# CHECK-NEXT: 1 4 0.50 fcvtzs s21, s12, #1
+# CHECK-NEXT: 2 15 0.50 fcvtzs v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtzs v0.2d, v0.2d, #3
+# CHECK-NEXT: 2 15 0.50 fcvtzs v0.2s, v0.2s
+# CHECK-NEXT: 2 15 0.50 fcvtzs v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 fcvtzs v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtzs v0.4s, v0.4s
+# CHECK-NEXT: 2 15 0.50 fcvtzs v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 fcvtzs v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 fcvtzu d21, d12, #1
+# CHECK-NEXT: 2 15 0.50 fcvtzu d21, d14
+# CHECK-NEXT: 2 15 0.50 fcvtzu s12, s13
+# CHECK-NEXT: 1 4 0.50 fcvtzu s21, s12, #1
+# CHECK-NEXT: 2 15 0.50 fcvtzu v0.2d, v0.2d
+# CHECK-NEXT: 2 15 0.50 fcvtzu v0.2d, v0.2d, #3
+# CHECK-NEXT: 2 15 0.50 fcvtzu v0.2s, v0.2s
+# CHECK-NEXT: 2 15 0.50 fcvtzu v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 fcvtzu v0.4h, v0.4h
+# CHECK-NEXT: 2 15 0.50 fcvtzu v0.4s, v0.4s
+# CHECK-NEXT: 2 15 0.50 fcvtzu v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 fcvtzu v0.8h, v0.8h
+# CHECK-NEXT: 1 29 1.00 fdiv v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 fmax v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 1.00 fmax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 fmax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 1.00 fmaxnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 1.00 fmaxnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 fmaxnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 fmaxnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 fmaxnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 fmaxnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 fmaxp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 fmaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 fmaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 1.00 fmin v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 1.00 fmin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 fmin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 1.00 fminnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 1.00 fminnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 fminnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 fminnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 fminnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 fminnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 fminp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 fminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 fminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 9 0.50 fmla d0, d1, v0.d[1]
+# CHECK-NEXT: 1 9 0.50 fmla s0, s1, v0.s[3]
+# CHECK-NEXT: 1 9 0.50 fmla v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 9 0.50 fmls d0, d4, v0.d[1]
+# CHECK-NEXT: 1 9 0.50 fmls s3, s5, v0.s[3]
+# CHECK-NEXT: 1 9 0.50 fmls v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 1.00 fmov v0.2d, #-1.25000000
+# CHECK-NEXT: 1 4 1.00 fmov v0.2s, #13.00000000
+# CHECK-NEXT: 1 4 1.00 fmov v0.4s, #1.00000000
+# CHECK-NEXT: 1 9 0.50 fmul d0, d1, v0.d[1]
+# CHECK-NEXT: 1 9 0.50 fmul s0, s1, v0.s[3]
+# CHECK-NEXT: 1 9 0.50 fmul v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 9 0.50 fmulx d0, d4, v0.d[1]
+# CHECK-NEXT: 2 15 0.50 fmulx d23, d11, d1
+# CHECK-NEXT: 2 15 0.50 fmulx s20, s22, s15
+# CHECK-NEXT: 1 9 0.50 fmulx s3, s5, v0.s[3]
+# CHECK-NEXT: 1 9 0.50 fmulx v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 fmulx v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 9 0.50 fmulx v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fneg v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 fneg v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fneg v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 fneg v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fneg v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 frecpe d13, d13
+# CHECK-NEXT: 1 4 0.50 frecpe s19, s14
+# CHECK-NEXT: 1 4 0.50 frecpe v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 frecpe v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frecpe v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 frecpe v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frecpe v0.8h, v0.8h
+# CHECK-NEXT: 1 9 1.00 frecps v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frecps d22, d30, d21
+# CHECK-NEXT: 1 4 0.50 frecps s21, s16, s13
+# CHECK-NEXT: 1 4 0.50 frecpx d16, d19
+# CHECK-NEXT: 1 4 0.50 frecpx s18, s10
+# CHECK-NEXT: 1 9 0.50 frinta v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frinta v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frinta v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frinta v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frinta v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 frinti v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frinti v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frinti v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frinti v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frinti v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 frintm v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frintm v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frintm v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frintm v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frintm v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 frintn v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frintn v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frintn v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frintn v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frintn v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 frintp v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frintp v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frintp v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frintp v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frintp v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 frintx v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frintx v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frintx v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frintx v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frintx v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 frintz v0.2d, v0.2d
+# CHECK-NEXT: 1 9 0.50 frintz v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frintz v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 frintz v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frintz v0.8h, v0.8h
+# CHECK-NEXT: 1 43 1.00 frsqrte d21, d12
+# CHECK-NEXT: 1 29 1.00 frsqrte s22, s13
+# CHECK-NEXT: 1 43 1.00 frsqrte v0.2d, v0.2d
+# CHECK-NEXT: 1 29 1.00 frsqrte v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 frsqrte v0.4h, v0.4h
+# CHECK-NEXT: 1 29 1.00 frsqrte v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 frsqrte v0.8h, v0.8h
+# CHECK-NEXT: 1 43 1.00 frsqrts d8, d22, d18
+# CHECK-NEXT: 1 29 1.00 frsqrts s21, s5, s12
+# CHECK-NEXT: 1 43 1.00 frsqrts v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 43 1.00 fsqrt v0.2d, v0.2d
+# CHECK-NEXT: 1 29 1.00 fsqrt v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 fsqrt v0.4h, v0.4h
+# CHECK-NEXT: 1 29 1.00 fsqrt v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 fsqrt v0.8h, v0.8h
+# CHECK-NEXT: 1 9 0.50 fsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 11 0.50 * ld1 { v0.16b }, [x0]
+# CHECK-NEXT: 5 8 0.50 * ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: 4 8 0.50 * ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: 4 11 0.50 * ld1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: 3 11 0.50 * ld1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: 6 8 0.50 * ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: 3 11 0.50 * ld1 { v0.8h }, [x15], x2
+# CHECK-NEXT: 2 11 0.50 * ld1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: 2 8 0.33 * ld1 { v0.b }[9], [x0]
+# CHECK-NEXT: 4 8 0.33 * ld1 { v0.b }[9], [x0], #1
+# CHECK-NEXT: 1 8 0.50 * ld1r { v0.16b }, [x0]
+# CHECK-NEXT: 3 8 0.50 * ld1r { v0.16b }, [x0], #1
+# CHECK-NEXT: 1 8 0.50 * ld1r { v0.8h }, [x15]
+# CHECK-NEXT: 3 8 0.50 * ld1r { v0.8h }, [x15], #2
+# CHECK-NEXT: 4 11 0.50 * ld2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: 2 11 0.50 * ld2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: 4 8 0.33 * ld2 { v0.h, v1.h }[7], [x15]
+# CHECK-NEXT: 6 8 0.33 * ld2 { v0.h, v1.h }[7], [x15], #4
+# CHECK-NEXT: 2 8 0.50 * ld2r { v0.2d, v1.2d }, [x0]
+# CHECK-NEXT: 4 8 0.50 * ld2r { v0.2d, v1.2d }, [x0], #16
+# CHECK-NEXT: 2 8 0.50 * ld2r { v0.4s, v1.4s }, [sp]
+# CHECK-NEXT: 4 8 0.50 * ld2r { v0.4s, v1.4s }, [sp], #8
+# CHECK-NEXT: 3 11 0.50 * ld3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: 5 11 0.50 * ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: 6 8 0.33 * ld3 { v0.s, v1.s, v2.s }[3], [sp]
+# CHECK-NEXT: 8 8 0.33 * ld3 { v0.s, v1.s, v2.s }[3], [sp], x3
+# CHECK-NEXT: 3 8 0.50 * ld3r { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: 5 8 0.50 * ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6
+# CHECK-NEXT: 3 8 0.50 * ld3r { v0.8b, v1.8b, v2.8b }, [x0]
+# CHECK-NEXT: 5 8 0.50 * ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3
+# CHECK-NEXT: 4 11 0.50 * ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: 6 11 0.50 * ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: 8 8 0.33 * ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
+# CHECK-NEXT: 10 8 0.33 * ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
+# CHECK-NEXT: 10 8 0.33 * ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0
+# CHECK-NEXT: 4 8 0.50 * ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp]
+# CHECK-NEXT: 6 8 0.50 * ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7
+# CHECK-NEXT: 4 8 0.50 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: 6 8 0.50 * ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
+# CHECK-NEXT: 1 9 0.50 mla v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 9 0.50 mls v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 mov b0, v0.b[15]
+# CHECK-NEXT: 1 6 1.00 mov d6, v0.d[1]
+# CHECK-NEXT: 1 6 1.00 mov h2, v0.h[5]
+# CHECK-NEXT: 1 6 1.00 mov s17, v0.s[2]
+# CHECK-NEXT: 1 4 0.50 mov v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 mov v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 movi d15, #0xff00ff00ff00ff
+# CHECK-NEXT: 1 4 1.00 movi v0.16b, #31
+# CHECK-NEXT: 1 4 1.00 movi v0.2d, #0xff0000ff0000ffff
+# CHECK-NEXT: 1 4 1.00 movi v0.2s, #8, msl #8
+# CHECK-NEXT: 1 4 1.00 movi v0.4s, #255, lsl #24
+# CHECK-NEXT: 1 4 1.00 movi v0.8b, #255
+# CHECK-NEXT: 1 8 0.50 mul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 mvni v0.2s, #0
+# CHECK-NEXT: 1 4 0.50 mvni v0.4s, #16, msl #16
+# CHECK-NEXT: 1 4 0.50 neg d29, d24
+# CHECK-NEXT: 1 4 0.50 neg v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 neg v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 neg v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 neg v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 neg v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 neg v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 neg v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 mvn v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 mvn v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 orn v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 mov v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 orr v0.8h, #31
+# CHECK-NEXT: 1 8 0.50 pmul v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 8 0.50 pmul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 8 1.00 pmull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 8 1.00 pmull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 3 10 0.50 raddhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 raddhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 raddhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 raddhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 raddhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 raddhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 1 1 0.25 rbit v0.16b, v0.16b
+# CHECK-NEXT: 1 1 0.25 rbit v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 rev16 v21.8b, v1.8b
+# CHECK-NEXT: 1 4 0.50 rev16 v30.16b, v31.16b
+# CHECK-NEXT: 1 4 0.50 rev32 v0.4h, v9.4h
+# CHECK-NEXT: 1 4 0.50 rev32 v21.8b, v1.8b
+# CHECK-NEXT: 1 4 0.50 rev32 v30.16b, v31.16b
+# CHECK-NEXT: 1 4 0.50 rev32 v4.8h, v7.8h
+# CHECK-NEXT: 1 4 0.50 rev64 v0.16b, v31.16b
+# CHECK-NEXT: 1 4 0.50 rev64 v1.8b, v9.8b
+# CHECK-NEXT: 1 4 0.50 rev64 v13.4h, v21.4h
+# CHECK-NEXT: 1 4 0.50 rev64 v2.8h, v4.8h
+# CHECK-NEXT: 1 4 0.50 rev64 v4.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 rev64 v6.4s, v8.4s
+# CHECK-NEXT: 3 10 0.50 rshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 rshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 3 10 0.50 rshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 rshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 rshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 rshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 3 10 0.50 rsubhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 rsubhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 rsubhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 rsubhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 rsubhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: 3 10 0.50 rsubhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: 1 8 0.50 saba v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 10 0.50 sabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 10 0.50 sabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 10 0.50 sabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 10 0.50 sabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 10 0.50 sabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 10 0.50 sabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 sabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 3 10 0.50 sabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 sabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 3 10 0.50 sabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 3 10 0.50 sabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 sabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 sabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 3 10 0.50 sadalp v0.1d, v0.2s
+# CHECK-NEXT: 3 10 0.50 sadalp v0.2d, v0.4s
+# CHECK-NEXT: 3 10 0.50 sadalp v0.2s, v0.4h
+# CHECK-NEXT: 3 10 0.50 sadalp v0.4h, v0.8b
+# CHECK-NEXT: 3 10 0.50 sadalp v0.4s, v0.8h
+# CHECK-NEXT: 3 10 0.50 sadalp v0.8h, v0.16b
+# CHECK-NEXT: 1 4 0.50 saddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 saddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 saddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 saddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 saddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 saddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 2 10 0.50 saddlp v0.1d, v0.2s
+# CHECK-NEXT: 2 10 0.50 saddlp v0.2d, v0.4s
+# CHECK-NEXT: 2 10 0.50 saddlp v0.2s, v0.4h
+# CHECK-NEXT: 2 10 0.50 saddlp v0.4h, v0.8b
+# CHECK-NEXT: 2 10 0.50 saddlp v0.4s, v0.8h
+# CHECK-NEXT: 2 10 0.50 saddlp v0.8h, v0.16b
+# CHECK-NEXT: 1 4 0.50 saddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 4 0.50 saddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 4 0.50 saddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 4 0.50 saddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 4 0.50 saddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 4 0.50 saddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 1 4 0.50 scvtf d21, d12
+# CHECK-NEXT: 1 4 0.50 scvtf d21, d12, #64
+# CHECK-NEXT: 1 4 0.50 scvtf s22, s13
+# CHECK-NEXT: 1 4 0.50 scvtf s22, s13, #32
+# CHECK-NEXT: 1 4 0.50 scvtf v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 scvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 scvtf v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 scvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 scvtf v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 scvtf v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 scvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 scvtf v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 shadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 shl d7, d10, #12
+# CHECK-NEXT: 1 4 0.50 shl v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 4 0.50 shl v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 shl v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 4 0.50 shl v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 shll v0.2d, v0.2s, #32
+# CHECK-NEXT: 1 4 0.50 shll v0.4s, v0.4h, #16
+# CHECK-NEXT: 1 4 0.50 shll v0.8h, v0.8b, #8
+# CHECK-NEXT: 1 4 0.50 shll v0.2d, v0.2s, #32
+# CHECK-NEXT: 1 4 0.50 shll v0.4s, v0.4h, #16
+# CHECK-NEXT: 1 4 0.50 shll v0.8h, v0.8b, #8
+# CHECK-NEXT: 1 4 0.50 shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT: 1 4 0.50 shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT: 1 4 0.50 shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT: 1 4 0.50 shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT: 1 4 0.50 shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT: 1 4 0.50 shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT: 2 10 0.50 shrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 shrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 2 10 0.50 shrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 shrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 shrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 shrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 shsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 shsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 sli d10, d14, #12
+# CHECK-NEXT: 1 4 0.50 sli v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 4 0.50 sli v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 sli v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 sli v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 4 0.50 sli v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 sli v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 4 0.50 sli v0.8h, v0.8h, #3
+# CHECK-NEXT: 6 14 0.50 smax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 6 14 0.50 smax v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 6 14 0.50 smax v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 3 10 0.50 smaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 smaxp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 3 10 0.50 smaxp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 6 14 0.50 smin v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 6 14 0.50 smin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 6 14 0.50 smin v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 sminp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 3 10 0.50 sminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 sminp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 smlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 smlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 smlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 smlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 smlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 smlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 14 0.50 smlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 smlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 smlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 smlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 smlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 smlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 14 0.50 smull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 smull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 smull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 smull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 smull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 smull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 sqabs b19, b14
+# CHECK-NEXT: 1 4 0.50 sqabs d18, d12
+# CHECK-NEXT: 1 4 0.50 sqabs h21, h15
+# CHECK-NEXT: 1 4 0.50 sqabs s20, s12
+# CHECK-NEXT: 1 4 0.50 sqabs v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 sqabs v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 sqabs v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 sqabs v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 sqabs v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 sqabs v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 sqabs v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 sqadd b20, b11, b15
+# CHECK-NEXT: 1 4 0.50 sqadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 sqadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 sqdmlal d19, s24, s12
+# CHECK-NEXT: 1 14 0.50 sqdmlal d8, s9, v0.s[1]
+# CHECK-NEXT: 1 14 0.50 sqdmlal s0, h0, v0.h[3]
+# CHECK-NEXT: 1 4 0.50 sqdmlal s17, h27, h12
+# CHECK-NEXT: 1 14 0.50 sqdmlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 sqdmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 sqdmlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 sqdmlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 sqdmlsl d12, s23, s13
+# CHECK-NEXT: 1 14 0.50 sqdmlsl d8, s9, v0.s[1]
+# CHECK-NEXT: 1 14 0.50 sqdmlsl s0, h0, v0.h[3]
+# CHECK-NEXT: 1 4 0.50 sqdmlsl s14, h12, h25
+# CHECK-NEXT: 1 14 0.50 sqdmlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 sqdmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 sqdmlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 sqdmlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 sqdmulh h10, h11, h12
+# CHECK-NEXT: 1 4 0.50 sqdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: 1 4 0.50 sqdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: 1 4 0.50 sqdmulh s20, s21, s2
+# CHECK-NEXT: 1 4 0.50 sqdmulh v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 9 0.50 sqdmulh v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 sqdmull d1, s1, v0.s[1]
+# CHECK-NEXT: 1 14 0.50 sqdmull d15, s22, s12
+# CHECK-NEXT: 1 14 0.50 sqdmull s1, h1, v0.h[3]
+# CHECK-NEXT: 1 14 0.50 sqdmull s12, h22, h12
+# CHECK-NEXT: 1 14 0.50 sqdmull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 sqdmull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 sqdmull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 sqdmull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 sqneg b19, b14
+# CHECK-NEXT: 1 4 0.50 sqneg d18, d12
+# CHECK-NEXT: 1 4 0.50 sqneg h21, h15
+# CHECK-NEXT: 1 4 0.50 sqneg s20, s12
+# CHECK-NEXT: 1 4 0.50 sqneg v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 sqneg v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 sqneg v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 sqneg v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 sqneg v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 sqneg v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 sqneg v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 sqrdmulh h10, h11, h12
+# CHECK-NEXT: 1 4 0.50 sqrdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: 1 4 0.50 sqrdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: 1 4 0.50 sqrdmulh s20, s21, s2
+# CHECK-NEXT: 1 4 0.50 sqrdmulh v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 9 0.50 sqrdmulh v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 sqrshl d31, d31, d31
+# CHECK-NEXT: 1 6 1.00 sqrshl h3, h4, h15
+# CHECK-NEXT: 1 6 1.00 sqrshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 sqrshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 sqrshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 8 0.50 sqrshrn b10, h13, #2
+# CHECK-NEXT: 1 8 0.50 sqrshrn h15, s10, #6
+# CHECK-NEXT: 1 8 0.50 sqrshrn s15, d12, #9
+# CHECK-NEXT: 3 10 0.50 sqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 8 0.50 sqrshrun b17, h10, #6
+# CHECK-NEXT: 1 8 0.50 sqrshrun h10, s13, #15
+# CHECK-NEXT: 1 8 0.50 sqrshrun s22, d16, #31
+# CHECK-NEXT: 3 10 0.50 sqrshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 sqrshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 6 1.00 sqshl b11, b19, #7
+# CHECK-NEXT: 1 6 1.00 sqshl d15, d16, #51
+# CHECK-NEXT: 1 6 1.00 sqshl d31, d31, d31
+# CHECK-NEXT: 1 6 1.00 sqshl h13, h18, #11
+# CHECK-NEXT: 1 6 1.00 sqshl h3, h4, h15
+# CHECK-NEXT: 1 6 1.00 sqshl s14, s17, #22
+# CHECK-NEXT: 1 6 1.00 sqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 6 1.00 sqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 6 1.00 sqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 6 1.00 sqshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 sqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 6 1.00 sqshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 sqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 6 1.00 sqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 6 1.00 sqshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 sqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu b15, b18, #6
+# CHECK-NEXT: 1 6 1.00 sqshlu d11, d13, #32
+# CHECK-NEXT: 1 6 1.00 sqshlu h19, h17, #6
+# CHECK-NEXT: 1 6 1.00 sqshlu s16, s14, #25
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 6 1.00 sqshlu v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 8 0.50 sqshrn b10, h15, #5
+# CHECK-NEXT: 1 8 0.50 sqshrn h17, s10, #4
+# CHECK-NEXT: 1 8 0.50 sqshrn s18, d10, #31
+# CHECK-NEXT: 2 10 0.50 sqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 sqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 2 10 0.50 sqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 sqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 sqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 sqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 8 0.50 sqshrun b15, h10, #7
+# CHECK-NEXT: 1 8 0.50 sqshrun h20, s14, #3
+# CHECK-NEXT: 1 8 0.50 sqshrun s10, d15, #15
+# CHECK-NEXT: 2 10 0.50 sqshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 sqshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: 2 10 0.50 sqshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 sqshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 sqshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 sqshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 sqsub s20, s10, s7
+# CHECK-NEXT: 1 4 0.50 sqsub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 sqsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 sqsub v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 sqxtn b18, h18
+# CHECK-NEXT: 1 6 1.00 sqxtn h20, s17
+# CHECK-NEXT: 1 6 1.00 sqxtn s19, d14
+# CHECK-NEXT: 1 6 1.00 sqxtn v0.2s, v0.2d
+# CHECK-NEXT: 1 6 1.00 sqxtn v0.4h, v0.4s
+# CHECK-NEXT: 1 6 1.00 sqxtn v0.8b, v0.8h
+# CHECK-NEXT: 1 6 1.00 sqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: 1 6 1.00 sqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 6 1.00 sqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 6 1.00 sqxtun b19, h14
+# CHECK-NEXT: 1 6 1.00 sqxtun h21, s15
+# CHECK-NEXT: 1 6 1.00 sqxtun s20, d12
+# CHECK-NEXT: 1 6 1.00 sqxtun v0.2s, v0.2d
+# CHECK-NEXT: 1 6 1.00 sqxtun v0.4h, v0.4s
+# CHECK-NEXT: 1 6 1.00 sqxtun v0.8b, v0.8h
+# CHECK-NEXT: 1 6 1.00 sqxtun2 v0.16b, v0.8h
+# CHECK-NEXT: 1 6 1.00 sqxtun2 v0.4s, v0.2d
+# CHECK-NEXT: 1 6 1.00 sqxtun2 v0.8h, v0.4s
+# CHECK-NEXT: 1 4 0.50 srhadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 srhadd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 srhadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 sri d10, d12, #14
+# CHECK-NEXT: 1 4 0.50 sri v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 4 0.50 sri v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 sri v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 sri v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 4 0.50 sri v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 sri v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 4 0.50 sri v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 6 1.00 srshl d16, d16, d16
+# CHECK-NEXT: 1 6 1.00 srshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 srshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 srshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 8 0.50 srshr d19, d18, #7
+# CHECK-NEXT: 1 8 0.50 srshr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 8 0.50 srshr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 8 0.50 srshr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 8 0.50 srshr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 8 0.50 srshr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 8 0.50 srshr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 8 0.50 srshr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 srsra d15, d11, #19
+# CHECK-NEXT: 3 8 0.50 srsra v0.16b, v0.16b, #3
+# CHECK-NEXT: 3 8 0.50 srsra v0.2d, v0.2d, #3
+# CHECK-NEXT: 3 8 0.50 srsra v0.2s, v0.2s, #3
+# CHECK-NEXT: 3 8 0.50 srsra v0.4h, v0.4h, #3
+# CHECK-NEXT: 3 8 0.50 srsra v0.4s, v0.4s, #3
+# CHECK-NEXT: 3 8 0.50 srsra v0.8b, v0.8b, #3
+# CHECK-NEXT: 3 8 0.50 srsra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 sshl d31, d31, d31
+# CHECK-NEXT: 1 6 1.00 sshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 sshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 sshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 sshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 sshll v0.2d, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 sshll2 v0.4s, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 sshr d15, d16, #12
+# CHECK-NEXT: 1 4 0.50 sshr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 4 0.50 sshr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 sshr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 sshr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 4 0.50 sshr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 sshr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 4 0.50 sshr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 ssra d18, d12, #21
+# CHECK-NEXT: 2 8 0.50 ssra v0.16b, v0.16b, #3
+# CHECK-NEXT: 2 8 0.50 ssra v0.2d, v0.2d, #3
+# CHECK-NEXT: 2 8 0.50 ssra v0.2s, v0.2s, #3
+# CHECK-NEXT: 2 8 0.50 ssra v0.4h, v0.4h, #3
+# CHECK-NEXT: 2 8 0.50 ssra v0.4s, v0.4s, #3
+# CHECK-NEXT: 2 8 0.50 ssra v0.8b, v0.8b, #3
+# CHECK-NEXT: 2 8 0.50 ssra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 ssubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 ssubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 ssubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 ssubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 ssubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 ssubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 ssubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 4 0.50 ssubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 4 0.50 ssubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 4 0.50 ssubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 4 0.50 ssubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 4 0.50 ssubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 1 0 0.50 * st1 { v0.16b }, [x0]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: 1 0 0.50 * st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: 1 0 0.50 * st1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.8h }, [x15], x2
+# CHECK-NEXT: 1 0 0.50 * st1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: 1 0 0.50 * st1 { v0.d }[1], [x0]
+# CHECK-NEXT: 2 1 0.50 * st1 { v0.d }[1], [x0], #8
+# CHECK-NEXT: 2 1 0.50 * st2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: 1 0 0.50 * st2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: 1 0 0.50 * st2 { v0.s, v1.s }[3], [sp]
+# CHECK-NEXT: 2 1 0.50 * st2 { v0.s, v1.s }[3], [sp], #8
+# CHECK-NEXT: 1 0 0.50 * st3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: 2 1 0.50 * st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: 1 0 0.50 * st3 { v0.h, v1.h, v2.h }[7], [x15]
+# CHECK-NEXT: 2 1 0.50 * st3 { v0.h, v1.h, v2.h }[7], [x15], #6
+# CHECK-NEXT: 1 0 0.50 * st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: 2 1 0.50 * st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: 1 0 0.50 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
+# CHECK-NEXT: 2 1 0.50 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
+# CHECK-NEXT: 1 4 0.50 sub d15, d5, d16
+# CHECK-NEXT: 1 4 0.50 sub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 suqadd b19, b14
+# CHECK-NEXT: 1 4 0.50 suqadd d18, d22
+# CHECK-NEXT: 1 4 0.50 suqadd h20, h15
+# CHECK-NEXT: 1 4 0.50 suqadd s21, s12
+# CHECK-NEXT: 1 4 0.50 suqadd v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 suqadd v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 suqadd v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 suqadd v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 suqadd v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 suqadd v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 suqadd v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 tbl v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: 3 10 0.50 tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: 5 10 0.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: 7 10 0.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: 1 6 1.00 tbl v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: 3 10 0.50 tbl v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: 5 10 0.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: 7 10 0.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: 3 10 0.50 tbx v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: 5 10 0.50 tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: 7 10 0.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: 9 10 0.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: 3 10 0.50 tbx v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: 5 10 0.50 tbx v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: 7 10 0.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: 9 10 0.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: 1 6 1.00 trn1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 trn1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 trn1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 trn1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 trn1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 trn1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 trn1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 trn2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 trn2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 trn2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 trn2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 trn2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 trn2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 trn2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 8 0.50 uaba v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 10 0.50 uabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 10 0.50 uabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 10 0.50 uabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 10 0.50 uabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 10 0.50 uabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 10 0.50 uabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 uabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 3 10 0.50 uabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 uabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 3 10 0.50 uabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 3 10 0.50 uabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 uabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 uabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 3 10 0.50 uadalp v0.1d, v0.2s
+# CHECK-NEXT: 3 10 0.50 uadalp v0.2d, v0.4s
+# CHECK-NEXT: 3 10 0.50 uadalp v0.2s, v0.4h
+# CHECK-NEXT: 3 10 0.50 uadalp v0.4h, v0.8b
+# CHECK-NEXT: 3 10 0.50 uadalp v0.4s, v0.8h
+# CHECK-NEXT: 3 10 0.50 uadalp v0.8h, v0.16b
+# CHECK-NEXT: 1 4 0.50 uaddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 uaddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 uaddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 uaddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 uaddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 uaddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 2 10 0.50 uaddlp v0.1d, v0.2s
+# CHECK-NEXT: 2 10 0.50 uaddlp v0.2d, v0.4s
+# CHECK-NEXT: 2 10 0.50 uaddlp v0.2s, v0.4h
+# CHECK-NEXT: 2 10 0.50 uaddlp v0.4h, v0.8b
+# CHECK-NEXT: 2 10 0.50 uaddlp v0.4s, v0.8h
+# CHECK-NEXT: 2 10 0.50 uaddlp v0.8h, v0.16b
+# CHECK-NEXT: 1 4 0.50 uaddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 4 0.50 uaddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 4 0.50 uaddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 4 0.50 uaddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 4 0.50 uaddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 4 0.50 uaddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 1 4 0.50 ucvtf d21, d14
+# CHECK-NEXT: 1 4 0.50 ucvtf d21, d14, #64
+# CHECK-NEXT: 1 4 0.50 ucvtf s22, s13
+# CHECK-NEXT: 1 4 0.50 ucvtf s22, s13, #32
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 ucvtf v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 uhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 uhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 uhsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 6 14 0.50 umax v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 6 14 0.50 umax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 6 14 0.50 umax v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 3 10 0.50 umaxp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 3 10 0.50 umaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 3 10 0.50 umaxp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 6 14 0.50 umin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 6 14 0.50 umin v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 6 14 0.50 umin v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 3 10 0.50 uminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 3 10 0.50 uminp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 3 10 0.50 uminp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 umlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 umlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 umlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 umlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 umlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 umlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 14 0.50 umlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 umlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 umlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 umlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 umlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 umlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 14 0.50 umull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 14 0.50 umull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 14 0.50 umull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 14 0.50 umull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 14 0.50 umull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 14 0.50 umull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 uqadd h0, h1, h5
+# CHECK-NEXT: 1 4 0.50 uqadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 uqrshl b11, b20, b30
+# CHECK-NEXT: 1 6 1.00 uqrshl s23, s20, s16
+# CHECK-NEXT: 1 6 1.00 uqrshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 uqrshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 uqrshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 uqrshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 8 0.50 uqrshrn b10, h12, #5
+# CHECK-NEXT: 1 8 0.50 uqrshrn h12, s10, #14
+# CHECK-NEXT: 1 8 0.50 uqrshrn s10, d10, #25
+# CHECK-NEXT: 3 10 0.50 uqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 uqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 3 10 0.50 uqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 uqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 3 10 0.50 uqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 3 10 0.50 uqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 6 1.00 uqshl b11, b20, b30
+# CHECK-NEXT: 1 6 1.00 uqshl b18, b15, #6
+# CHECK-NEXT: 1 6 1.00 uqshl d15, d12, #19
+# CHECK-NEXT: 1 6 1.00 uqshl h11, h18, #7
+# CHECK-NEXT: 1 6 1.00 uqshl s14, s19, #18
+# CHECK-NEXT: 1 6 1.00 uqshl s23, s20, s16
+# CHECK-NEXT: 1 6 1.00 uqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 uqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 uqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 uqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 6 1.00 uqshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 8 0.50 uqshrn b12, h10, #7
+# CHECK-NEXT: 1 8 0.50 uqshrn h10, s14, #5
+# CHECK-NEXT: 1 8 0.50 uqshrn s10, d12, #13
+# CHECK-NEXT: 2 10 0.50 uqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 uqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: 2 10 0.50 uqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 uqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: 2 10 0.50 uqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: 2 10 0.50 uqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 uqsub d16, d16, d16
+# CHECK-NEXT: 1 4 0.50 uqsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 uqxtn b18, h18
+# CHECK-NEXT: 1 6 1.00 uqxtn h20, s17
+# CHECK-NEXT: 1 6 1.00 uqxtn s19, d14
+# CHECK-NEXT: 1 6 1.00 uqxtn v0.2s, v0.2d
+# CHECK-NEXT: 1 6 1.00 uqxtn v0.4h, v0.4s
+# CHECK-NEXT: 1 6 1.00 uqxtn v0.8b, v0.8h
+# CHECK-NEXT: 1 6 1.00 uqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: 1 6 1.00 uqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 6 1.00 uqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 4 0.50 urecpe v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 urecpe v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 urhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 urhadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 urhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 urshl d8, d7, d4
+# CHECK-NEXT: 1 6 1.00 urshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 urshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 urshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 urshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 8 0.50 urshr d20, d23, #31
+# CHECK-NEXT: 1 8 0.50 urshr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 8 0.50 urshr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 8 0.50 urshr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 8 0.50 urshr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 8 0.50 urshr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 8 0.50 urshr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 8 0.50 urshr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 29 1.00 ursqrte v0.2s, v0.2s
+# CHECK-NEXT: 1 29 1.00 ursqrte v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 ursra d18, d10, #13
+# CHECK-NEXT: 3 8 0.50 ursra v0.16b, v0.16b, #3
+# CHECK-NEXT: 3 8 0.50 ursra v0.2d, v0.2d, #3
+# CHECK-NEXT: 3 8 0.50 ursra v0.2s, v0.2s, #3
+# CHECK-NEXT: 3 8 0.50 ursra v0.4h, v0.4h, #3
+# CHECK-NEXT: 3 8 0.50 ursra v0.4s, v0.4s, #3
+# CHECK-NEXT: 3 8 0.50 ursra v0.8b, v0.8b, #3
+# CHECK-NEXT: 3 8 0.50 ursra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 ushl d0, d0, d0
+# CHECK-NEXT: 1 6 1.00 ushl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 ushl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 ushl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 ushll v0.4s, v0.4h, #3
+# CHECK-NEXT: 1 4 0.50 ushll2 v0.8h, v0.16b, #3
+# CHECK-NEXT: 1 4 0.50 ushr d10, d17, #18
+# CHECK-NEXT: 1 4 0.50 ushr v0.16b, v0.16b, #3
+# CHECK-NEXT: 1 4 0.50 ushr v0.2d, v0.2d, #3
+# CHECK-NEXT: 1 4 0.50 ushr v0.2s, v0.2s, #3
+# CHECK-NEXT: 1 4 0.50 ushr v0.4h, v0.4h, #3
+# CHECK-NEXT: 1 4 0.50 ushr v0.4s, v0.4s, #3
+# CHECK-NEXT: 1 4 0.50 ushr v0.8b, v0.8b, #3
+# CHECK-NEXT: 1 4 0.50 ushr v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 usqadd b19, b14
+# CHECK-NEXT: 1 4 0.50 usqadd d18, d22
+# CHECK-NEXT: 1 4 0.50 usqadd h20, h15
+# CHECK-NEXT: 1 4 0.50 usqadd s21, s12
+# CHECK-NEXT: 1 4 0.50 usqadd v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 usqadd v0.2d, v0.2d
+# CHECK-NEXT: 1 4 0.50 usqadd v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 usqadd v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 usqadd v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 usqadd v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 usqadd v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 usra d20, d13, #61
+# CHECK-NEXT: 2 8 0.50 usra v0.16b, v0.16b, #3
+# CHECK-NEXT: 2 8 0.50 usra v0.2d, v0.2d, #3
+# CHECK-NEXT: 2 8 0.50 usra v0.2s, v0.2s, #3
+# CHECK-NEXT: 2 8 0.50 usra v0.4h, v0.4h, #3
+# CHECK-NEXT: 2 8 0.50 usra v0.4s, v0.4s, #3
+# CHECK-NEXT: 2 8 0.50 usra v0.8b, v0.8b, #3
+# CHECK-NEXT: 2 8 0.50 usra v0.8h, v0.8h, #3
+# CHECK-NEXT: 1 4 0.50 usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: 1 4 0.50 usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: 1 4 0.50 usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: 1 4 0.50 usubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: 1 4 0.50 usubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: 1 4 0.50 usubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: 1 4 0.50 usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: 1 4 0.50 usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: 1 4 0.50 usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: 1 4 0.50 usubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: 1 4 0.50 usubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: 1 4 0.50 usubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 uzp1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 uzp2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 xtn v0.2s, v0.2d
+# CHECK-NEXT: 1 6 1.00 xtn v0.4h, v0.4s
+# CHECK-NEXT: 1 6 1.00 xtn v0.8b, v0.8h
+# CHECK-NEXT: 1 6 1.00 xtn2 v0.16b, v0.8h
+# CHECK-NEXT: 1 6 1.00 xtn2 v0.4s, v0.2d
+# CHECK-NEXT: 1 6 1.00 xtn2 v0.8h, v0.4s
+# CHECK-NEXT: 1 6 1.00 zip1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 zip1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 zip1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 zip1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 zip1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 zip1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 zip1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: 1 6 1.00 zip2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: 1 6 1.00 zip2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: 1 6 1.00 zip2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: 1 6 1.00 zip2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: 1 6 1.00 zip2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: 1 6 1.00 zip2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: 1 6 1.00 zip2 v0.8h, v0.8h, v0.8h
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - A64FXIPBR
+# CHECK-NEXT: [1] - A64FXIPEAGA
+# CHECK-NEXT: [2] - A64FXIPEAGB
+# CHECK-NEXT: [3] - A64FXIPEXA
+# CHECK-NEXT: [4] - A64FXIPEXB
+# CHECK-NEXT: [5] - A64FXIPFLA
+# CHECK-NEXT: [6] - A64FXIPFLB
+# CHECK-NEXT: [7] - A64FXIPPR
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
+# CHECK-NEXT: - 36.25 36.25 8.25 8.25 500.00 501.00 -
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs d29, d24
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add d17, d31, d29
+# CHECK-NEXT: - - - - - 0.50 0.50 - add v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - addhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - addhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - addhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - addhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - addhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - addhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - addp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - addp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - and v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic v0.4h, #15, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - bif v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - bit v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - bsl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - cls v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - cls v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - cls v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - cls v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - cls v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - cls v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - clz v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - clz v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - clz v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - clz v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - clz v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - clz v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmeq d20, d21, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmeq d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmeq v0.16b, v0.16b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmeq v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmge d20, d21, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmge d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmge v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmge v0.8b, v0.8b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmgt d20, d21, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmgt d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmgt v0.2s, v0.2s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmhi d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmhi v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmhs d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmhs v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmle d20, d21, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmle v0.2d, v0.2d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmlt d20, d21, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmlt v0.8h, v0.8h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmtst d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - cmtst v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - cnt v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - cnt v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.16b, w28
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.2d, x28
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.2s, w28
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.4h, w28
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.4s, w28
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.8b, w28
+# CHECK-NEXT: - - - - - 0.50 0.50 - dup v0.8h, w28
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - ext v0.16b, v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 1.00 - - ext v0.8b, v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabd d29, d24, d20
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabd s29, s24, s20
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge s10, s11, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt s10, s11, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - faddp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - faddp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmeq d20, d21, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmeq d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmeq s10, s11, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmeq s10, s11, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmeq v0.2s, v0.2s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmeq v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmge d20, d21, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmge d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmge s10, s11, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmge s10, s11, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmge v0.2d, v0.2d, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmge v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmgt d20, d21, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmgt d20, d21, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmgt s10, s11, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmgt s10, s11, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmgt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmgt v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmle d20, d21, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmle s10, s11, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmle v0.2d, v0.2d, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmlt d20, d21, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmlt s10, s11, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcmlt v0.4s, v0.4s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtas v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtau v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtl v0.2d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtl v0.4s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtl2 v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtl2 v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms s22, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtms v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtmu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns s22, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtns v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtnu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps s22, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtps v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtpu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtxn s22, d13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtxn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtxn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs d21, d12, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs s21, s12, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu d21, d12, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu s12, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu s21, s12, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - fdiv v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - fmax v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - fmax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - fmax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - fmin v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - fmin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - fmin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - fminnm v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - fminnm v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - fminnm v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminnmp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminnmp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminnmp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminp v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmla d0, d1, v0.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmla s0, s1, v0.s[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmla v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmls d0, d4, v0.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmls s3, s5, v0.s[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmls v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - fmov v0.2d, #-1.25000000
+# CHECK-NEXT: - - - - - 1.00 - - fmov v0.2s, #13.00000000
+# CHECK-NEXT: - - - - - 1.00 - - fmov v0.4s, #1.00000000
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul d0, d1, v0.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul s0, s1, v0.s[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx d0, d4, v0.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx d23, d11, d1
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx s20, s22, s15
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx s3, s5, v0.s[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe d13, d13
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe s19, s14
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - frecps v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecps d22, d30, d21
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecps s21, s16, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpx d16, d19
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpx s18, s10
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - frsqrte d21, d12
+# CHECK-NEXT: - - - - - 1.00 - - frsqrte s22, s13
+# CHECK-NEXT: - - - - - 1.00 - - frsqrte v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - frsqrte v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frsqrte v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - frsqrte v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frsqrte v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - frsqrts d8, d22, d18
+# CHECK-NEXT: - - - - - 1.00 - - frsqrts s21, s5, s12
+# CHECK-NEXT: - - - - - 1.00 - - frsqrts v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - fsqrt v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - fsqrt v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsqrt v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - fsqrt v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsqrt v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1 { v0.16b }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld1 { v0.8h }, [x15], x2
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: - 0.33 0.33 - - 0.33 - - ld1 { v0.b }[9], [x0]
+# CHECK-NEXT: - 0.58 0.58 0.25 0.25 0.33 - - ld1 { v0.b }[9], [x0], #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - ld1r { v0.16b }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld1r { v0.16b }, [x0], #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - ld1r { v0.8h }, [x15]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld1r { v0.8h }, [x15], #2
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: - 0.33 0.33 - - 0.33 - - ld2 { v0.h, v1.h }[7], [x15]
+# CHECK-NEXT: - 0.58 0.58 0.25 0.25 0.33 - - ld2 { v0.h, v1.h }[7], [x15], #4
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld2r { v0.2d, v1.2d }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld2r { v0.2d, v1.2d }, [x0], #16
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld2r { v0.4s, v1.4s }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld2r { v0.4s, v1.4s }, [sp], #8
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: - 0.33 0.33 - - 0.33 - - ld3 { v0.s, v1.s, v2.s }[3], [sp]
+# CHECK-NEXT: - 0.58 0.58 0.25 0.25 0.33 - - ld3 { v0.s, v1.s, v2.s }[3], [sp], x3
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld3r { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld3r { v0.4h, v1.4h, v2.4h }, [x15], #6
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld3r { v0.8b, v1.8b, v2.8b }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld3r { v0.8b, v1.8b, v2.8b }, [x0], #3
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: - 0.33 0.33 - - 0.33 - - ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0]
+# CHECK-NEXT: - 0.58 0.58 0.25 0.25 0.33 - - ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0], #32
+# CHECK-NEXT: - 0.58 0.58 0.25 0.25 0.33 - - ld4 { v0.h, v1.h, v2.h, v3.h }[7], [x0], x0
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld4r { v0.1d, v1.1d, v2.1d, v3.1d }, [sp], x7
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - ld4r { v0.2s, v1.2s, v2.2s, v3.2s }, [sp], x30
+# CHECK-NEXT: - - - - - 0.50 0.50 - mla v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mls v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - mov b0, v0.b[15]
+# CHECK-NEXT: - - - - - 1.00 - - mov d6, v0.d[1]
+# CHECK-NEXT: - - - - - 1.00 - - mov h2, v0.h[5]
+# CHECK-NEXT: - - - - - 1.00 - - mov s17, v0.s[2]
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - movi d15, #0xff00ff00ff00ff
+# CHECK-NEXT: - - - - - 1.00 - - movi v0.16b, #31
+# CHECK-NEXT: - - - - - 1.00 - - movi v0.2d, #0xff0000ff0000ffff
+# CHECK-NEXT: - - - - - 1.00 - - movi v0.2s, #8, msl #8
+# CHECK-NEXT: - - - - - 1.00 - - movi v0.4s, #255, lsl #24
+# CHECK-NEXT: - - - - - 1.00 - - movi v0.8b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - mul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mvni v0.2s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - mvni v0.4s, #16, msl #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg d29, d24
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - neg v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - mvn v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mvn v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - orn v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - orr v0.8h, #31
+# CHECK-NEXT: - - - - - 0.50 0.50 - pmul v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - pmul v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - pmull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - pmull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - raddhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - raddhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - raddhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - raddhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - raddhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - raddhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rbit v0.16b, v0.16b
+# CHECK-NEXT: - 0.25 0.25 0.25 0.25 - - - rbit v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev16 v21.8b, v1.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev16 v30.16b, v31.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev32 v0.4h, v9.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev32 v21.8b, v1.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev32 v30.16b, v31.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev32 v4.8h, v7.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev64 v0.16b, v31.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev64 v1.8b, v9.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev64 v13.4h, v21.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev64 v2.8h, v4.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev64 v4.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - rev64 v6.4s, v8.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - rshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - rshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - rshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - rshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - rshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - rshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - rsubhn v0.2s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - rsubhn v0.4h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - rsubhn v0.8b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rsubhn2 v0.16b, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rsubhn2 v0.4s, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - rsubhn2 v0.8h, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saba v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sadalp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sadalp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sadalp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sadalp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sadalp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sadalp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddlp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddlp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddlp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddlp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddlp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddlp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - saddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf d21, d12
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf d21, d12, #64
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf s22, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf s22, s13, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - shadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - shl d7, d10, #12
+# CHECK-NEXT: - - - - - 0.50 0.50 - shl v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shl v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shl v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shl v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll v0.2d, v0.2s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll v0.4s, v0.4h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll v0.8h, v0.8b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll v0.2d, v0.2s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll v0.4s, v0.4h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll v0.8h, v0.8b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll2 v0.2d, v0.4s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll2 v0.4s, v0.8h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - shll2 v0.8h, v0.16b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - shrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - shsub v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - shsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli d10, d14, #12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sli v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaxp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaxp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smaxp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sminp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sminp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sminp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs b19, b14
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs d18, d12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs h21, h15
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs s20, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqabs v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd b20, b11, b15
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal d19, s24, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal d8, s9, v0.s[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal s0, h0, v0.h[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal s17, h27, h12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl d12, s23, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl d8, s9, v0.s[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl s0, h0, v0.h[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl s14, h12, h25
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmulh h10, h11, h12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmulh s20, s21, s2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmulh v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmulh v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull d1, s1, v0.s[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull d15, s22, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull s1, h1, v0.h[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull s12, h22, h12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdmull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg b19, b14
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg d18, d12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg h21, h15
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg s20, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqneg v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrdmulh h10, h11, h12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrdmulh h7, h15, v0.h[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrdmulh s15, s14, v0.s[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrdmulh s20, s21, s2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrdmulh v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrdmulh v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - sqrshl d31, d31, d31
+# CHECK-NEXT: - - - - - - 1.00 - sqrshl h3, h4, h15
+# CHECK-NEXT: - - - - - - 1.00 - sqrshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - 1.00 - sqrshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - 1.00 - sqrshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn b10, h13, #2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn h15, s10, #6
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn s15, d12, #9
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun b17, h10, #6
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun h10, s13, #15
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun s22, d16, #31
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqrshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl b11, b19, #7
+# CHECK-NEXT: - - - - - - 1.00 - sqshl d15, d16, #51
+# CHECK-NEXT: - - - - - - 1.00 - sqshl d31, d31, d31
+# CHECK-NEXT: - - - - - - 1.00 - sqshl h13, h18, #11
+# CHECK-NEXT: - - - - - - 1.00 - sqshl h3, h4, h15
+# CHECK-NEXT: - - - - - - 1.00 - sqshl s14, s17, #22
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - 1.00 - sqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu b15, b18, #6
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu d11, d13, #32
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu h19, h17, #6
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu s16, s14, #25
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - 1.00 - sqshlu v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn b10, h15, #5
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn h17, s10, #4
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn s18, d10, #31
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun b15, h10, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun h20, s14, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun s10, d15, #15
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqshrun2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub s20, s10, s7
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn b18, h18
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn h20, s17
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn s19, d14
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - sqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun b19, h14
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun h21, s15
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun s20, d12
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - sqxtun2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - srhadd v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - srhadd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - srhadd v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri d10, d12, #14
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sri v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - 1.00 - srshl d16, d16, d16
+# CHECK-NEXT: - - - - - - 1.00 - srshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - - 1.00 - srshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - 1.00 - srshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr d19, d18, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srshr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra d15, d11, #19
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - srsra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshl d31, d31, d31
+# CHECK-NEXT: - - - - - - 1.00 - sshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshl v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshl v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshl v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshll v0.2d, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshll2 v0.4s, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr d15, d16, #12
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - sshr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra d18, d12, #21
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ssubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - 0.50 0.50 - - - - - st1 { v0.16b }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st1 { v0.2d, v1.2d, v2.2d }, [x0], #48
+# CHECK-NEXT: - 0.50 0.50 - - - - - st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st1 { v0.4s, v1.4s }, [sp], #32
+# CHECK-NEXT: - 0.50 0.50 - - - - - st1 { v0.4s, v1.4s, v2.4s }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st1 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st1 { v0.8h }, [x15], x2
+# CHECK-NEXT: - 0.50 0.50 - - - - - st1 { v0.8h, v1.8h }, [x15]
+# CHECK-NEXT: - 0.50 0.50 - - - - - st1 { v0.d }[1], [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st1 { v0.d }[1], [x0], #8
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st2 { v0.16b, v1.16b }, [x0], x1
+# CHECK-NEXT: - 0.50 0.50 - - - - - st2 { v0.8b, v1.8b }, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - st2 { v0.s, v1.s }[3], [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st2 { v0.s, v1.s }[3], [sp], #8
+# CHECK-NEXT: - 0.50 0.50 - - - - - st3 { v0.4h, v1.4h, v2.4h }, [x15]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st3 { v0.8h, v1.8h, v2.8h }, [x15], x2
+# CHECK-NEXT: - 0.50 0.50 - - - - - st3 { v0.h, v1.h, v2.h }[7], [x15]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st3 { v0.h, v1.h, v2.h }[7], [x15], #6
+# CHECK-NEXT: - 0.50 0.50 - - - - - st4 { v0.2s, v1.2s, v2.2s, v3.2s }, [sp]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st4 { v0.4s, v1.4s, v2.4s, v3.4s }, [sp], #64
+# CHECK-NEXT: - 0.50 0.50 - - - - - st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0]
+# CHECK-NEXT: - 0.75 0.75 0.25 0.25 - - - st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub d15, d5, d16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd b19, b14
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd d18, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd h20, h15
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd s21, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - suqadd v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - tbl v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbl v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: - - - - - - 1.00 - tbl v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbl v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.16b, { v0.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.16b, { v0.16b, v1.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.8b, { v0.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.8b, { v0.16b, v1.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - trn1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - trn2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaba v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabd v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabdl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabdl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabdl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabdl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabdl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabdl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uadalp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uadalp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uadalp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uadalp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uadalp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uadalp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddlp v0.1d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddlp v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddlp v0.2s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddlp v0.4h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddlp v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddlp v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uaddw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf d21, d14
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf d21, d14, #64
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf s22, s13
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf s22, s13, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uhsub v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaxp v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaxp v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umaxp v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uminp v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uminp v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uminp v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlal v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlal v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlal v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlal2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlal2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlal2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlsl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlsl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlsl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlsl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlsl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umlsl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umull2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd h0, h1, h5
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - uqrshl b11, b20, b30
+# CHECK-NEXT: - - - - - - 1.00 - uqrshl s23, s20, s16
+# CHECK-NEXT: - - - - - - 1.00 - uqrshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - 1.00 - uqrshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - uqrshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - uqrshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn b10, h12, #5
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn h12, s10, #14
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn s10, d10, #25
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqrshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl b11, b20, b30
+# CHECK-NEXT: - - - - - - 1.00 - uqshl b18, b15, #6
+# CHECK-NEXT: - - - - - - 1.00 - uqshl d15, d12, #19
+# CHECK-NEXT: - - - - - - 1.00 - uqshl h11, h18, #7
+# CHECK-NEXT: - - - - - - 1.00 - uqshl s14, s19, #18
+# CHECK-NEXT: - - - - - - 1.00 - uqshl s23, s20, s16
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - - 1.00 - uqshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn b12, h10, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn h10, s14, #5
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn s10, d12, #13
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn v0.2s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn v0.4h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn v0.8b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn2 v0.16b, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn2 v0.4s, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqshrn2 v0.8h, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub d16, d16, d16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn b18, h18
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn h20, s17
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn s19, d14
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - uqxtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - urecpe v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - urecpe v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - urhadd v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - urhadd v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - urhadd v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - urshl d8, d7, d4
+# CHECK-NEXT: - - - - - - 1.00 - urshl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - 1.00 - urshl v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - urshl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - urshl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr d20, d23, #31
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - urshr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 1.00 - - ursqrte v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - ursqrte v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra d18, d10, #13
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ursra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushl d0, d0, d0
+# CHECK-NEXT: - - - - - - 1.00 - ushl v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - - 1.00 - ushl v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - ushl v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushll v0.4s, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushll2 v0.8h, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr d10, d17, #18
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - ushr v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd b19, b14
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd d18, d22
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd h20, h15
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd s21, s12
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - usqadd v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra d20, d13, #61
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.16b, v0.16b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.2d, v0.2d, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.2s, v0.2s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.4h, v0.4h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.4s, v0.4s, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.8b, v0.8b, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usra v0.8h, v0.8h, #3
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubl v0.2d, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubl v0.4s, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubl v0.8h, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubl2 v0.2d, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubl2 v0.4s, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubl2 v0.8h, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubw v0.2d, v0.2d, v0.2s
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubw v0.4s, v0.4s, v0.4h
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubw v0.8h, v0.8h, v0.8b
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubw2 v0.2d, v0.2d, v0.4s
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubw2 v0.4s, v0.4s, v0.8h
+# CHECK-NEXT: - - - - - 0.50 0.50 - usubw2 v0.8h, v0.8h, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - xtn v0.2s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - xtn v0.4h, v0.4s
+# CHECK-NEXT: - - - - - - 1.00 - xtn v0.8b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - xtn2 v0.16b, v0.8h
+# CHECK-NEXT: - - - - - - 1.00 - xtn2 v0.4s, v0.2d
+# CHECK-NEXT: - - - - - - 1.00 - xtn2 v0.8h, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 v0.8h, v0.8h, v0.8h
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.16b, v0.16b, v0.16b
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.2d, v0.2d, v0.2d
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.2s, v0.2s, v0.2s
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.4h, v0.4h, v0.4h
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.4s, v0.4s, v0.4s
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.8b, v0.8b, v0.8b
+# CHECK-NEXT: - - - - - 1.00 - - zip2 v0.8h, v0.8h, v0.8h
--- /dev/null
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=aarch64 -mcpu=a64fx -instruction-tables < %s | FileCheck %s
+
+abs z0.b, p0/m, z0.b
+abs z0.d, p0/m, z0.d
+abs z0.h, p0/m, z0.h
+abs z0.s, p0/m, z0.s
+abs z31.b, p7/m, z31.b
+abs z31.d, p7/m, z31.d
+abs z31.h, p7/m, z31.h
+abs z31.s, p7/m, z31.s
+add z0.b, p0/m, z0.b, z0.b
+add z0.b, z0.b, #0
+add z0.b, z0.b, z0.b
+add z0.d, p0/m, z0.d, z0.d
+add z0.d, z0.d, #0
+add z0.d, z0.d, #0, lsl #8
+add z0.d, z0.d, z0.d
+add z0.h, p0/m, z0.h, z0.h
+add z0.h, z0.h, #0
+add z0.h, z0.h, #0, lsl #8
+add z0.h, z0.h, z0.h
+add z0.s, p0/m, z0.s, z0.s
+add z0.s, z0.s, #0
+add z0.s, z0.s, #0, lsl #8
+add z0.s, z0.s, z0.s
+add z0.s, z1.s, z2.s
+add z21.b, p5/m, z21.b, z10.b
+add z21.b, z10.b, z21.b
+add z21.d, p5/m, z21.d, z10.d
+add z21.d, z10.d, z21.d
+add z21.h, p5/m, z21.h, z10.h
+add z21.h, z10.h, z21.h
+add z21.s, p5/m, z21.s, z10.s
+add z21.s, z10.s, z21.s
+add z23.b, p3/m, z23.b, z13.b
+add z23.b, z13.b, z8.b
+add z23.d, p3/m, z23.d, z13.d
+add z23.d, z13.d, z8.d
+add z23.h, p3/m, z23.h, z13.h
+add z23.h, z13.h, z8.h
+add z23.s, p3/m, z23.s, z13.s
+add z23.s, z13.s, z8.s
+add z31.b, p7/m, z31.b, z31.b
+add z31.b, z31.b, #255
+add z31.b, z31.b, z31.b
+add z31.d, p7/m, z31.d, z31.d
+add z31.d, z31.d, #65280
+add z31.d, z31.d, z31.d
+add z31.h, p7/m, z31.h, z31.h
+add z31.h, z31.h, #65280
+add z31.h, z31.h, z31.h
+add z31.s, p7/m, z31.s, z31.s
+add z31.s, z31.s, #65280
+add z31.s, z31.s, z31.s
+addpl sp, sp, #31
+addpl x0, x0, #-32
+addpl x21, x21, #0
+addpl x23, x8, #-1
+addvl sp, sp, #31
+addvl x0, x0, #-32
+addvl x21, x21, #0
+addvl x23, x8, #-1
+adr z0.d, [z0.d, z0.d, lsl #1]
+adr z0.d, [z0.d, z0.d, lsl #2]
+adr z0.d, [z0.d, z0.d, lsl #3]
+adr z0.d, [z0.d, z0.d, sxtw #1]
+adr z0.d, [z0.d, z0.d, sxtw #2]
+adr z0.d, [z0.d, z0.d, sxtw #3]
+adr z0.d, [z0.d, z0.d, sxtw]
+adr z0.d, [z0.d, z0.d, uxtw #1]
+adr z0.d, [z0.d, z0.d, uxtw #2]
+adr z0.d, [z0.d, z0.d, uxtw #3]
+adr z0.d, [z0.d, z0.d, uxtw]
+adr z0.d, [z0.d, z0.d]
+adr z0.s, [z0.s, z0.s, lsl #1]
+adr z0.s, [z0.s, z0.s, lsl #2]
+adr z0.s, [z0.s, z0.s, lsl #3]
+adr z0.s, [z0.s, z0.s]
+and p0.b, p0/z, p0.b, p1.b
+and z0.d, z0.d, #0x6
+and z0.d, z0.d, #0xfffffffffffffff9
+and z0.d, z0.d, z0.d
+and z0.s, z0.s, #0x6
+and z0.s, z0.s, #0xfffffff9
+and z23.d, z13.d, z8.d
+and z23.h, z23.h, #0x6
+and z23.h, z23.h, #0xfff9
+and z31.b, p7/m, z31.b, z31.b
+and z31.d, p7/m, z31.d, z31.d
+and z31.h, p7/m, z31.h, z31.h
+and z31.s, p7/m, z31.s, z31.s
+and z5.b, z5.b, #0x6
+and z5.b, z5.b, #0xf9
+ands p0.b, p0/z, p0.b, p1.b
+andv b0, p7, z31.b
+andv d0, p7, z31.d
+andv h0, p7, z31.h
+andv s0, p7, z31.s
+asr z0.b, p0/m, z0.b, #1
+asr z0.b, p0/m, z0.b, z0.b
+asr z0.b, p0/m, z0.b, z1.d
+asr z0.b, z0.b, #1
+asr z0.b, z1.b, z2.d
+asr z0.d, p0/m, z0.d, #1
+asr z0.d, p0/m, z0.d, z0.d
+asr z0.d, z0.d, #1
+asr z0.h, p0/m, z0.h, #1
+asr z0.h, p0/m, z0.h, z0.h
+asr z0.h, p0/m, z0.h, z1.d
+asr z0.h, z0.h, #1
+asr z0.h, z1.h, z2.d
+asr z0.s, p0/m, z0.s, #1
+asr z0.s, p0/m, z0.s, z0.s
+asr z0.s, p0/m, z0.s, z1.d
+asr z0.s, z0.s, #1
+asr z0.s, z1.s, z2.d
+asr z31.b, p0/m, z31.b, #8
+asr z31.b, z31.b, #8
+asr z31.d, p0/m, z31.d, #64
+asr z31.d, z31.d, #64
+asr z31.h, p0/m, z31.h, #16
+asr z31.h, z31.h, #16
+asr z31.s, p0/m, z31.s, #32
+asr z31.s, z31.s, #32
+asrd z0.b, p0/m, z0.b, #1
+asrd z0.d, p0/m, z0.d, #1
+asrd z0.h, p0/m, z0.h, #1
+asrd z0.s, p0/m, z0.s, #1
+asrd z31.b, p0/m, z31.b, #8
+asrd z31.d, p0/m, z31.d, #64
+asrd z31.h, p0/m, z31.h, #16
+asrd z31.s, p0/m, z31.s, #32
+asrr z0.b, p0/m, z0.b, z0.b
+asrr z0.d, p0/m, z0.d, z0.d
+asrr z0.h, p0/m, z0.h, z0.h
+asrr z0.s, p0/m, z0.s, z0.s
+bic p0.b, p0/z, p0.b, p0.b
+bic p15.b, p15/z, p15.b, p15.b
+bic z0.d, z0.d, z0.d
+bic z23.d, z13.d, z8.d
+bic z31.b, p7/m, z31.b, z31.b
+bic z31.d, p7/m, z31.d, z31.d
+bic z31.h, p7/m, z31.h, z31.h
+bic z31.s, p7/m, z31.s, z31.s
+bics p0.b, p0/z, p0.b, p0.b
+bics p15.b, p15/z, p15.b, p15.b
+brka p0.b, p15/m, p15.b
+brka p0.b, p15/z, p15.b
+brkas p0.b, p15/z, p15.b
+brkb p0.b, p15/m, p15.b
+brkb p0.b, p15/z, p15.b
+brkbs p0.b, p15/z, p15.b
+brkn p0.b, p15/z, p1.b, p0.b
+brkn p15.b, p15/z, p15.b, p15.b
+brkns p0.b, p15/z, p1.b, p0.b
+brkns p15.b, p15/z, p15.b, p15.b
+brkpa p0.b, p15/z, p1.b, p2.b
+brkpa p15.b, p15/z, p15.b, p15.b
+brkpas p0.b, p15/z, p1.b, p2.b
+brkpas p15.b, p15/z, p15.b, p15.b
+brkpb p0.b, p15/z, p1.b, p2.b
+brkpb p15.b, p15/z, p15.b, p15.b
+brkpbs p0.b, p15/z, p1.b, p2.b
+brkpbs p15.b, p15/z, p15.b, p15.b
+clasta b0, p7, b0, z31.b
+clasta d0, p7, d0, z31.d
+clasta h0, p7, h0, z31.h
+clasta s0, p7, s0, z31.s
+clasta w0, p7, w0, z31.b
+clasta w0, p7, w0, z31.h
+clasta w0, p7, w0, z31.s
+clasta x0, p7, x0, z31.d
+clasta z0.b, p7, z0.b, z31.b
+clasta z0.d, p7, z0.d, z31.d
+clasta z0.h, p7, z0.h, z31.h
+clasta z0.s, p7, z0.s, z31.s
+clastb b0, p7, b0, z31.b
+clastb d0, p7, d0, z31.d
+clastb h0, p7, h0, z31.h
+clastb s0, p7, s0, z31.s
+clastb w0, p7, w0, z31.b
+clastb w0, p7, w0, z31.h
+clastb w0, p7, w0, z31.s
+clastb x0, p7, x0, z31.d
+clastb z0.b, p7, z0.b, z31.b
+clastb z0.d, p7, z0.d, z31.d
+clastb z0.h, p7, z0.h, z31.h
+clastb z0.s, p7, z0.s, z31.s
+cls z31.b, p7/m, z31.b
+cls z31.d, p7/m, z31.d
+cls z31.h, p7/m, z31.h
+cls z31.s, p7/m, z31.s
+clz z31.b, p7/m, z31.b
+clz z31.d, p7/m, z31.d
+clz z31.h, p7/m, z31.h
+clz z31.s, p7/m, z31.s
+cmpeq p0.b, p0/z, z0.b, #-16
+cmpeq p0.b, p0/z, z0.b, #15
+cmpeq p0.b, p0/z, z0.b, z0.b
+cmpeq p0.b, p0/z, z0.b, z0.d
+cmpeq p0.d, p0/z, z0.d, #-16
+cmpeq p0.d, p0/z, z0.d, #15
+cmpeq p0.d, p0/z, z0.d, z0.d
+cmpeq p0.h, p0/z, z0.h, #-16
+cmpeq p0.h, p0/z, z0.h, #15
+cmpeq p0.h, p0/z, z0.h, z0.d
+cmpeq p0.h, p0/z, z0.h, z0.h
+cmpeq p0.s, p0/z, z0.s, #-16
+cmpeq p0.s, p0/z, z0.s, #15
+cmpeq p0.s, p0/z, z0.s, z0.d
+cmpeq p0.s, p0/z, z0.s, z0.s
+cmpge p0.b, p0/z, z0.b, #-16
+cmpge p0.b, p0/z, z0.b, #15
+cmpge p0.b, p0/z, z0.b, z0.b
+cmpge p0.b, p0/z, z0.b, z0.d
+cmpge p0.b, p0/z, z1.b, z0.b
+cmpge p0.d, p0/z, z0.d, #-16
+cmpge p0.d, p0/z, z0.d, #15
+cmpge p0.d, p0/z, z0.d, z0.d
+cmpge p0.d, p0/z, z1.d, z0.d
+cmpge p0.h, p0/z, z0.h, #-16
+cmpge p0.h, p0/z, z0.h, #15
+cmpge p0.h, p0/z, z0.h, z0.d
+cmpge p0.h, p0/z, z0.h, z0.h
+cmpge p0.h, p0/z, z1.h, z0.h
+cmpge p0.s, p0/z, z0.s, #-16
+cmpge p0.s, p0/z, z0.s, #15
+cmpge p0.s, p0/z, z0.s, z0.d
+cmpge p0.s, p0/z, z0.s, z0.s
+cmpge p0.s, p0/z, z1.s, z0.s
+cmpgt p0.b, p0/z, z0.b, #-16
+cmpgt p0.b, p0/z, z0.b, #15
+cmpgt p0.b, p0/z, z0.b, z0.b
+cmpgt p0.b, p0/z, z0.b, z0.d
+cmpgt p0.b, p0/z, z1.b, z0.b
+cmpgt p0.d, p0/z, z0.d, #-16
+cmpgt p0.d, p0/z, z0.d, #15
+cmpgt p0.d, p0/z, z0.d, z0.d
+cmpgt p0.d, p0/z, z1.d, z0.d
+cmpgt p0.h, p0/z, z0.h, #-16
+cmpgt p0.h, p0/z, z0.h, #15
+cmpgt p0.h, p0/z, z0.h, z0.d
+cmpgt p0.h, p0/z, z0.h, z0.h
+cmpgt p0.h, p0/z, z1.h, z0.h
+cmpgt p0.s, p0/z, z0.s, #-16
+cmpgt p0.s, p0/z, z0.s, #15
+cmpgt p0.s, p0/z, z0.s, z0.d
+cmpgt p0.s, p0/z, z0.s, z0.s
+cmpgt p0.s, p0/z, z1.s, z0.s
+cmphi p0.b, p0/z, z0.b, #0
+cmphi p0.b, p0/z, z0.b, #127
+cmphi p0.b, p0/z, z0.b, z0.b
+cmphi p0.b, p0/z, z0.b, z0.d
+cmphi p0.b, p0/z, z1.b, z0.b
+cmphi p0.d, p0/z, z0.d, #0
+cmphi p0.d, p0/z, z0.d, #127
+cmphi p0.d, p0/z, z0.d, z0.d
+cmphi p0.d, p0/z, z1.d, z0.d
+cmphi p0.h, p0/z, z0.h, #0
+cmphi p0.h, p0/z, z0.h, #127
+cmphi p0.h, p0/z, z0.h, z0.d
+cmphi p0.h, p0/z, z0.h, z0.h
+cmphi p0.h, p0/z, z1.h, z0.h
+cmphi p0.s, p0/z, z0.s, #0
+cmphi p0.s, p0/z, z0.s, #127
+cmphi p0.s, p0/z, z0.s, z0.d
+cmphi p0.s, p0/z, z0.s, z0.s
+cmphi p0.s, p0/z, z1.s, z0.s
+cmphs p0.b, p0/z, z0.b, #0
+cmphs p0.b, p0/z, z0.b, #127
+cmphs p0.b, p0/z, z0.b, z0.b
+cmphs p0.b, p0/z, z0.b, z0.d
+cmphs p0.b, p0/z, z1.b, z0.b
+cmphs p0.d, p0/z, z0.d, #0
+cmphs p0.d, p0/z, z0.d, #127
+cmphs p0.d, p0/z, z0.d, z0.d
+cmphs p0.d, p0/z, z1.d, z0.d
+cmphs p0.h, p0/z, z0.h, #0
+cmphs p0.h, p0/z, z0.h, #127
+cmphs p0.h, p0/z, z0.h, z0.d
+cmphs p0.h, p0/z, z0.h, z0.h
+cmphs p0.h, p0/z, z1.h, z0.h
+cmphs p0.s, p0/z, z0.s, #0
+cmphs p0.s, p0/z, z0.s, #127
+cmphs p0.s, p0/z, z0.s, z0.d
+cmphs p0.s, p0/z, z0.s, z0.s
+cmphs p0.s, p0/z, z1.s, z0.s
+cmple p0.b, p0/z, z0.b, #-16
+cmple p0.b, p0/z, z0.b, #15
+cmple p0.b, p0/z, z0.b, z0.d
+cmple p0.d, p0/z, z0.d, #-16
+cmple p0.d, p0/z, z0.d, #15
+cmple p0.h, p0/z, z0.h, #-16
+cmple p0.h, p0/z, z0.h, #15
+cmple p0.h, p0/z, z0.h, z0.d
+cmple p0.s, p0/z, z0.s, #-16
+cmple p0.s, p0/z, z0.s, #15
+cmple p0.s, p0/z, z0.s, z0.d
+cmplo p0.b, p0/z, z0.b, #0
+cmplo p0.b, p0/z, z0.b, #127
+cmplo p0.b, p0/z, z0.b, z0.d
+cmplo p0.d, p0/z, z0.d, #0
+cmplo p0.d, p0/z, z0.d, #127
+cmplo p0.h, p0/z, z0.h, #0
+cmplo p0.h, p0/z, z0.h, #127
+cmplo p0.h, p0/z, z0.h, z0.d
+cmplo p0.s, p0/z, z0.s, #0
+cmplo p0.s, p0/z, z0.s, #127
+cmplo p0.s, p0/z, z0.s, z0.d
+cmpls p0.b, p0/z, z0.b, #0
+cmpls p0.b, p0/z, z0.b, #127
+cmpls p0.b, p0/z, z0.b, z0.d
+cmpls p0.d, p0/z, z0.d, #0
+cmpls p0.d, p0/z, z0.d, #127
+cmpls p0.h, p0/z, z0.h, #0
+cmpls p0.h, p0/z, z0.h, #127
+cmpls p0.h, p0/z, z0.h, z0.d
+cmpls p0.s, p0/z, z0.s, #0
+cmpls p0.s, p0/z, z0.s, #127
+cmpls p0.s, p0/z, z0.s, z0.d
+cmplt p0.b, p0/z, z0.b, #-16
+cmplt p0.b, p0/z, z0.b, #15
+cmplt p0.b, p0/z, z0.b, z0.d
+cmplt p0.d, p0/z, z0.d, #-16
+cmplt p0.d, p0/z, z0.d, #15
+cmplt p0.h, p0/z, z0.h, #-16
+cmplt p0.h, p0/z, z0.h, #15
+cmplt p0.h, p0/z, z0.h, z0.d
+cmplt p0.s, p0/z, z0.s, #-16
+cmplt p0.s, p0/z, z0.s, #15
+cmplt p0.s, p0/z, z0.s, z0.d
+cmpne p0.b, p0/z, z0.b, #-16
+cmpne p0.b, p0/z, z0.b, #15
+cmpne p0.b, p0/z, z0.b, z0.b
+cmpne p0.b, p0/z, z0.b, z0.d
+cmpne p0.d, p0/z, z0.d, #-16
+cmpne p0.d, p0/z, z0.d, #15
+cmpne p0.d, p0/z, z0.d, z0.d
+cmpne p0.h, p0/z, z0.h, #-16
+cmpne p0.h, p0/z, z0.h, #15
+cmpne p0.h, p0/z, z0.h, z0.d
+cmpne p0.h, p0/z, z0.h, z0.h
+cmpne p0.s, p0/z, z0.s, #-16
+cmpne p0.s, p0/z, z0.s, #15
+cmpne p0.s, p0/z, z0.s, z0.d
+cmpne p0.s, p0/z, z0.s, z0.s
+cnot z31.b, p7/m, z31.b
+cnot z31.d, p7/m, z31.d
+cnot z31.h, p7/m, z31.h
+cnot z31.s, p7/m, z31.s
+cnt z31.b, p7/m, z31.b
+cnt z31.d, p7/m, z31.d
+cnt z31.h, p7/m, z31.h
+cnt z31.s, p7/m, z31.s
+cntb x0
+cntb x0, #28
+cntb x0, all, mul #16
+cntb x0, pow2
+cntd x0
+cntd x0, #28
+cntd x0, all, mul #16
+cntd x0, pow2
+cnth x0
+cnth x0, #28
+cnth x0, all, mul #16
+cnth x0, pow2
+cntp x0, p15, p0.b
+cntp x0, p15, p0.d
+cntp x0, p15, p0.h
+cntp x0, p15, p0.s
+cntw x0
+cntw x0, #28
+cntw x0, all, mul #16
+cntw x0, pow2
+compact z31.d, p7, z31.d
+compact z31.s, p7, z31.s
+ctermeq w30, wzr
+ctermeq wzr, w30
+ctermeq x30, xzr
+ctermeq xzr, x30
+ctermne w30, wzr
+ctermne wzr, w30
+ctermne x30, xzr
+ctermne xzr, x30
+decb x0
+decb x0, #14
+decb x0, all, mul #16
+decb x0, pow2
+decb x0, vl1
+decd x0
+decd x0, #14
+decd x0, all, mul #16
+decd x0, pow2
+decd x0, vl1
+dech x0
+dech x0, #14
+dech x0, all, mul #16
+dech x0, pow2
+dech x0, vl1
+decp x0, p0.b
+decp x0, p0.d
+decp x0, p0.h
+decp x0, p0.s
+decp xzr, p15.b
+decp xzr, p15.d
+decp xzr, p15.h
+decp xzr, p15.s
+decp z31.d, p15.d
+decp z31.h, p15.h
+decp z31.s, p15.s
+decw x0
+decw x0, #14
+decw x0, all, mul #16
+decw x0, pow2
+decw x0, vl1
+dupm z0.d, #0xfffffffffffffff9
+dupm z0.s, #0xfffffff9
+dupm z23.h, #0xfff9
+dupm z5.b, #0xf9
+eor p0.b, p0/z, p0.b, p1.b
+eor z0.d, z0.d, #0x6
+eor z0.d, z0.d, #0xfffffffffffffff9
+eor z0.d, z0.d, z0.d
+eor z0.s, z0.s, #0x6
+eor z0.s, z0.s, #0xfffffff9
+eor z23.d, z13.d, z8.d
+eor z23.h, z23.h, #0x6
+eor z23.h, z23.h, #0xfff9
+eor z31.b, p7/m, z31.b, z31.b
+eor z31.d, p7/m, z31.d, z31.d
+eor z31.h, p7/m, z31.h, z31.h
+eor z31.s, p7/m, z31.s, z31.s
+eor z5.b, z5.b, #0x6
+eor z5.b, z5.b, #0xf9
+eors p0.b, p0/z, p0.b, p1.b
+eorv b0, p7, z31.b
+eorv d0, p7, z31.d
+eorv h0, p7, z31.h
+eorv s0, p7, z31.s
+ext z31.b, z31.b, z0.b, #0
+ext z31.b, z31.b, z0.b, #255
+fabd z0.d, p7/m, z0.d, z31.d
+fabd z0.h, p7/m, z0.h, z31.h
+fabd z0.s, p7/m, z0.s, z31.s
+fabs z31.d, p7/m, z31.d
+fabs z31.h, p7/m, z31.h
+fabs z31.s, p7/m, z31.s
+facge p0.d, p0/z, z0.d, z1.d
+facge p0.d, p0/z, z1.d, z0.d
+facge p0.h, p0/z, z0.h, z1.h
+facge p0.h, p0/z, z1.h, z0.h
+facge p0.s, p0/z, z0.s, z1.s
+facge p0.s, p0/z, z1.s, z0.s
+facgt p0.d, p0/z, z0.d, z1.d
+facgt p0.d, p0/z, z1.d, z0.d
+facgt p0.h, p0/z, z0.h, z1.h
+facgt p0.h, p0/z, z1.h, z0.h
+facgt p0.s, p0/z, z0.s, z1.s
+facgt p0.s, p0/z, z1.s, z0.s
+fadd z0.d, p0/m, z0.d, #0.5
+fadd z0.d, p7/m, z0.d, z31.d
+fadd z0.d, z1.d, z31.d
+fadd z0.h, p0/m, z0.h, #0.5
+fadd z0.h, p7/m, z0.h, z31.h
+fadd z0.h, z1.h, z31.h
+fadd z0.s, p0/m, z0.s, #0.5
+fadd z0.s, p7/m, z0.s, z31.s
+fadd z0.s, z1.s, z31.s
+fadd z31.d, p7/m, z31.d, #1.0
+fadd z31.h, p7/m, z31.h, #1.0
+fadd z31.s, p7/m, z31.s, #1.0
+fadda d0, p7, d0, z31.d
+fadda h0, p7, h0, z31.h
+fadda s0, p7, s0, z31.s
+faddv d0, p7, z31.d
+faddv h0, p7, z31.h
+faddv s0, p7, z31.s
+fcadd z0.d, p0/m, z0.d, z0.d, #90
+fcadd z0.h, p0/m, z0.h, z0.h, #90
+fcadd z0.s, p0/m, z0.s, z0.s, #90
+fcadd z31.d, p7/m, z31.d, z31.d, #270
+fcadd z31.h, p7/m, z31.h, z31.h, #270
+fcadd z31.s, p7/m, z31.s, z31.s, #270
+fcmeq p0.d, p0/z, z0.d, #0.0
+fcmeq p0.d, p0/z, z0.d, z1.d
+fcmeq p0.h, p0/z, z0.h, #0.0
+fcmeq p0.h, p0/z, z0.h, z1.h
+fcmeq p0.s, p0/z, z0.s, #0.0
+fcmeq p0.s, p0/z, z0.s, z1.s
+fcmge p0.d, p0/z, z0.d, #0.0
+fcmge p0.d, p0/z, z0.d, z1.d
+fcmge p0.d, p0/z, z1.d, z0.d
+fcmge p0.h, p0/z, z0.h, #0.0
+fcmge p0.h, p0/z, z0.h, z1.h
+fcmge p0.h, p0/z, z1.h, z0.h
+fcmge p0.s, p0/z, z0.s, #0.0
+fcmge p0.s, p0/z, z0.s, z1.s
+fcmge p0.s, p0/z, z1.s, z0.s
+fcmgt p0.d, p0/z, z0.d, #0.0
+fcmgt p0.d, p0/z, z0.d, z1.d
+fcmgt p0.d, p0/z, z1.d, z0.d
+fcmgt p0.h, p0/z, z0.h, #0.0
+fcmgt p0.h, p0/z, z0.h, z1.h
+fcmgt p0.h, p0/z, z1.h, z0.h
+fcmgt p0.s, p0/z, z0.s, #0.0
+fcmgt p0.s, p0/z, z0.s, z1.s
+fcmgt p0.s, p0/z, z1.s, z0.s
+fcmla z0.d, p0/m, z0.d, z0.d, #0
+fcmla z0.d, p0/m, z1.d, z2.d, #90
+fcmla z0.h, p0/m, z0.h, z0.h, #0
+fcmla z0.h, p0/m, z1.h, z2.h, #90
+fcmla z0.h, z0.h, z0.h[0], #0
+fcmla z0.s, p0/m, z0.s, z0.s, #0
+fcmla z0.s, p0/m, z1.s, z2.s, #90
+fcmla z21.s, z10.s, z5.s[1], #90
+fcmla z23.s, z13.s, z8.s[0], #270
+fcmla z29.d, p7/m, z30.d, z31.d, #180
+fcmla z29.h, p7/m, z30.h, z31.h, #180
+fcmla z29.s, p7/m, z30.s, z31.s, #180
+fcmla z31.d, p7/m, z31.d, z31.d, #270
+fcmla z31.h, p7/m, z31.h, z31.h, #270
+fcmla z31.h, z31.h, z7.h[3], #270
+fcmla z31.s, p7/m, z31.s, z31.s, #270
+fcmle p0.d, p0/z, z0.d, #0.0
+fcmle p0.h, p0/z, z0.h, #0.0
+fcmle p0.s, p0/z, z0.s, #0.0
+fcmlt p0.d, p0/z, z0.d, #0.0
+fcmlt p0.h, p0/z, z0.h, #0.0
+fcmlt p0.s, p0/z, z0.s, #0.0
+fcmne p0.d, p0/z, z0.d, #0.0
+fcmne p0.d, p0/z, z0.d, z1.d
+fcmne p0.h, p0/z, z0.h, #0.0
+fcmne p0.h, p0/z, z0.h, z1.h
+fcmne p0.s, p0/z, z0.s, #0.0
+fcmne p0.s, p0/z, z0.s, z1.s
+fcmuo p0.d, p0/z, z0.d, z1.d
+fcmuo p0.h, p0/z, z0.h, z1.h
+fcmuo p0.s, p0/z, z0.s, z1.s
+fcvt z0.d, p0/m, z0.h
+fcvt z0.d, p0/m, z0.s
+fcvt z0.h, p0/m, z0.d
+fcvt z0.h, p0/m, z0.s
+fcvt z0.s, p0/m, z0.d
+fcvt z0.s, p0/m, z0.h
+fcvtzs z0.d, p0/m, z0.d
+fcvtzs z0.d, p0/m, z0.h
+fcvtzs z0.d, p0/m, z0.s
+fcvtzs z0.h, p0/m, z0.h
+fcvtzs z0.s, p0/m, z0.d
+fcvtzs z0.s, p0/m, z0.h
+fcvtzs z0.s, p0/m, z0.s
+fcvtzu z0.d, p0/m, z0.d
+fcvtzu z0.d, p0/m, z0.h
+fcvtzu z0.d, p0/m, z0.s
+fcvtzu z0.h, p0/m, z0.h
+fcvtzu z0.s, p0/m, z0.d
+fcvtzu z0.s, p0/m, z0.h
+fcvtzu z0.s, p0/m, z0.s
+fdiv z0.d, p7/m, z0.d, z31.d
+fdiv z0.h, p7/m, z0.h, z31.h
+fdiv z0.s, p7/m, z0.s, z31.s
+fdivr z0.d, p7/m, z0.d, z31.d
+fdivr z0.h, p7/m, z0.h, z31.h
+fdivr z0.s, p7/m, z0.s, z31.s
+fexpa z0.d, z31.d
+fexpa z0.h, z31.h
+fexpa z0.s, z31.s
+fmad z0.d, p7/m, z1.d, z31.d
+fmad z0.h, p7/m, z1.h, z31.h
+fmad z0.s, p7/m, z1.s, z31.s
+fmax z0.d, p0/m, z0.d, #0.0
+fmax z0.d, p7/m, z0.d, z31.d
+fmax z0.h, p0/m, z0.h, #0.0
+fmax z0.h, p7/m, z0.h, z31.h
+fmax z0.s, p0/m, z0.s, #0.0
+fmax z0.s, p7/m, z0.s, z31.s
+fmax z31.d, p7/m, z31.d, #1.0
+fmax z31.h, p7/m, z31.h, #1.0
+fmax z31.s, p7/m, z31.s, #1.0
+fmaxnm z0.d, p0/m, z0.d, #0.0
+fmaxnm z0.d, p7/m, z0.d, z31.d
+fmaxnm z0.h, p0/m, z0.h, #0.0
+fmaxnm z0.h, p7/m, z0.h, z31.h
+fmaxnm z0.s, p0/m, z0.s, #0.0
+fmaxnm z0.s, p7/m, z0.s, z31.s
+fmaxnm z31.d, p7/m, z31.d, #1.0
+fmaxnm z31.h, p7/m, z31.h, #1.0
+fmaxnm z31.s, p7/m, z31.s, #1.0
+fmaxnmv d0, p7, z31.d
+fmaxnmv h0, p7, z31.h
+fmaxnmv s0, p7, z31.s
+fmaxv d0, p7, z31.d
+fmaxv h0, p7, z31.h
+fmaxv s0, p7, z31.s
+fmin z0.d, p0/m, z0.d, #0.0
+fmin z0.d, p7/m, z0.d, z31.d
+fmin z0.h, p0/m, z0.h, #0.0
+fmin z0.h, p7/m, z0.h, z31.h
+fmin z0.s, p0/m, z0.s, #0.0
+fmin z0.s, p7/m, z0.s, z31.s
+fmin z31.d, p7/m, z31.d, #1.0
+fmin z31.h, p7/m, z31.h, #1.0
+fmin z31.s, p7/m, z31.s, #1.0
+fminnm z0.d, p0/m, z0.d, #0.0
+fminnm z0.d, p7/m, z0.d, z31.d
+fminnm z0.h, p0/m, z0.h, #0.0
+fminnm z0.h, p7/m, z0.h, z31.h
+fminnm z0.s, p0/m, z0.s, #0.0
+fminnm z0.s, p7/m, z0.s, z31.s
+fminnm z31.d, p7/m, z31.d, #1.0
+fminnm z31.h, p7/m, z31.h, #1.0
+fminnm z31.s, p7/m, z31.s, #1.0
+fminnmv d0, p7, z31.d
+fminnmv h0, p7, z31.h
+fminnmv s0, p7, z31.s
+fminv d0, p7, z31.d
+fminv h0, p7, z31.h
+fminv s0, p7, z31.s
+fmla z0.d, p7/m, z1.d, z31.d
+fmla z0.d, z1.d, z7.d[1]
+fmla z0.h, p7/m, z1.h, z31.h
+fmla z0.h, z1.h, z7.h[7]
+fmla z0.s, p7/m, z1.s, z31.s
+fmla z0.s, z1.s, z7.s[3]
+fmls z0.d, p7/m, z1.d, z31.d
+fmls z0.d, z1.d, z7.d[1]
+fmls z0.h, p7/m, z1.h, z31.h
+fmls z0.h, z1.h, z7.h[7]
+fmls z0.s, p7/m, z1.s, z31.s
+fmls z0.s, z1.s, z7.s[3]
+fmov z0.d, #-10.00000000
+fmov z0.d, #0.12500000
+fmov z0.d, p0/m, #-10.00000000
+fmov z0.d, p0/m, #0.12500000
+fmov z0.h, #-0.12500000
+fmov z0.h, p0/m, #-0.12500000
+fmov z0.s, #-0.12500000
+fmov z0.s, p0/m, #-0.12500000
+fmsb z0.d, p7/m, z1.d, z31.d
+fmsb z0.h, p7/m, z1.h, z31.h
+fmsb z0.s, p7/m, z1.s, z31.s
+fmul z0.d, p0/m, z0.d, #0.5
+fmul z0.d, p7/m, z0.d, z31.d
+fmul z0.d, z0.d, z0.d[0]
+fmul z0.d, z1.d, z31.d
+fmul z0.h, p0/m, z0.h, #0.5
+fmul z0.h, p7/m, z0.h, z31.h
+fmul z0.h, z0.h, z0.h[0]
+fmul z0.h, z1.h, z31.h
+fmul z0.s, p0/m, z0.s, #0.5
+fmul z0.s, p7/m, z0.s, z31.s
+fmul z0.s, z0.s, z0.s[0]
+fmul z0.s, z1.s, z31.s
+fmul z31.d, p7/m, z31.d, #2.0
+fmul z31.d, z31.d, z15.d[1]
+fmul z31.h, p7/m, z31.h, #2.0
+fmul z31.h, z31.h, z7.h[7]
+fmul z31.s, p7/m, z31.s, #2.0
+fmul z31.s, z31.s, z7.s[3]
+fmulx z0.d, p7/m, z0.d, z31.d
+fmulx z0.h, p7/m, z0.h, z31.h
+fmulx z0.s, p7/m, z0.s, z31.s
+fneg z31.d, p7/m, z31.d
+fneg z31.h, p7/m, z31.h
+fneg z31.s, p7/m, z31.s
+fnmad z0.d, p7/m, z1.d, z31.d
+fnmad z0.h, p7/m, z1.h, z31.h
+fnmad z0.s, p7/m, z1.s, z31.s
+fnmla z0.d, p7/m, z1.d, z31.d
+fnmla z0.h, p7/m, z1.h, z31.h
+fnmla z0.s, p7/m, z1.s, z31.s
+fnmls z0.d, p7/m, z1.d, z31.d
+fnmls z0.h, p7/m, z1.h, z31.h
+fnmls z0.s, p7/m, z1.s, z31.s
+fnmsb z0.d, p7/m, z1.d, z31.d
+fnmsb z0.h, p7/m, z1.h, z31.h
+fnmsb z0.s, p7/m, z1.s, z31.s
+frecpe z0.d, z31.d
+frecpe z0.h, z31.h
+frecpe z0.s, z31.s
+frecps z0.d, z1.d, z31.d
+frecps z0.h, z1.h, z31.h
+frecps z0.s, z1.s, z31.s
+frecpx z31.d, p7/m, z31.d
+frecpx z31.h, p7/m, z31.h
+frecpx z31.s, p7/m, z31.s
+frinta z31.d, p7/m, z31.d
+frinta z31.h, p7/m, z31.h
+frinta z31.s, p7/m, z31.s
+frinti z31.d, p7/m, z31.d
+frinti z31.h, p7/m, z31.h
+frinti z31.s, p7/m, z31.s
+frintm z31.d, p7/m, z31.d
+frintm z31.h, p7/m, z31.h
+frintm z31.s, p7/m, z31.s
+frintn z31.d, p7/m, z31.d
+frintn z31.h, p7/m, z31.h
+frintn z31.s, p7/m, z31.s
+frintp z31.d, p7/m, z31.d
+frintp z31.h, p7/m, z31.h
+frintp z31.s, p7/m, z31.s
+frintx z31.d, p7/m, z31.d
+frintx z31.h, p7/m, z31.h
+frintx z31.s, p7/m, z31.s
+frintz z31.d, p7/m, z31.d
+frintz z31.h, p7/m, z31.h
+frintz z31.s, p7/m, z31.s
+frsqrte z0.d, z31.d
+frsqrte z0.h, z31.h
+frsqrte z0.s, z31.s
+frsqrts z0.d, z1.d, z31.d
+frsqrts z0.h, z1.h, z31.h
+frsqrts z0.s, z1.s, z31.s
+fscale z0.d, p7/m, z0.d, z31.d
+fscale z0.h, p7/m, z0.h, z31.h
+fscale z0.s, p7/m, z0.s, z31.s
+fsqrt z31.d, p7/m, z31.d
+fsqrt z31.h, p7/m, z31.h
+fsqrt z31.s, p7/m, z31.s
+fsub z0.d, p0/m, z0.d, #0.5
+fsub z0.d, p7/m, z0.d, z31.d
+fsub z0.d, z1.d, z31.d
+fsub z0.h, p0/m, z0.h, #0.5
+fsub z0.h, p7/m, z0.h, z31.h
+fsub z0.h, z1.h, z31.h
+fsub z0.s, p0/m, z0.s, #0.5
+fsub z0.s, p7/m, z0.s, z31.s
+fsub z0.s, z1.s, z31.s
+fsub z31.d, p7/m, z31.d, #1.0
+fsub z31.h, p7/m, z31.h, #1.0
+fsub z31.s, p7/m, z31.s, #1.0
+fsubr z0.d, p0/m, z0.d, #0.5
+fsubr z0.d, p7/m, z0.d, z31.d
+fsubr z0.h, p0/m, z0.h, #0.5
+fsubr z0.h, p7/m, z0.h, z31.h
+fsubr z0.s, p0/m, z0.s, #0.5
+fsubr z0.s, p7/m, z0.s, z31.s
+fsubr z31.d, p7/m, z31.d, #1.0
+fsubr z31.h, p7/m, z31.h, #1.0
+fsubr z31.s, p7/m, z31.s, #1.0
+ftmad z0.d, z0.d, z31.d, #7
+ftmad z0.h, z0.h, z31.h, #7
+ftmad z0.s, z0.s, z31.s, #7
+ftsmul z0.d, z1.d, z31.d
+ftsmul z0.h, z1.h, z31.h
+ftsmul z0.s, z1.s, z31.s
+ftssel z0.d, z1.d, z31.d
+ftssel z0.h, z1.h, z31.h
+ftssel z0.s, z1.s, z31.s
+incb x0
+incb x0, #14
+incb x0, all, mul #16
+incb x0, pow2
+incb x0, vl1
+incd x0
+incd x0, #14
+incd x0, all, mul #16
+incd x0, pow2
+incd x0, vl1
+incd z0.d
+incd z0.d, all, mul #16
+inch x0
+inch x0, #14
+inch x0, all, mul #16
+inch x0, pow2
+inch x0, vl1
+inch z0.h
+inch z0.h, all, mul #16
+incp x0, p0.b
+incp x0, p0.d
+incp x0, p0.h
+incp x0, p0.s
+incp xzr, p15.b
+incp xzr, p15.d
+incp xzr, p15.h
+incp xzr, p15.s
+incp z31.d, p15.d
+incp z31.h, p15.h
+incp z31.s, p15.s
+incw x0
+incw x0, #14
+incw x0, all, mul #16
+incw x0, pow2
+incw x0, vl1
+incw z0.s
+incw z0.s, all, mul #16
+index z0.b, #0, #0
+index z0.d, #0, #0
+index z0.h, #0, #0
+index z0.h, w0, w0
+index z0.s, #0, #0
+index z21.b, w10, w21
+index z21.d, x10, x21
+index z21.s, w10, w21
+index z23.b, #13, w8
+index z23.b, w13, #8
+index z23.d, #13, x8
+index z23.d, x13, #8
+index z23.h, #13, w8
+index z23.h, w13, #8
+index z23.s, #13, w8
+index z23.s, w13, #8
+index z31.b, #-1, #-1
+index z31.b, #-1, wzr
+index z31.b, wzr, #-1
+index z31.b, wzr, wzr
+index z31.d, #-1, #-1
+index z31.d, #-1, xzr
+index z31.d, xzr, #-1
+index z31.d, xzr, xzr
+index z31.h, #-1, #-1
+index z31.h, #-1, wzr
+index z31.h, wzr, #-1
+index z31.h, wzr, wzr
+index z31.s, #-1, #-1
+index z31.s, #-1, wzr
+index z31.s, wzr, #-1
+index z31.s, wzr, wzr
+insr z0.b, w0
+insr z0.d, x0
+insr z0.h, w0
+insr z0.s, w0
+insr z31.b, b31
+insr z31.b, wzr
+insr z31.d, d31
+insr z31.d, xzr
+insr z31.h, h31
+insr z31.h, wzr
+insr z31.s, s31
+insr z31.s, wzr
+lasta b0, p7, z31.b
+lasta d0, p7, z31.d
+lasta h0, p7, z31.h
+lasta s0, p7, z31.s
+lasta w0, p7, z31.b
+lasta w0, p7, z31.h
+lasta w0, p7, z31.s
+lasta x0, p7, z31.d
+lastb b0, p7, z31.b
+lastb d0, p7, z31.d
+lastb h0, p7, z31.h
+lastb s0, p7, z31.s
+lastb w0, p7, z31.b
+lastb w0, p7, z31.h
+lastb w0, p7, z31.s
+lastb x0, p7, z31.d
+ld1b { z0.b }, p0/z, [sp, x0]
+ld1b { z0.b }, p0/z, [x0, x0]
+ld1b { z0.b }, p0/z, [x0]
+ld1b { z0.d }, p0/z, [x0]
+ld1b { z0.d }, p0/z, [z0.d]
+ld1b { z0.h }, p0/z, [x0]
+ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+ld1b { z0.s }, p0/z, [x0]
+ld1b { z0.s }, p0/z, [z0.s]
+ld1b { z21.b }, p5/z, [x10, #5, mul vl]
+ld1b { z21.d }, p5/z, [x10, #5, mul vl]
+ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1b { z21.h }, p5/z, [x10, #5, mul vl]
+ld1b { z21.s }, p5/z, [x10, #5, mul vl]
+ld1b { z21.s }, p5/z, [x10, x21]
+ld1b { z23.d }, p3/z, [x13, x8]
+ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
+ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1b { z31.d }, p7/z, [sp, z31.d]
+ld1b { z31.d }, p7/z, [z31.d, #31]
+ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
+ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
+ld1b { z31.s }, p7/z, [z31.s, #31]
+ld1b { z5.h }, p3/z, [x17, x16]
+ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+ld1d { z0.d }, p0/z, [x0]
+ld1d { z0.d }, p0/z, [z0.d]
+ld1d { z21.d }, p5/z, [x10, #5, mul vl]
+ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1d { z23.d }, p3/z, [sp, x8, lsl #3]
+ld1d { z23.d }, p3/z, [x13, x8, lsl #3]
+ld1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+ld1d { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1d { z31.d }, p7/z, [sp, z31.d]
+ld1d { z31.d }, p7/z, [z31.d, #248]
+ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+ld1h { z0.d }, p0/z, [x0]
+ld1h { z0.d }, p0/z, [z0.d]
+ld1h { z0.h }, p0/z, [x0]
+ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+ld1h { z0.s }, p0/z, [x0]
+ld1h { z0.s }, p0/z, [z0.s]
+ld1h { z21.d }, p5/z, [x10, #5, mul vl]
+ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1h { z21.h }, p5/z, [x10, #5, mul vl]
+ld1h { z21.s }, p5/z, [x10, #5, mul vl]
+ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
+ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
+ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1h { z31.d }, p7/z, [sp, z31.d]
+ld1h { z31.d }, p7/z, [z31.d, #62]
+ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
+ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
+ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+ld1h { z31.s }, p7/z, [z31.s, #62]
+ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
+ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
+ld1rb { z0.b }, p0/z, [x0]
+ld1rb { z0.d }, p0/z, [x0]
+ld1rb { z0.h }, p0/z, [x0]
+ld1rb { z0.s }, p0/z, [x0]
+ld1rb { z31.b }, p7/z, [sp, #63]
+ld1rb { z31.d }, p7/z, [sp, #63]
+ld1rb { z31.h }, p7/z, [sp, #63]
+ld1rb { z31.s }, p7/z, [sp, #63]
+ld1rd { z0.d }, p0/z, [x0]
+ld1rd { z31.d }, p7/z, [sp, #504]
+ld1rh { z0.d }, p0/z, [x0]
+ld1rh { z0.h }, p0/z, [x0]
+ld1rh { z0.s }, p0/z, [x0]
+ld1rh { z31.d }, p7/z, [sp, #126]
+ld1rh { z31.h }, p7/z, [sp, #126]
+ld1rh { z31.s }, p7/z, [sp, #126]
+ld1rqb { z0.b }, p0/z, [x0, x0]
+ld1rqb { z0.b }, p0/z, [x0]
+ld1rqb { z21.b }, p5/z, [x10, #112]
+ld1rqb { z23.b }, p3/z, [x13, #-128]
+ld1rqb { z31.b }, p7/z, [sp, #-16]
+ld1rqd { z0.d }, p0/z, [x0, x0, lsl #3]
+ld1rqd { z0.d }, p0/z, [x0]
+ld1rqd { z23.d }, p3/z, [x13, #-128]
+ld1rqd { z23.d }, p3/z, [x13, #112]
+ld1rqd { z31.d }, p7/z, [sp, #-16]
+ld1rqh { z0.h }, p0/z, [x0, x0, lsl #1]
+ld1rqh { z0.h }, p0/z, [x0]
+ld1rqh { z23.h }, p3/z, [x13, #-128]
+ld1rqh { z23.h }, p3/z, [x13, #112]
+ld1rqh { z31.h }, p7/z, [sp, #-16]
+ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2]
+ld1rqw { z0.s }, p0/z, [x0]
+ld1rqw { z23.s }, p3/z, [x13, #-128]
+ld1rqw { z23.s }, p3/z, [x13, #112]
+ld1rqw { z31.s }, p7/z, [sp, #-16]
+ld1rsb { z0.d }, p0/z, [x0]
+ld1rsb { z0.h }, p0/z, [x0]
+ld1rsb { z0.s }, p0/z, [x0]
+ld1rsb { z31.d }, p7/z, [sp, #63]
+ld1rsb { z31.h }, p7/z, [sp, #63]
+ld1rsb { z31.s }, p7/z, [sp, #63]
+ld1rsh { z0.d }, p0/z, [x0]
+ld1rsh { z0.s }, p0/z, [x0]
+ld1rsh { z31.d }, p7/z, [sp, #126]
+ld1rsh { z31.s }, p7/z, [sp, #126]
+ld1rsw { z0.d }, p0/z, [x0]
+ld1rsw { z31.d }, p7/z, [sp, #252]
+ld1rw { z0.d }, p0/z, [x0]
+ld1rw { z0.s }, p0/z, [x0]
+ld1rw { z31.d }, p7/z, [sp, #252]
+ld1rw { z31.s }, p7/z, [sp, #252]
+ld1sb { z0.d }, p0/z, [x0]
+ld1sb { z0.d }, p0/z, [z0.d]
+ld1sb { z0.h }, p0/z, [sp, x0]
+ld1sb { z0.h }, p0/z, [x0, x0]
+ld1sb { z0.h }, p0/z, [x0]
+ld1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+ld1sb { z0.s }, p0/z, [x0]
+ld1sb { z0.s }, p0/z, [z0.s]
+ld1sb { z21.d }, p5/z, [x10, #5, mul vl]
+ld1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1sb { z21.h }, p5/z, [x10, #5, mul vl]
+ld1sb { z21.s }, p5/z, [x10, #5, mul vl]
+ld1sb { z21.s }, p5/z, [x10, x21]
+ld1sb { z23.d }, p3/z, [x13, x8]
+ld1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1sb { z31.d }, p7/z, [sp, z31.d]
+ld1sb { z31.d }, p7/z, [z31.d, #31]
+ld1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+ld1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+ld1sb { z31.s }, p7/z, [z31.s, #31]
+ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+ld1sh { z0.d }, p0/z, [x0]
+ld1sh { z0.d }, p0/z, [z0.d]
+ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+ld1sh { z0.s }, p0/z, [x0]
+ld1sh { z0.s }, p0/z, [z0.s]
+ld1sh { z21.d }, p5/z, [x10, #5, mul vl]
+ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1sh { z21.s }, p5/z, [sp, x21, lsl #1]
+ld1sh { z21.s }, p5/z, [x10, #5, mul vl]
+ld1sh { z21.s }, p5/z, [x10, x21, lsl #1]
+ld1sh { z23.d }, p3/z, [x13, x8, lsl #1]
+ld1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+ld1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1sh { z31.d }, p7/z, [sp, z31.d]
+ld1sh { z31.d }, p7/z, [z31.d, #62]
+ld1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+ld1sh { z31.s }, p7/z, [z31.s, #62]
+ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+ld1sw { z0.d }, p0/z, [x0]
+ld1sw { z0.d }, p0/z, [z0.d]
+ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
+ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
+ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
+ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1sw { z31.d }, p7/z, [sp, z31.d]
+ld1sw { z31.d }, p7/z, [z31.d, #124]
+ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+ld1w { z0.d }, p0/z, [x0]
+ld1w { z0.d }, p0/z, [z0.d]
+ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+ld1w { z0.s }, p0/z, [x0]
+ld1w { z0.s }, p0/z, [z0.s]
+ld1w { z21.d }, p5/z, [x10, #5, mul vl]
+ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+ld1w { z21.s }, p5/z, [sp, x21, lsl #2]
+ld1w { z21.s }, p5/z, [x10, #5, mul vl]
+ld1w { z21.s }, p5/z, [x10, x21, lsl #2]
+ld1w { z23.d }, p3/z, [x13, x8, lsl #2]
+ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+ld1w { z31.d }, p7/z, [sp, #-1, mul vl]
+ld1w { z31.d }, p7/z, [sp, z31.d]
+ld1w { z31.d }, p7/z, [z31.d, #124]
+ld1w { z31.s }, p7/z, [sp, #-1, mul vl]
+ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+ld1w { z31.s }, p7/z, [z31.s, #124]
+ld2b { z0.b, z1.b }, p0/z, [x0, x0]
+ld2b { z0.b, z1.b }, p0/z, [x0]
+ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl]
+ld2b { z5.b, z6.b }, p3/z, [x17, x16]
+ld2d { z0.d, z1.d }, p0/z, [x0, x0, lsl #3]
+ld2d { z0.d, z1.d }, p0/z, [x0]
+ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+ld2d { z23.d, z24.d }, p3/z, [x13, #-16, mul vl]
+ld2d { z5.d, z6.d }, p3/z, [x17, x16, lsl #3]
+ld2h { z0.h, z1.h }, p0/z, [x0, x0, lsl #1]
+ld2h { z0.h, z1.h }, p0/z, [x0]
+ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+ld2h { z23.h, z24.h }, p3/z, [x13, #-16, mul vl]
+ld2h { z5.h, z6.h }, p3/z, [x17, x16, lsl #1]
+ld2w { z0.s, z1.s }, p0/z, [x0, x0, lsl #2]
+ld2w { z0.s, z1.s }, p0/z, [x0]
+ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+ld2w { z23.s, z24.s }, p3/z, [x13, #-16, mul vl]
+ld2w { z5.s, z6.s }, p3/z, [x17, x16, lsl #2]
+ld3b { z0.b, z1.b, z2.b }, p0/z, [x0, x0]
+ld3b { z0.b, z1.b, z2.b }, p0/z, [x0]
+ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+ld3b { z23.b, z24.b, z25.b }, p3/z, [x13, #-24, mul vl]
+ld3b { z5.b, z6.b, z7.b }, p3/z, [x17, x16]
+ld3d { z0.d, z1.d, z2.d }, p0/z, [x0, x0, lsl #3]
+ld3d { z0.d, z1.d, z2.d }, p0/z, [x0]
+ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+ld3d { z23.d, z24.d, z25.d }, p3/z, [x13, #-24, mul vl]
+ld3d { z5.d, z6.d, z7.d }, p3/z, [x17, x16, lsl #3]
+ld3h { z0.h, z1.h, z2.h }, p0/z, [x0, x0, lsl #1]
+ld3h { z0.h, z1.h, z2.h }, p0/z, [x0]
+ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+ld3h { z23.h, z24.h, z25.h }, p3/z, [x13, #-24, mul vl]
+ld3h { z5.h, z6.h, z7.h }, p3/z, [x17, x16, lsl #1]
+ld3w { z0.s, z1.s, z2.s }, p0/z, [x0, x0, lsl #2]
+ld3w { z0.s, z1.s, z2.s }, p0/z, [x0]
+ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+ld3w { z23.s, z24.s, z25.s }, p3/z, [x13, #-24, mul vl]
+ld3w { z5.s, z6.s, z7.s }, p3/z, [x17, x16, lsl #2]
+ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, x0]
+ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0]
+ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+ld4b { z23.b, z24.b, z25.b, z26.b }, p3/z, [x13, #-32, mul vl]
+ld4b { z5.b, z6.b, z7.b, z8.b }, p3/z, [x17, x16]
+ld4d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0, x0, lsl #3]
+ld4d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0]
+ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+ld4d { z23.d, z24.d, z25.d, z26.d }, p3/z, [x13, #-32, mul vl]
+ld4d { z5.d, z6.d, z7.d, z8.d }, p3/z, [x17, x16, lsl #3]
+ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
+ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
+ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
+ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
+ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0, x0, lsl #2]
+ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0]
+ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+ld4w { z23.s, z24.s, z25.s, z26.s }, p3/z, [x13, #-32, mul vl]
+ld4w { z5.s, z6.s, z7.s, z8.s }, p3/z, [x17, x16, lsl #2]
+ldff1b { z0.d }, p0/z, [x0, x0]
+ldff1b { z0.d }, p0/z, [z0.d]
+ldff1b { z0.h }, p0/z, [x0, x0]
+ldff1b { z0.s }, p0/z, [x0, x0]
+ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+ldff1b { z0.s }, p0/z, [z0.s]
+ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1b { z31.b }, p7/z, [sp]
+ldff1b { z31.d }, p7/z, [sp, z31.d]
+ldff1b { z31.d }, p7/z, [sp]
+ldff1b { z31.d }, p7/z, [z31.d, #31]
+ldff1b { z31.h }, p7/z, [sp]
+ldff1b { z31.s }, p7/z, [sp]
+ldff1b { z31.s }, p7/z, [z31.s, #31]
+ldff1d { z0.d }, p0/z, [x0, x0, lsl #3]
+ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+ldff1d { z0.d }, p0/z, [z0.d]
+ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+ldff1d { z31.d }, p7/z, [sp, z31.d]
+ldff1d { z31.d }, p7/z, [sp]
+ldff1d { z31.d }, p7/z, [z31.d, #248]
+ldff1h { z0.d }, p0/z, [x0, x0, lsl #1]
+ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+ldff1h { z0.d }, p0/z, [z0.d]
+ldff1h { z0.h }, p0/z, [x0, x0, lsl #1]
+ldff1h { z0.s }, p0/z, [x0, x0, lsl #1]
+ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+ldff1h { z0.s }, p0/z, [z0.s]
+ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+ldff1h { z31.d }, p7/z, [sp, z31.d]
+ldff1h { z31.d }, p7/z, [sp]
+ldff1h { z31.d }, p7/z, [z31.d, #62]
+ldff1h { z31.h }, p7/z, [sp]
+ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+ldff1h { z31.s }, p7/z, [sp]
+ldff1h { z31.s }, p7/z, [z31.s, #62]
+ldff1sb { z0.d }, p0/z, [x0, x0]
+ldff1sb { z0.d }, p0/z, [z0.d]
+ldff1sb { z0.h }, p0/z, [x0, x0]
+ldff1sb { z0.s }, p0/z, [x0, x0]
+ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+ldff1sb { z0.s }, p0/z, [x0, z0.s, uxtw]
+ldff1sb { z0.s }, p0/z, [z0.s]
+ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1sb { z31.d }, p7/z, [sp, z31.d]
+ldff1sb { z31.d }, p7/z, [sp]
+ldff1sb { z31.d }, p7/z, [z31.d, #31]
+ldff1sb { z31.h }, p7/z, [sp]
+ldff1sb { z31.s }, p7/z, [sp]
+ldff1sb { z31.s }, p7/z, [z31.s, #31]
+ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
+ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+ldff1sh { z0.d }, p0/z, [z0.d]
+ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
+ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+ldff1sh { z0.s }, p0/z, [z0.s]
+ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+ldff1sh { z31.d }, p7/z, [sp, z31.d]
+ldff1sh { z31.d }, p7/z, [sp]
+ldff1sh { z31.d }, p7/z, [z31.d, #62]
+ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+ldff1sh { z31.s }, p7/z, [sp]
+ldff1sh { z31.s }, p7/z, [z31.s, #62]
+ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
+ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+ldff1sw { z0.d }, p0/z, [z0.d]
+ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+ldff1sw { z31.d }, p7/z, [sp, z31.d]
+ldff1sw { z31.d }, p7/z, [sp]
+ldff1sw { z31.d }, p7/z, [z31.d, #124]
+ldff1w { z0.d }, p0/z, [x0, x0, lsl #2]
+ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+ldff1w { z0.d }, p0/z, [z0.d]
+ldff1w { z0.s }, p0/z, [x0, x0, lsl #2]
+ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+ldff1w { z0.s }, p0/z, [z0.s]
+ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+ldff1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+ldff1w { z31.d }, p7/z, [sp, z31.d]
+ldff1w { z31.d }, p7/z, [sp]
+ldff1w { z31.d }, p7/z, [z31.d, #124]
+ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+ldff1w { z31.s }, p7/z, [sp]
+ldff1w { z31.s }, p7/z, [z31.s, #124]
+ldnf1b { z0.b }, p0/z, [x0]
+ldnf1b { z0.d }, p0/z, [x0]
+ldnf1b { z0.h }, p0/z, [x0]
+ldnf1b { z0.s }, p0/z, [x0]
+ldnf1b { z21.b }, p5/z, [x10, #5, mul vl]
+ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1b { z21.h }, p5/z, [x10, #5, mul vl]
+ldnf1b { z21.s }, p5/z, [x10, #5, mul vl]
+ldnf1b { z31.b }, p7/z, [sp, #-1, mul vl]
+ldnf1b { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1b { z31.h }, p7/z, [sp, #-1, mul vl]
+ldnf1b { z31.s }, p7/z, [sp, #-1, mul vl]
+ldnf1d { z0.d }, p0/z, [x0]
+ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1d { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1h { z0.d }, p0/z, [x0]
+ldnf1h { z0.h }, p0/z, [x0]
+ldnf1h { z0.s }, p0/z, [x0]
+ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1h { z21.h }, p5/z, [x10, #5, mul vl]
+ldnf1h { z21.s }, p5/z, [x10, #5, mul vl]
+ldnf1h { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1h { z31.h }, p7/z, [sp, #-1, mul vl]
+ldnf1h { z31.s }, p7/z, [sp, #-1, mul vl]
+ldnf1sb { z0.d }, p0/z, [x0]
+ldnf1sb { z0.h }, p0/z, [x0]
+ldnf1sb { z0.s }, p0/z, [x0]
+ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
+ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
+ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+ldnf1sh { z0.d }, p0/z, [x0]
+ldnf1sh { z0.s }, p0/z, [x0]
+ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1sh { z21.s }, p5/z, [x10, #5, mul vl]
+ldnf1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+ldnf1sw { z0.d }, p0/z, [x0]
+ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1w { z0.d }, p0/z, [x0]
+ldnf1w { z0.s }, p0/z, [x0]
+ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
+ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
+ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
+ldnt1b { z0.b }, p0/z, [x0, x0]
+ldnt1b { z0.b }, p0/z, [x0]
+ldnt1b { z21.b }, p5/z, [x10, #7, mul vl]
+ldnt1b { z23.b }, p3/z, [x13, #-8, mul vl]
+ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+ldnt1d { z0.d }, p0/z, [x0]
+ldnt1d { z21.d }, p5/z, [x10, #7, mul vl]
+ldnt1d { z23.d }, p3/z, [x13, #-8, mul vl]
+ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+ldnt1h { z0.h }, p0/z, [x0]
+ldnt1h { z21.h }, p5/z, [x10, #7, mul vl]
+ldnt1h { z23.h }, p3/z, [x13, #-8, mul vl]
+ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+ldnt1w { z0.s }, p0/z, [x0]
+ldnt1w { z21.s }, p5/z, [x10, #7, mul vl]
+ldnt1w { z23.s }, p3/z, [x13, #-8, mul vl]
+ldr p0, [x0]
+ldr p5, [x10, #255, mul vl]
+ldr p7, [x13, #-256, mul vl]
+ldr z0, [x0]
+ldr z23, [x13, #255, mul vl]
+ldr z31, [sp, #-256, mul vl]
+lsl z0.b, p0/m, z0.b, #0
+lsl z0.b, p0/m, z0.b, z0.b
+lsl z0.b, p0/m, z0.b, z1.d
+lsl z0.b, z0.b, #0
+lsl z0.b, z1.b, z2.d
+lsl z0.d, p0/m, z0.d, #0
+lsl z0.d, p0/m, z0.d, z0.d
+lsl z0.d, z0.d, #0
+lsl z0.h, p0/m, z0.h, #0
+lsl z0.h, p0/m, z0.h, z0.h
+lsl z0.h, p0/m, z0.h, z1.d
+lsl z0.h, z0.h, #0
+lsl z0.h, z1.h, z2.d
+lsl z0.s, p0/m, z0.s, #0
+lsl z0.s, p0/m, z0.s, z0.s
+lsl z0.s, p0/m, z0.s, z1.d
+lsl z0.s, z0.s, #0
+lsl z0.s, z1.s, z2.d
+lsl z31.b, p0/m, z31.b, #7
+lsl z31.b, z31.b, #7
+lsl z31.d, p0/m, z31.d, #63
+lsl z31.d, z31.d, #63
+lsl z31.h, p0/m, z31.h, #15
+lsl z31.h, z31.h, #15
+lsl z31.s, p0/m, z31.s, #31
+lsl z31.s, z31.s, #31
+lslr z0.b, p0/m, z0.b, z0.b
+lslr z0.d, p0/m, z0.d, z0.d
+lslr z0.h, p0/m, z0.h, z0.h
+lslr z0.s, p0/m, z0.s, z0.s
+lsr z0.b, p0/m, z0.b, #1
+lsr z0.b, p0/m, z0.b, z0.b
+lsr z0.b, p0/m, z0.b, z1.d
+lsr z0.b, z0.b, #1
+lsr z0.b, z1.b, z2.d
+lsr z0.d, p0/m, z0.d, #1
+lsr z0.d, p0/m, z0.d, z0.d
+lsr z0.d, z0.d, #1
+lsr z0.h, p0/m, z0.h, #1
+lsr z0.h, p0/m, z0.h, z0.h
+lsr z0.h, p0/m, z0.h, z1.d
+lsr z0.h, z0.h, #1
+lsr z0.h, z1.h, z2.d
+lsr z0.s, p0/m, z0.s, #1
+lsr z0.s, p0/m, z0.s, z0.s
+lsr z0.s, p0/m, z0.s, z1.d
+lsr z0.s, z0.s, #1
+lsr z0.s, z1.s, z2.d
+lsr z31.b, p0/m, z31.b, #8
+lsr z31.b, z31.b, #8
+lsr z31.d, p0/m, z31.d, #64
+lsr z31.d, z31.d, #64
+lsr z31.h, p0/m, z31.h, #16
+lsr z31.h, z31.h, #16
+lsr z31.s, p0/m, z31.s, #32
+lsr z31.s, z31.s, #32
+lsrr z0.b, p0/m, z0.b, z0.b
+lsrr z0.d, p0/m, z0.d, z0.d
+lsrr z0.h, p0/m, z0.h, z0.h
+lsrr z0.s, p0/m, z0.s, z0.s
+mad z0.b, p7/m, z1.b, z31.b
+mad z0.d, p7/m, z1.d, z31.d
+mad z0.h, p7/m, z1.h, z31.h
+mad z0.s, p7/m, z1.s, z31.s
+mla z0.b, p7/m, z1.b, z31.b
+mla z0.d, p7/m, z1.d, z31.d
+mla z0.h, p7/m, z1.h, z31.h
+mla z0.s, p7/m, z1.s, z31.s
+mls z0.b, p7/m, z1.b, z31.b
+mls z0.d, p7/m, z1.d, z31.d
+mls z0.h, p7/m, z1.h, z31.h
+mls z0.s, p7/m, z1.s, z31.s
+mov p0.b, p0.b
+mov p0.b, p0/m, p0.b
+mov p0.b, p0/z, p0.b
+mov p15.b, p15.b
+mov p15.b, p15/m, p15.b
+mov p15.b, p15/z, p15.b
+mov z0.b, #127
+mov z0.b, b0
+mov z0.b, p0/m, b0
+mov z0.b, p0/m, w0
+mov z0.b, p0/z, #127
+mov z0.b, w0
+mov z0.d, #0
+mov z0.d, #0xe0000000000003ff
+mov z0.d, #0xffffffffffff7fff
+mov z0.d, #32768
+mov z0.d, d0
+mov z0.d, p0/m, d0
+mov z0.d, p0/m, x0
+mov z0.d, x0
+mov z0.d, z0.d
+mov z0.h, #-256
+mov z0.h, #-32768
+mov z0.h, #0
+mov z0.h, #32512
+mov z0.h, #32767
+mov z0.h, h0
+mov z0.h, p0/m, h0
+mov z0.h, p0/m, w0
+mov z0.h, p0/z, #32512
+mov z0.h, w0
+mov z0.q, q0
+mov z0.s, #0
+mov z0.s, #0xffff7fff
+mov z0.s, #32768
+mov z0.s, p0/m, s0
+mov z0.s, p0/m, w0
+mov z0.s, s0
+mov z0.s, w0
+mov z21.d, #-128
+mov z21.d, #-32768
+mov z21.d, #127
+mov z21.d, #32512
+mov z21.d, p0/z, #-128
+mov z21.d, p0/z, #-32768
+mov z21.d, p0/z, #127
+mov z21.d, p0/z, #32512
+mov z21.d, p15/m, #-128
+mov z21.d, p15/m, #-32768
+mov z21.h, #-128
+mov z21.h, #-32768
+mov z21.h, #127
+mov z21.h, #32512
+mov z21.h, p0/z, #-128
+mov z21.h, p0/z, #-32768
+mov z21.h, p0/z, #127
+mov z21.h, p0/z, #32512
+mov z21.h, p15/m, #-128
+mov z21.h, p15/m, #-32768
+mov z21.s, #-128
+mov z21.s, #-32768
+mov z21.s, #127
+mov z21.s, #32512
+mov z21.s, p0/z, #-128
+mov z21.s, p0/z, #-32768
+mov z21.s, p0/z, #127
+mov z21.s, p0/z, #32512
+mov z21.s, p15/m, #-128
+mov z21.s, p15/m, #-32768
+mov z31.b, p15/m, z31.b
+mov z31.b, p7/m, b31
+movprfx z31, z6
+mov z31.b, p7/m, wsp
+mov z31.b, wsp
+mov z31.b, z31.b[63]
+mov z31.d, p15/m, z31.d
+mov z31.d, p7/m, d31
+movprfx z31.d, p7/z, z6.d
+mov z31.d, p7/m, sp
+mov z31.d, sp
+mov z31.d, z0.d
+mov z31.d, z31.d[7]
+mov z31.h, p15/m, z31.h
+mov z31.h, p7/m, h31
+mov z31.h, p7/m, wsp
+mov z31.h, wsp
+mov z31.h, z31.h[31]
+mov z31.s, p15/m, z31.s
+mov z31.s, p7/m, s31
+mov z31.s, p7/m, wsp
+mov z31.s, wsp
+mov z31.s, z31.s[15]
+mov z5.b, #-1
+mov z5.b, #-128
+mov z5.b, #127
+mov z5.b, p0/z, #-1
+mov z5.b, p0/z, #-128
+mov z5.b, p0/z, #127
+mov z5.b, p15/m, #-128
+mov z5.d, #-6
+mov z5.h, #-6
+mov z5.q, z17.q[3]
+mov z5.s, #-6
+movs p0.b, p0.b
+movs p0.b, p0/z, p0.b
+movs p15.b, p15.b
+movs p15.b, p15/z, p15.b
+mrs x3, ID_AA64ZFR0_EL1
+mrs x3, ZCR_EL1
+mrs x3, ZCR_EL12
+mrs x3, ZCR_EL2
+mrs x3, ZCR_EL3
+msb z0.b, p7/m, z1.b, z31.b
+msb z0.d, p7/m, z1.d, z31.d
+msb z0.h, p7/m, z1.h, z31.h
+msb z0.s, p7/m, z1.s, z31.s
+msr ZCR_EL1, x3
+msr ZCR_EL12, x3
+msr ZCR_EL2, x3
+msr ZCR_EL3, x3
+mul z0.b, p7/m, z0.b, z31.b
+mul z0.d, p7/m, z0.d, z31.d
+mul z0.h, p7/m, z0.h, z31.h
+mul z0.s, p7/m, z0.s, z31.s
+mul z31.b, z31.b, #-128
+mul z31.b, z31.b, #127
+mul z31.d, z31.d, #-128
+mul z31.d, z31.d, #127
+mul z31.h, z31.h, #-128
+mul z31.h, z31.h, #127
+mul z31.s, z31.s, #-128
+mul z31.s, z31.s, #127
+nand p0.b, p0/z, p0.b, p0.b
+nand p15.b, p15/z, p15.b, p15.b
+nands p0.b, p0/z, p0.b, p0.b
+nands p15.b, p15/z, p15.b, p15.b
+neg z0.b, p0/m, z0.b
+neg z0.d, p0/m, z0.d
+neg z0.h, p0/m, z0.h
+neg z0.s, p0/m, z0.s
+neg z31.b, p7/m, z31.b
+neg z31.d, p7/m, z31.d
+neg z31.h, p7/m, z31.h
+neg z31.s, p7/m, z31.s
+nor p0.b, p0/z, p0.b, p0.b
+nor p15.b, p15/z, p15.b, p15.b
+nors p0.b, p0/z, p0.b, p0.b
+nors p15.b, p15/z, p15.b, p15.b
+not p0.b, p0/z, p0.b
+not p15.b, p15/z, p15.b
+not z31.b, p7/m, z31.b
+not z31.d, p7/m, z31.d
+not z31.h, p7/m, z31.h
+not z31.s, p7/m, z31.s
+nots p0.b, p0/z, p0.b
+nots p15.b, p15/z, p15.b
+orn p0.b, p0/z, p0.b, p0.b
+orn p15.b, p15/z, p15.b, p15.b
+orns p0.b, p0/z, p0.b, p0.b
+orns p15.b, p15/z, p15.b, p15.b
+orr p0.b, p0/z, p0.b, p1.b
+orr z0.d, z0.d, #0x6
+orr z0.d, z0.d, #0xfffffffffffffff9
+orr z0.s, z0.s, #0x6
+orr z0.s, z0.s, #0xfffffff9
+orr z23.d, z13.d, z8.d
+orr z23.h, z23.h, #0x6
+orr z23.h, z23.h, #0xfff9
+orr z31.b, p7/m, z31.b, z31.b
+orr z31.d, p7/m, z31.d, z31.d
+orr z31.h, p7/m, z31.h, z31.h
+orr z31.s, p7/m, z31.s, z31.s
+orr z5.b, z5.b, #0x6
+orr z5.b, z5.b, #0xf9
+orrs p0.b, p0/z, p0.b, p1.b
+orv b0, p7, z31.b
+orv d0, p7, z31.d
+orv h0, p7, z31.h
+orv s0, p7, z31.s
+pfalse p15.b
+pfirst p0.b, p15, p0.b
+pfirst p15.b, p15, p15.b
+pnext p0.b, p15, p0.b
+pnext p0.d, p15, p0.d
+pnext p0.h, p15, p0.h
+pnext p0.s, p15, p0.s
+pnext p15.b, p15, p15.b
+prfb #14, p0, [x0]
+prfb #15, p0, [x0]
+prfb #6, p0, [x0]
+prfb #7, p0, [x0]
+prfb #7, p3, [z13.s, #31]
+prfb #7, p3, [z13.s]
+prfb pldl1keep, p0, [x0, z0.d, uxtw]
+prfb pldl1keep, p0, [x0, z0.d]
+prfb pldl1keep, p0, [x0, z0.s, uxtw]
+prfb pldl1keep, p0, [x0]
+prfb pldl1strm, p0, [x0, #-32, mul vl]
+prfb pldl1strm, p0, [x0, #31, mul vl]
+prfb pldl1strm, p0, [x0]
+prfb pldl2keep, p0, [x0]
+prfb pldl2strm, p0, [x0]
+prfb pldl3keep, p0, [x0]
+prfb pldl3strm, p0, [x0]
+prfb pldl3strm, p5, [x10, z21.d, sxtw]
+prfb pldl3strm, p5, [x10, z21.s, uxtw]
+prfb pldl3strm, p5, [z10.d, #31]
+prfb pldl3strm, p5, [z10.d]
+prfb pstl1keep, p0, [x0]
+prfb pstl1strm, p0, [x0]
+prfb pstl2keep, p0, [x0]
+prfb pstl2strm, p0, [x0]
+prfb pstl3keep, p0, [x0]
+prfb pstl3strm, p0, [x0]
+prfd #14, p0, [x0]
+prfd #15, p0, [x0]
+prfd #15, p7, [z31.d, #248]
+prfd #15, p7, [z31.d]
+prfd #15, p7, [z31.s, #248]
+prfd #15, p7, [z31.s]
+prfd #6, p0, [x0]
+prfd #7, p0, [x0]
+prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
+prfd pldl1keep, p0, [x0, z0.d, uxtw #3]
+prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
+prfd pldl1keep, p0, [x0, z0.s, uxtw #3]
+prfd pldl1keep, p0, [x0]
+prfd pldl1strm, p0, [x0, #-32, mul vl]
+prfd pldl1strm, p0, [x0, #31, mul vl]
+prfd pldl1strm, p0, [x0]
+prfd pldl2keep, p0, [x0]
+prfd pldl2strm, p0, [x0]
+prfd pldl3keep, p0, [x0]
+prfd pldl3strm, p0, [x0]
+prfd pstl1keep, p0, [x0]
+prfd pstl1strm, p0, [x0]
+prfd pstl2keep, p0, [x0]
+prfd pstl2strm, p0, [x0]
+prfd pstl3keep, p0, [x0]
+prfd pstl3strm, p0, [x0]
+prfh #14, p0, [x0]
+prfh #15, p0, [x0]
+prfh #15, p7, [z31.d, #62]
+prfh #15, p7, [z31.d]
+prfh #15, p7, [z31.s, #62]
+prfh #15, p7, [z31.s]
+prfh #6, p0, [x0]
+prfh #7, p0, [x0]
+prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+prfh pldl1keep, p0, [x0]
+prfh pldl1strm, p0, [x0, #-32, mul vl]
+prfh pldl1strm, p0, [x0, #31, mul vl]
+prfh pldl1strm, p0, [x0]
+prfh pldl2keep, p0, [x0]
+prfh pldl2strm, p0, [x0]
+prfh pldl3keep, p0, [x0]
+prfh pldl3strm, p0, [x0]
+prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
+prfh pldl3strm, p5, [x10, z21.d, uxtw #1]
+prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
+prfh pldl3strm, p5, [x10, z21.s, uxtw #1]
+prfh pstl1keep, p0, [x0]
+prfh pstl1strm, p0, [x0]
+prfh pstl2keep, p0, [x0]
+prfh pstl2strm, p0, [x0]
+prfh pstl3keep, p0, [x0]
+prfh pstl3strm, p0, [x0]
+prfw #14, p0, [x0]
+prfw #15, p0, [x0]
+prfw #15, p7, [z31.d, #124]
+prfw #15, p7, [z31.d]
+prfw #15, p7, [z31.s, #124]
+prfw #15, p7, [z31.s]
+prfw #6, p0, [x0]
+prfw #7, p0, [x0]
+prfw #7, p3, [x13, z8.d, uxtw #2]
+prfw pldl1keep, p0, [x0, z0.d, sxtw #2]
+prfw pldl1keep, p0, [x0, z0.s, uxtw #2]
+prfw pldl1keep, p0, [x0]
+prfw pldl1strm, p0, [x0, #-32, mul vl]
+prfw pldl1strm, p0, [x0, #31, mul vl]
+prfw pldl1strm, p0, [x0]
+prfw pldl2keep, p0, [x0]
+prfw pldl2strm, p0, [x0]
+prfw pldl3keep, p0, [x0]
+prfw pldl3strm, p0, [x0]
+prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+prfw pldl3strm, p5, [x10, z21.s, sxtw #2]
+prfw pstl1keep, p0, [x0]
+prfw pstl1strm, p0, [x0]
+prfw pstl2keep, p0, [x0]
+prfw pstl2strm, p0, [x0]
+prfw pstl3keep, p0, [x0]
+prfw pstl3strm, p0, [x0]
+ptest p15, p0.b
+ptest p15, p15.b
+ptrue p0.b, pow2
+ptrue p0.d, pow2
+ptrue p0.h, pow2
+ptrue p0.s, pow2
+ptrue p15.b
+ptrue p15.d
+ptrue p15.h
+ptrue p15.s
+ptrue p7.s
+ptrue p7.s, #14
+ptrue p7.s, #15
+ptrue p7.s, #16
+ptrue p7.s, #17
+ptrue p7.s, #18
+ptrue p7.s, #19
+ptrue p7.s, #20
+ptrue p7.s, #21
+ptrue p7.s, #22
+ptrue p7.s, #23
+ptrue p7.s, #24
+ptrue p7.s, #25
+ptrue p7.s, #26
+ptrue p7.s, #27
+ptrue p7.s, #28
+ptrue p7.s, mul3
+ptrue p7.s, mul4
+ptrue p7.s, vl1
+ptrue p7.s, vl128
+ptrue p7.s, vl16
+ptrue p7.s, vl2
+ptrue p7.s, vl256
+ptrue p7.s, vl3
+ptrue p7.s, vl32
+ptrue p7.s, vl4
+ptrue p7.s, vl5
+ptrue p7.s, vl6
+ptrue p7.s, vl64
+ptrue p7.s, vl7
+ptrue p7.s, vl8
+ptrues p0.b, pow2
+ptrues p0.d, pow2
+ptrues p0.h, pow2
+ptrues p0.s, pow2
+ptrues p15.b
+ptrues p15.d
+ptrues p15.h
+ptrues p15.s
+ptrues p7.s
+ptrues p7.s, #14
+ptrues p7.s, #15
+ptrues p7.s, #16
+ptrues p7.s, #17
+ptrues p7.s, #18
+ptrues p7.s, #19
+ptrues p7.s, #20
+ptrues p7.s, #21
+ptrues p7.s, #22
+ptrues p7.s, #23
+ptrues p7.s, #24
+ptrues p7.s, #25
+ptrues p7.s, #26
+ptrues p7.s, #27
+ptrues p7.s, #28
+ptrues p7.s, mul3
+ptrues p7.s, mul4
+ptrues p7.s, vl1
+ptrues p7.s, vl128
+ptrues p7.s, vl16
+ptrues p7.s, vl2
+ptrues p7.s, vl256
+ptrues p7.s, vl3
+ptrues p7.s, vl32
+ptrues p7.s, vl4
+ptrues p7.s, vl5
+ptrues p7.s, vl6
+ptrues p7.s, vl64
+ptrues p7.s, vl7
+ptrues p7.s, vl8
+punpkhi p0.h, p0.b
+punpkhi p15.h, p15.b
+punpklo p0.h, p0.b
+punpklo p15.h, p15.b
+rbit z0.b, p7/m, z31.b
+rbit z0.d, p7/m, z31.d
+rbit z0.h, p7/m, z31.h
+rbit z0.s, p7/m, z31.s
+rdffr p0.b
+rdffr p0.b, p0/z
+rdffr p15.b
+rdffr p15.b, p15/z
+rdffrs p0.b, p0/z
+rdffrs p15.b, p15/z
+rdvl x0, #0
+rdvl x21, #-32
+rdvl x23, #31
+rdvl xzr, #-1
+rev z0.b, z31.b
+rev z0.d, z31.d
+rev z0.h, z31.h
+rev z0.s, z31.s
+revb z0.d, p7/m, z31.d
+revb z0.h, p7/m, z31.h
+revb z0.s, p7/m, z31.s
+revh z0.d, p7/m, z31.d
+revh z0.s, p7/m, z31.s
+revw z0.d, p7/m, z31.d
+sabd z31.b, p7/m, z31.b, z31.b
+sabd z31.d, p7/m, z31.d, z31.d
+sabd z31.h, p7/m, z31.h, z31.h
+sabd z31.s, p7/m, z31.s, z31.s
+saddv d0, p7, z31.b
+saddv d0, p7, z31.h
+saddv d0, p7, z31.s
+scvtf z0.d, p0/m, z0.d
+scvtf z0.d, p0/m, z0.s
+scvtf z0.h, p0/m, z0.d
+scvtf z0.h, p0/m, z0.h
+scvtf z0.h, p0/m, z0.s
+scvtf z0.s, p0/m, z0.d
+scvtf z0.s, p0/m, z0.s
+sdiv z0.d, p7/m, z0.d, z31.d
+sdiv z0.s, p7/m, z0.s, z31.s
+sdivr z0.d, p7/m, z0.d, z31.d
+sdivr z0.s, p7/m, z0.s, z31.s
+sdot z0.d, z1.h, z15.h[1]
+sdot z0.d, z1.h, z31.h
+sdot z0.s, z1.b, z31.b
+sdot z0.s, z1.b, z7.b[3]
+sel z23.b, p11, z13.b, z8.b
+sel z23.d, p11, z13.d, z8.d
+sel z23.h, p11, z13.h, z8.h
+sel z23.s, p11, z13.s, z8.s
+setffr
+smax z0.b, z0.b, #-128
+smax z0.d, z0.d, #-128
+smax z0.h, z0.h, #-128
+smax z0.s, z0.s, #-128
+smax z31.b, p7/m, z31.b, z31.b
+smax z31.b, z31.b, #127
+smax z31.d, p7/m, z31.d, z31.d
+smax z31.d, z31.d, #127
+smax z31.h, p7/m, z31.h, z31.h
+smax z31.h, z31.h, #127
+smax z31.s, p7/m, z31.s, z31.s
+smax z31.s, z31.s, #127
+smaxv b0, p7, z31.b
+smaxv d0, p7, z31.d
+smaxv h0, p7, z31.h
+smaxv s0, p7, z31.s
+smin z0.b, z0.b, #-128
+smin z0.d, z0.d, #-128
+smin z0.h, z0.h, #-128
+smin z0.s, z0.s, #-128
+smin z31.b, p7/m, z31.b, z31.b
+smin z31.b, z31.b, #127
+smin z31.d, p7/m, z31.d, z31.d
+smin z31.d, z31.d, #127
+smin z31.h, p7/m, z31.h, z31.h
+smin z31.h, z31.h, #127
+smin z31.s, p7/m, z31.s, z31.s
+smin z31.s, z31.s, #127
+sminv b0, p7, z31.b
+sminv d0, p7, z31.d
+sminv h0, p7, z31.h
+sminv s0, p7, z31.s
+smulh z0.b, p7/m, z0.b, z31.b
+smulh z0.d, p7/m, z0.d, z31.d
+smulh z0.h, p7/m, z0.h, z31.h
+smulh z0.s, p7/m, z0.s, z31.s
+splice z31.b, p7, z31.b, z31.b
+splice z31.d, p7, z31.d, z31.d
+splice z31.h, p7, z31.h, z31.h
+splice z31.s, p7, z31.s, z31.s
+sqadd z0.b, z0.b, #0
+sqadd z0.b, z0.b, z0.b
+sqadd z0.d, z0.d, #0
+sqadd z0.d, z0.d, #0, lsl #8
+sqadd z0.d, z0.d, z0.d
+sqadd z0.h, z0.h, #0
+sqadd z0.h, z0.h, #0, lsl #8
+sqadd z0.h, z0.h, z0.h
+sqadd z0.s, z0.s, #0
+sqadd z0.s, z0.s, #0, lsl #8
+sqadd z0.s, z0.s, z0.s
+sqadd z31.b, z31.b, #255
+sqadd z31.d, z31.d, #65280
+sqadd z31.h, z31.h, #65280
+sqadd z31.s, z31.s, #65280
+sqdecb x0
+sqdecb x0, #14
+sqdecb x0, all, mul #16
+sqdecb x0, pow2
+sqdecb x0, vl1
+sqdecb x0, w0
+sqdecb x0, w0, all, mul #16
+sqdecb x0, w0, pow2
+sqdecb x0, w0, pow2, mul #16
+sqdecd x0
+sqdecd x0, #14
+sqdecd x0, all, mul #16
+sqdecd x0, pow2
+sqdecd x0, vl1
+sqdecd x0, w0
+sqdecd x0, w0, all, mul #16
+sqdecd x0, w0, pow2
+sqdecd x0, w0, pow2, mul #16
+sqdecd z0.d
+sqdecd z0.d, all, mul #16
+sqdecd z0.d, pow2
+sqdecd z0.d, pow2, mul #16
+sqdech x0
+sqdech x0, #14
+sqdech x0, all, mul #16
+sqdech x0, pow2
+sqdech x0, vl1
+sqdech x0, w0
+sqdech x0, w0, all, mul #16
+sqdech x0, w0, pow2
+sqdech x0, w0, pow2, mul #16
+sqdech z0.h
+sqdech z0.h, all, mul #16
+sqdech z0.h, pow2
+sqdech z0.h, pow2, mul #16
+sqdecp x0, p0.b
+sqdecp x0, p0.d
+sqdecp x0, p0.h
+sqdecp x0, p0.s
+sqdecp xzr, p15.b, wzr
+sqdecp xzr, p15.d, wzr
+sqdecp xzr, p15.h, wzr
+sqdecp xzr, p15.s, wzr
+sqdecp z0.d, p0.d
+sqdecp z0.h, p0.h
+sqdecp z0.s, p0.s
+sqdecw x0
+sqdecw x0, #14
+sqdecw x0, all, mul #16
+sqdecw x0, pow2
+sqdecw x0, vl1
+sqdecw x0, w0
+sqdecw x0, w0, all, mul #16
+sqdecw x0, w0, pow2
+sqdecw x0, w0, pow2, mul #16
+sqdecw z0.s
+sqdecw z0.s, all, mul #16
+sqdecw z0.s, pow2
+sqdecw z0.s, pow2, mul #16
+sqincb x0
+sqincb x0, #14
+sqincb x0, all, mul #16
+sqincb x0, pow2
+sqincb x0, vl1
+sqincb x0, w0
+sqincb x0, w0, all, mul #16
+sqincb x0, w0, pow2
+sqincb x0, w0, pow2, mul #16
+sqincd x0
+sqincd x0, #14
+sqincd x0, all, mul #16
+sqincd x0, pow2
+sqincd x0, vl1
+sqincd x0, w0
+sqincd x0, w0, all, mul #16
+sqincd x0, w0, pow2
+sqincd x0, w0, pow2, mul #16
+sqincd z0.d
+sqincd z0.d, all, mul #16
+sqincd z0.d, pow2
+sqincd z0.d, pow2, mul #16
+sqinch x0
+sqinch x0, #14
+sqinch x0, all, mul #16
+sqinch x0, pow2
+sqinch x0, vl1
+sqinch x0, w0
+sqinch x0, w0, all, mul #16
+sqinch x0, w0, pow2
+sqinch x0, w0, pow2, mul #16
+sqinch z0.h
+sqinch z0.h, all, mul #16
+sqinch z0.h, pow2
+sqinch z0.h, pow2, mul #16
+sqincp x0, p0.b
+sqincp x0, p0.d
+sqincp x0, p0.h
+sqincp x0, p0.s
+sqincp xzr, p15.b, wzr
+sqincp xzr, p15.d, wzr
+sqincp xzr, p15.h, wzr
+sqincp xzr, p15.s, wzr
+sqincp z0.d, p0.d
+sqincp z0.h, p0.h
+sqincp z0.s, p0.s
+sqincw x0
+sqincw x0, #14
+sqincw x0, all, mul #16
+sqincw x0, pow2
+sqincw x0, vl1
+sqincw x0, w0
+sqincw x0, w0, all, mul #16
+sqincw x0, w0, pow2
+sqincw x0, w0, pow2, mul #16
+sqincw z0.s
+sqincw z0.s, all, mul #16
+sqincw z0.s, pow2
+sqincw z0.s, pow2, mul #16
+sqsub z0.b, z0.b, #0
+sqsub z0.b, z0.b, z0.b
+sqsub z0.d, z0.d, #0
+sqsub z0.d, z0.d, #0, lsl #8
+sqsub z0.d, z0.d, z0.d
+sqsub z0.h, z0.h, #0
+sqsub z0.h, z0.h, #0, lsl #8
+sqsub z0.h, z0.h, z0.h
+sqsub z0.s, z0.s, #0
+sqsub z0.s, z0.s, #0, lsl #8
+sqsub z0.s, z0.s, z0.s
+sqsub z31.b, z31.b, #255
+sqsub z31.d, z31.d, #65280
+sqsub z31.h, z31.h, #65280
+sqsub z31.s, z31.s, #65280
+st1b { z0.b }, p0, [x0, x0]
+st1b { z0.b }, p0, [x0]
+st1b { z0.d }, p0, [x0, x0]
+st1b { z0.d }, p0, [x0, z0.d, sxtw]
+st1b { z0.d }, p0, [x0, z0.d, uxtw]
+st1b { z0.d }, p0, [x0, z0.d]
+st1b { z0.d }, p0, [x0]
+st1b { z0.d }, p7, [z0.d]
+st1b { z0.h }, p0, [x0, x0]
+st1b { z0.h }, p0, [x0]
+st1b { z0.s }, p0, [x0, x0]
+st1b { z0.s }, p0, [x0, z0.s, sxtw]
+st1b { z0.s }, p0, [x0, z0.s, uxtw]
+st1b { z0.s }, p0, [x0]
+st1b { z0.s }, p7, [z0.s]
+st1b { z21.b }, p5, [x10, #5, mul vl]
+st1b { z21.d }, p5, [x10, #5, mul vl]
+st1b { z21.h }, p5, [x10, #5, mul vl]
+st1b { z21.s }, p5, [x10, #5, mul vl]
+st1b { z31.b }, p7, [sp, #-1, mul vl]
+st1b { z31.d }, p7, [sp, #-1, mul vl]
+st1b { z31.d }, p7, [z31.d, #31]
+st1b { z31.h }, p7, [sp, #-1, mul vl]
+st1b { z31.s }, p7, [sp, #-1, mul vl]
+st1b { z31.s }, p7, [z31.s, #31]
+st1d { z0.d }, p0, [x0, x0, lsl #3]
+st1d { z0.d }, p0, [x0, z0.d, lsl #3]
+st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
+st1d { z0.d }, p0, [x0, z0.d, sxtw]
+st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
+st1d { z0.d }, p0, [x0, z0.d, uxtw]
+st1d { z0.d }, p0, [x0, z0.d]
+st1d { z0.d }, p0, [x0]
+st1d { z0.d }, p7, [z0.d]
+st1d { z21.d }, p5, [x10, #5, mul vl]
+st1d { z31.d }, p7, [sp, #-1, mul vl]
+st1d { z31.d }, p7, [z31.d, #248]
+st1h { z0.d }, p0, [x0, x0, lsl #1]
+st1h { z0.d }, p0, [x0, z0.d, lsl #1]
+st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
+st1h { z0.d }, p0, [x0, z0.d, sxtw]
+st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
+st1h { z0.d }, p0, [x0, z0.d, uxtw]
+st1h { z0.d }, p0, [x0, z0.d]
+st1h { z0.d }, p0, [x0]
+st1h { z0.d }, p7, [z0.d]
+st1h { z0.h }, p0, [x0, x0, lsl #1]
+st1h { z0.h }, p0, [x0]
+st1h { z0.s }, p0, [x0, x0, lsl #1]
+st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
+st1h { z0.s }, p0, [x0, z0.s, sxtw]
+st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
+st1h { z0.s }, p0, [x0, z0.s, uxtw]
+st1h { z0.s }, p0, [x0]
+st1h { z0.s }, p7, [z0.s]
+st1h { z21.d }, p5, [x10, #5, mul vl]
+st1h { z21.h }, p5, [x10, #5, mul vl]
+st1h { z21.s }, p5, [x10, #5, mul vl]
+st1h { z31.d }, p7, [sp, #-1, mul vl]
+st1h { z31.d }, p7, [z31.d, #62]
+st1h { z31.h }, p7, [sp, #-1, mul vl]
+st1h { z31.s }, p7, [sp, #-1, mul vl]
+st1h { z31.s }, p7, [z31.s, #62]
+st1w { z0.d }, p0, [x0, x0, lsl #2]
+st1w { z0.d }, p0, [x0, z0.d, lsl #2]
+st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
+st1w { z0.d }, p0, [x0, z0.d, sxtw]
+st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
+st1w { z0.d }, p0, [x0, z0.d, uxtw]
+st1w { z0.d }, p0, [x0, z0.d]
+st1w { z0.d }, p0, [x0]
+st1w { z0.d }, p7, [z0.d]
+st1w { z0.s }, p0, [x0, x0, lsl #2]
+st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
+st1w { z0.s }, p0, [x0, z0.s, sxtw]
+st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
+st1w { z0.s }, p0, [x0, z0.s, uxtw]
+st1w { z0.s }, p0, [x0]
+st1w { z0.s }, p7, [z0.s]
+st1w { z21.d }, p5, [x10, #5, mul vl]
+st1w { z21.s }, p5, [x10, #5, mul vl]
+st1w { z31.d }, p7, [sp, #-1, mul vl]
+st1w { z31.d }, p7, [z31.d, #124]
+st1w { z31.s }, p7, [sp, #-1, mul vl]
+st1w { z31.s }, p7, [z31.s, #124]
+st2b { z0.b, z1.b }, p0, [x0, x0]
+st2b { z0.b, z1.b }, p0, [x0]
+st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+st2b { z23.b, z24.b }, p3, [x13, #-16, mul vl]
+st2b { z5.b, z6.b }, p3, [x17, x16]
+st2d { z0.d, z1.d }, p0, [x0, x0, lsl #3]
+st2d { z0.d, z1.d }, p0, [x0]
+st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+st2d { z23.d, z24.d }, p3, [x13, #-16, mul vl]
+st2d { z5.d, z6.d }, p3, [x17, x16, lsl #3]
+st2h { z0.h, z1.h }, p0, [x0, x0, lsl #1]
+st2h { z0.h, z1.h }, p0, [x0]
+st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+st2h { z23.h, z24.h }, p3, [x13, #-16, mul vl]
+st2h { z5.h, z6.h }, p3, [x17, x16, lsl #1]
+st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]
+st2w { z0.s, z1.s }, p0, [x0]
+st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]
+st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]
+st3b { z0.b, z1.b, z2.b }, p0, [x0, x0]
+st3b { z0.b, z1.b, z2.b }, p0, [x0]
+st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+st3b { z23.b, z24.b, z25.b }, p3, [x13, #-24, mul vl]
+st3b { z5.b, z6.b, z7.b }, p3, [x17, x16]
+st3d { z0.d, z1.d, z2.d }, p0, [x0, x0, lsl #3]
+st3d { z0.d, z1.d, z2.d }, p0, [x0]
+st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+st3d { z23.d, z24.d, z25.d }, p3, [x13, #-24, mul vl]
+st3d { z5.d, z6.d, z7.d }, p3, [x17, x16, lsl #3]
+st3h { z0.h, z1.h, z2.h }, p0, [x0, x0, lsl #1]
+st3h { z0.h, z1.h, z2.h }, p0, [x0]
+st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+st3h { z23.h, z24.h, z25.h }, p3, [x13, #-24, mul vl]
+st3h { z5.h, z6.h, z7.h }, p3, [x17, x16, lsl #1]
+st3w { z0.s, z1.s, z2.s }, p0, [x0, x0, lsl #2]
+st3w { z0.s, z1.s, z2.s }, p0, [x0]
+st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+st3w { z23.s, z24.s, z25.s }, p3, [x13, #-24, mul vl]
+st3w { z5.s, z6.s, z7.s }, p3, [x17, x16, lsl #2]
+st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x0, x0]
+st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x0]
+st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+st4b { z23.b, z24.b, z25.b, z26.b }, p3, [x13, #-32, mul vl]
+st4b { z5.b, z6.b, z7.b, z8.b }, p3, [x17, x16]
+st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x0, x0, lsl #3]
+st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x0]
+st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+st4d { z23.d, z24.d, z25.d, z26.d }, p3, [x13, #-32, mul vl]
+st4d { z5.d, z6.d, z7.d, z8.d }, p3, [x17, x16, lsl #3]
+st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x0, x0, lsl #1]
+st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x0]
+st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+st4h { z23.h, z24.h, z25.h, z26.h }, p3, [x13, #-32, mul vl]
+st4h { z5.h, z6.h, z7.h, z8.h }, p3, [x17, x16, lsl #1]
+st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x0, x0, lsl #2]
+st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x0]
+st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+st4w { z23.s, z24.s, z25.s, z26.s }, p3, [x13, #-32, mul vl]
+st4w { z5.s, z6.s, z7.s, z8.s }, p3, [x17, x16, lsl #2]
+stnt1b { z0.b }, p0, [x0, x0]
+stnt1b { z0.b }, p0, [x0]
+stnt1b { z21.b }, p5, [x10, #7, mul vl]
+stnt1b { z23.b }, p3, [x13, #-8, mul vl]
+stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+stnt1d { z0.d }, p0, [x0]
+stnt1d { z21.d }, p5, [x10, #7, mul vl]
+stnt1d { z23.d }, p3, [x13, #-8, mul vl]
+stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+stnt1h { z0.h }, p0, [x0]
+stnt1h { z21.h }, p5, [x10, #7, mul vl]
+stnt1h { z23.h }, p3, [x13, #-8, mul vl]
+stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+stnt1w { z0.s }, p0, [x0]
+stnt1w { z21.s }, p5, [x10, #7, mul vl]
+stnt1w { z23.s }, p3, [x13, #-8, mul vl]
+str p0, [x0]
+str p15, [sp, #-256, mul vl]
+str p5, [x10, #255, mul vl]
+str z0, [x0]
+str z21, [x10, #-256, mul vl]
+str z31, [sp, #255, mul vl]
+sub z0.b, p0/m, z0.b, z0.b
+sub z0.b, z0.b, #0
+sub z0.b, z0.b, z0.b
+sub z0.d, p0/m, z0.d, z0.d
+sub z0.d, z0.d, #0
+sub z0.d, z0.d, #0, lsl #8
+sub z0.d, z0.d, z0.d
+sub z0.h, p0/m, z0.h, z0.h
+sub z0.h, z0.h, #0
+sub z0.h, z0.h, #0, lsl #8
+sub z0.h, z0.h, z0.h
+sub z0.s, p0/m, z0.s, z0.s
+sub z0.s, z0.s, #0
+sub z0.s, z0.s, #0, lsl #8
+sub z0.s, z0.s, z0.s
+sub z21.b, p5/m, z21.b, z10.b
+sub z21.b, z10.b, z21.b
+sub z21.d, p5/m, z21.d, z10.d
+sub z21.d, z10.d, z21.d
+sub z21.h, p5/m, z21.h, z10.h
+sub z21.h, z10.h, z21.h
+sub z21.s, p5/m, z21.s, z10.s
+sub z21.s, z10.s, z21.s
+sub z23.b, p3/m, z23.b, z13.b
+sub z23.b, z13.b, z8.b
+sub z23.d, p3/m, z23.d, z13.d
+sub z23.d, z13.d, z8.d
+sub z23.h, p3/m, z23.h, z13.h
+sub z23.h, z13.h, z8.h
+sub z23.s, p3/m, z23.s, z13.s
+sub z23.s, z13.s, z8.s
+sub z31.b, p7/m, z31.b, z31.b
+sub z31.b, z31.b, #255
+sub z31.b, z31.b, z31.b
+sub z31.d, p7/m, z31.d, z31.d
+sub z31.d, z31.d, #65280
+sub z31.d, z31.d, z31.d
+sub z31.h, p7/m, z31.h, z31.h
+sub z31.h, z31.h, #65280
+sub z31.h, z31.h, z31.h
+sub z31.s, p7/m, z31.s, z31.s
+sub z31.s, z31.s, #65280
+sub z31.s, z31.s, z31.s
+subr z0.b, p0/m, z0.b, z0.b
+subr z0.b, z0.b, #0
+subr z0.d, p0/m, z0.d, z0.d
+subr z0.d, z0.d, #0
+subr z0.d, z0.d, #0, lsl #8
+subr z0.h, p0/m, z0.h, z0.h
+subr z0.h, z0.h, #0
+subr z0.h, z0.h, #0, lsl #8
+subr z0.s, p0/m, z0.s, z0.s
+subr z0.s, z0.s, #0
+subr z0.s, z0.s, #0, lsl #8
+subr z31.b, z31.b, #255
+subr z31.d, z31.d, #65280
+subr z31.h, z31.h, #65280
+subr z31.s, z31.s, #65280
+sunpkhi z31.d, z31.s
+sunpkhi z31.h, z31.b
+sunpkhi z31.s, z31.h
+sunpklo z31.d, z31.s
+sunpklo z31.h, z31.b
+sunpklo z31.s, z31.h
+sxtb z0.d, p0/m, z0.d
+sxtb z0.h, p0/m, z0.h
+sxtb z0.s, p0/m, z0.s
+sxtb z31.d, p7/m, z31.d
+sxtb z31.h, p7/m, z31.h
+sxtb z31.s, p7/m, z31.s
+sxth z0.d, p0/m, z0.d
+sxth z0.s, p0/m, z0.s
+sxth z31.d, p7/m, z31.d
+sxth z31.s, p7/m, z31.s
+sxtw z0.d, p0/m, z0.d
+sxtw z31.d, p7/m, z31.d
+tbl z31.b, { z31.b }, z31.b
+tbl z31.d, { z31.d }, z31.d
+tbl z31.h, { z31.h }, z31.h
+tbl z31.s, { z31.s }, z31.s
+trn1 p15.b, p15.b, p15.b
+trn1 p15.d, p15.d, p15.d
+trn1 p15.h, p15.h, p15.h
+trn1 p15.s, p15.s, p15.s
+trn1 z31.b, z31.b, z31.b
+trn1 z31.d, z31.d, z31.d
+trn1 z31.h, z31.h, z31.h
+trn1 z31.s, z31.s, z31.s
+trn2 p15.b, p15.b, p15.b
+trn2 p15.d, p15.d, p15.d
+trn2 p15.h, p15.h, p15.h
+trn2 p15.s, p15.s, p15.s
+trn2 z31.b, z31.b, z31.b
+trn2 z31.d, z31.d, z31.d
+trn2 z31.h, z31.h, z31.h
+trn2 z31.s, z31.s, z31.s
+uabd z31.b, p7/m, z31.b, z31.b
+uabd z31.d, p7/m, z31.d, z31.d
+uabd z31.h, p7/m, z31.h, z31.h
+uabd z31.s, p7/m, z31.s, z31.s
+uaddv d0, p7, z31.b
+uaddv d0, p7, z31.d
+uaddv d0, p7, z31.h
+uaddv d0, p7, z31.s
+ucvtf z0.d, p0/m, z0.d
+ucvtf z0.d, p0/m, z0.s
+ucvtf z0.h, p0/m, z0.d
+ucvtf z0.h, p0/m, z0.h
+ucvtf z0.h, p0/m, z0.s
+ucvtf z0.s, p0/m, z0.d
+ucvtf z0.s, p0/m, z0.s
+udiv z0.d, p7/m, z0.d, z31.d
+udiv z0.s, p7/m, z0.s, z31.s
+udivr z0.d, p7/m, z0.d, z31.d
+udivr z0.s, p7/m, z0.s, z31.s
+udot z0.d, z1.h, z15.h[1]
+udot z0.d, z1.h, z31.h
+udot z0.s, z1.b, z31.b
+udot z0.s, z1.b, z7.b[3]
+umax z0.b, z0.b, #0
+umax z31.b, p7/m, z31.b, z31.b
+umax z31.b, z31.b, #255
+umax z31.d, p7/m, z31.d, z31.d
+umax z31.h, p7/m, z31.h, z31.h
+umax z31.s, p7/m, z31.s, z31.s
+umaxv b0, p7, z31.b
+umaxv d0, p7, z31.d
+umaxv h0, p7, z31.h
+umaxv s0, p7, z31.s
+umin z0.b, z0.b, #0
+umin z31.b, p7/m, z31.b, z31.b
+umin z31.b, z31.b, #255
+umin z31.d, p7/m, z31.d, z31.d
+umin z31.h, p7/m, z31.h, z31.h
+umin z31.s, p7/m, z31.s, z31.s
+uminv b0, p7, z31.b
+uminv d0, p7, z31.d
+uminv h0, p7, z31.h
+uminv s0, p7, z31.s
+umulh z0.b, p7/m, z0.b, z31.b
+umulh z0.d, p7/m, z0.d, z31.d
+umulh z0.h, p7/m, z0.h, z31.h
+umulh z0.s, p7/m, z0.s, z31.s
+uqadd z0.b, z0.b, #0
+uqadd z0.b, z0.b, z0.b
+uqadd z0.d, z0.d, #0
+uqadd z0.d, z0.d, #0, lsl #8
+uqadd z0.d, z0.d, z0.d
+uqadd z0.h, z0.h, #0
+uqadd z0.h, z0.h, #0, lsl #8
+uqadd z0.h, z0.h, z0.h
+uqadd z0.s, z0.s, #0
+uqadd z0.s, z0.s, #0, lsl #8
+uqadd z0.s, z0.s, z0.s
+uqadd z31.b, z31.b, #255
+uqadd z31.d, z31.d, #65280
+uqadd z31.h, z31.h, #65280
+uqadd z31.s, z31.s, #65280
+uqdecb w0
+uqdecb w0, all, mul #16
+uqdecb w0, pow2
+uqdecb w0, pow2, mul #16
+uqdecb x0
+uqdecb x0, #14
+uqdecb x0, all, mul #16
+uqdecb x0, pow2
+uqdecb x0, vl1
+uqdecd w0
+uqdecd w0, all, mul #16
+uqdecd w0, pow2
+uqdecd w0, pow2, mul #16
+uqdecd x0
+uqdecd x0, #14
+uqdecd x0, all, mul #16
+uqdecd x0, pow2
+uqdecd x0, vl1
+uqdecd z0.d
+uqdecd z0.d, all, mul #16
+uqdecd z0.d, pow2
+uqdecd z0.d, pow2, mul #16
+uqdech w0
+uqdech w0, all, mul #16
+uqdech w0, pow2
+uqdech w0, pow2, mul #16
+uqdech x0
+uqdech x0, #14
+uqdech x0, all, mul #16
+uqdech x0, pow2
+uqdech x0, vl1
+uqdech z0.h
+uqdech z0.h, all, mul #16
+uqdech z0.h, pow2
+uqdech z0.h, pow2, mul #16
+uqdecp wzr, p15.b
+uqdecp wzr, p15.d
+uqdecp wzr, p15.h
+uqdecp wzr, p15.s
+uqdecp x0, p0.b
+uqdecp x0, p0.d
+uqdecp x0, p0.h
+uqdecp x0, p0.s
+uqdecp z0.d, p0.d
+uqdecp z0.h, p0.h
+uqdecp z0.s, p0.s
+uqdecw w0
+uqdecw w0, all, mul #16
+uqdecw w0, pow2
+uqdecw w0, pow2, mul #16
+uqdecw x0
+uqdecw x0, #14
+uqdecw x0, all, mul #16
+uqdecw x0, pow2
+uqdecw x0, vl1
+uqdecw z0.s
+uqdecw z0.s, all, mul #16
+uqdecw z0.s, pow2
+uqdecw z0.s, pow2, mul #16
+uqincb w0
+uqincb w0, all, mul #16
+uqincb w0, pow2
+uqincb w0, pow2, mul #16
+uqincb x0
+uqincb x0, #14
+uqincb x0, all, mul #16
+uqincb x0, pow2
+uqincb x0, vl1
+uqincd w0
+uqincd w0, all, mul #16
+uqincd w0, pow2
+uqincd w0, pow2, mul #16
+uqincd x0
+uqincd x0, #14
+uqincd x0, all, mul #16
+uqincd x0, pow2
+uqincd x0, vl1
+uqincd z0.d
+uqincd z0.d, all, mul #16
+uqincd z0.d, pow2
+uqincd z0.d, pow2, mul #16
+uqinch w0
+uqinch w0, all, mul #16
+uqinch w0, pow2
+uqinch w0, pow2, mul #16
+uqinch x0
+uqinch x0, #14
+uqinch x0, all, mul #16
+uqinch x0, pow2
+uqinch x0, vl1
+uqinch z0.h
+uqinch z0.h, all, mul #16
+uqinch z0.h, pow2
+uqinch z0.h, pow2, mul #16
+uqincp wzr, p15.b
+uqincp wzr, p15.d
+uqincp wzr, p15.h
+uqincp wzr, p15.s
+uqincp x0, p0.b
+uqincp x0, p0.d
+uqincp x0, p0.h
+uqincp x0, p0.s
+uqincp z0.d, p0.d
+uqincp z0.h, p0.h
+uqincp z0.s, p0.s
+uqincw w0
+uqincw w0, all, mul #16
+uqincw w0, pow2
+uqincw w0, pow2, mul #16
+uqincw x0
+uqincw x0, #14
+uqincw x0, all, mul #16
+uqincw x0, pow2
+uqincw x0, vl1
+uqincw z0.s
+uqincw z0.s, all, mul #16
+uqincw z0.s, pow2
+uqincw z0.s, pow2, mul #16
+uqsub z0.b, z0.b, #0
+uqsub z0.b, z0.b, z0.b
+uqsub z0.d, z0.d, #0
+uqsub z0.d, z0.d, #0, lsl #8
+uqsub z0.d, z0.d, z0.d
+uqsub z0.h, z0.h, #0
+uqsub z0.h, z0.h, #0, lsl #8
+uqsub z0.h, z0.h, z0.h
+uqsub z0.s, z0.s, #0
+uqsub z0.s, z0.s, #0, lsl #8
+uqsub z0.s, z0.s, z0.s
+uqsub z31.b, z31.b, #255
+uqsub z31.d, z31.d, #65280
+uqsub z31.h, z31.h, #65280
+uqsub z31.s, z31.s, #65280
+uunpkhi z31.d, z31.s
+uunpkhi z31.h, z31.b
+uunpkhi z31.s, z31.h
+uunpklo z31.d, z31.s
+uunpklo z31.h, z31.b
+uunpklo z31.s, z31.h
+uxtb z0.d, p0/m, z0.d
+uxtb z0.h, p0/m, z0.h
+uxtb z0.s, p0/m, z0.s
+uxtb z31.d, p7/m, z31.d
+uxtb z31.h, p7/m, z31.h
+uxtb z31.s, p7/m, z31.s
+uxth z0.d, p0/m, z0.d
+uxth z0.s, p0/m, z0.s
+uxth z31.d, p7/m, z31.d
+uxth z31.s, p7/m, z31.s
+uxtw z0.d, p0/m, z0.d
+uxtw z31.d, p7/m, z31.d
+uzp1 p15.b, p15.b, p15.b
+uzp1 p15.d, p15.d, p15.d
+uzp1 p15.h, p15.h, p15.h
+uzp1 p15.s, p15.s, p15.s
+uzp1 z31.b, z31.b, z31.b
+uzp1 z31.d, z31.d, z31.d
+uzp1 z31.h, z31.h, z31.h
+uzp1 z31.s, z31.s, z31.s
+uzp2 p15.b, p15.b, p15.b
+uzp2 p15.d, p15.d, p15.d
+uzp2 p15.h, p15.h, p15.h
+uzp2 p15.s, p15.s, p15.s
+uzp2 z31.b, z31.b, z31.b
+uzp2 z31.d, z31.d, z31.d
+uzp2 z31.h, z31.h, z31.h
+uzp2 z31.s, z31.s, z31.s
+wrffr p0.b
+wrffr p15.b
+zip1 p0.b, p0.b, p0.b
+zip1 p0.d, p0.d, p0.d
+zip1 p0.h, p0.h, p0.h
+zip1 p0.s, p0.s, p0.s
+zip1 p15.b, p15.b, p15.b
+zip1 p15.d, p15.d, p15.d
+zip1 p15.h, p15.h, p15.h
+zip1 p15.s, p15.s, p15.s
+zip1 z0.b, z0.b, z0.b
+zip1 z0.d, z0.d, z0.d
+zip1 z0.h, z0.h, z0.h
+zip1 z0.s, z0.s, z0.s
+zip1 z31.b, z31.b, z31.b
+zip1 z31.d, z31.d, z31.d
+zip1 z31.h, z31.h, z31.h
+zip1 z31.s, z31.s, z31.s
+zip2 p0.b, p0.b, p0.b
+zip2 p0.d, p0.d, p0.d
+zip2 p0.h, p0.h, p0.h
+zip2 p0.s, p0.s, p0.s
+zip2 p15.b, p15.b, p15.b
+zip2 p15.d, p15.d, p15.d
+zip2 p15.h, p15.h, p15.h
+zip2 p15.s, p15.s, p15.s
+zip2 z0.b, z0.b, z0.b
+zip2 z0.d, z0.d, z0.d
+zip2 z0.h, z0.h, z0.h
+zip2 z0.s, z0.s, z0.s
+zip2 z31.b, z31.b, z31.b
+zip2 z31.d, z31.d, z31.d
+zip2 z31.h, z31.h, z31.h
+zip2 z31.s, z31.s, z31.s
+
+# CHECK: Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
+# CHECK-NEXT: 1 4 0.50 abs z0.b, p0/m, z0.b
+# CHECK-NEXT: 1 4 0.50 abs z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 abs z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 4 0.50 abs z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 4 0.50 abs z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 0.50 abs z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 abs z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 abs z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 add z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 add z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 add z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 add z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 add z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 add z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 add z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 add z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 add z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 add z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 add z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 add z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 add z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 add z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 add z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 add z0.s, z1.s, z2.s
+# CHECK-NEXT: 1 4 0.50 add z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: 1 4 0.50 add z21.b, z10.b, z21.b
+# CHECK-NEXT: 1 4 0.50 add z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: 1 4 0.50 add z21.d, z10.d, z21.d
+# CHECK-NEXT: 1 4 0.50 add z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: 1 4 0.50 add z21.h, z10.h, z21.h
+# CHECK-NEXT: 1 4 0.50 add z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: 1 4 0.50 add z21.s, z10.s, z21.s
+# CHECK-NEXT: 1 4 0.50 add z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: 1 4 0.50 add z23.b, z13.b, z8.b
+# CHECK-NEXT: 1 4 0.50 add z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: 1 4 0.50 add z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 4 0.50 add z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: 1 4 0.50 add z23.h, z13.h, z8.h
+# CHECK-NEXT: 1 4 0.50 add z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: 1 4 0.50 add z23.s, z13.s, z8.s
+# CHECK-NEXT: 1 4 0.50 add z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 add z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 add z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 add z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 add z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 0.50 add z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 add z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 add z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 0.50 add z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 add z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 0.50 add z31.s, z31.s, #65280
+# CHECK-NEXT: 1 4 0.50 add z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 1 0.50 U addpl sp, sp, #31
+# CHECK-NEXT: 1 1 0.50 U addpl x0, x0, #-32
+# CHECK-NEXT: 1 1 0.50 U addpl x21, x21, #0
+# CHECK-NEXT: 1 1 0.50 U addpl x23, x8, #-1
+# CHECK-NEXT: 1 1 0.50 addvl sp, sp, #31
+# CHECK-NEXT: 1 1 0.50 addvl x0, x0, #-32
+# CHECK-NEXT: 1 1 0.50 addvl x21, x21, #0
+# CHECK-NEXT: 1 1 0.50 addvl x23, x8, #-1
+# CHECK-NEXT: 2 5 2.00 adr z0.d, [z0.d, z0.d, lsl #1]
+# CHECK-NEXT: 2 5 2.00 adr z0.d, [z0.d, z0.d, lsl #2]
+# CHECK-NEXT: 2 5 2.00 adr z0.d, [z0.d, z0.d, lsl #3]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, sxtw #1]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, sxtw #2]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, sxtw #3]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, sxtw]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, uxtw #1]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, uxtw #2]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, uxtw #3]
+# CHECK-NEXT: 1 4 0.50 adr z0.d, [z0.d, z0.d, uxtw]
+# CHECK-NEXT: 2 5 2.00 adr z0.d, [z0.d, z0.d]
+# CHECK-NEXT: 2 5 2.00 adr z0.s, [z0.s, z0.s, lsl #1]
+# CHECK-NEXT: 2 5 2.00 adr z0.s, [z0.s, z0.s, lsl #2]
+# CHECK-NEXT: 2 5 2.00 adr z0.s, [z0.s, z0.s, lsl #3]
+# CHECK-NEXT: 2 5 2.00 adr z0.s, [z0.s, z0.s]
+# CHECK-NEXT: 1 3 1.00 and p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 4 1.00 and z0.d, z0.d, #0x6
+# CHECK-NEXT: 1 4 1.00 and z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 4 0.50 and z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 and z0.s, z0.s, #0x6
+# CHECK-NEXT: 1 4 1.00 and z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: 1 4 0.50 and z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 4 1.00 and z23.h, z23.h, #0x6
+# CHECK-NEXT: 1 4 1.00 and z23.h, z23.h, #0xfff9
+# CHECK-NEXT: 1 4 0.50 and z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 and z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 and z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 and z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 1.00 and z5.b, z5.b, #0x6
+# CHECK-NEXT: 1 4 1.00 and z5.b, z5.b, #0xf9
+# CHECK-NEXT: 1 3 1.00 U ands p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 10 46 5.00 andv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 andv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 andv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 andv s0, p7, z31.s
+# CHECK-NEXT: 1 4 0.50 asr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 asr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: 1 4 0.50 asr z0.b, z0.b, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.b, z1.b, z2.d
+# CHECK-NEXT: 1 4 0.50 asr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 asr z0.d, z0.d, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 asr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: 1 4 0.50 asr z0.h, z0.h, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.h, z1.h, z2.d
+# CHECK-NEXT: 1 4 0.50 asr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 asr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: 1 4 0.50 asr z0.s, z0.s, #1
+# CHECK-NEXT: 1 4 0.50 asr z0.s, z1.s, z2.d
+# CHECK-NEXT: 1 4 0.50 asr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 4 0.50 asr z31.b, z31.b, #8
+# CHECK-NEXT: 1 4 0.50 asr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 4 0.50 asr z31.d, z31.d, #64
+# CHECK-NEXT: 1 4 0.50 asr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 4 0.50 asr z31.h, z31.h, #16
+# CHECK-NEXT: 1 4 0.50 asr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 4 0.50 asr z31.s, z31.s, #32
+# CHECK-NEXT: 2 8 1.00 asrd z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 2 8 1.00 asrd z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 2 8 1.00 asrd z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 2 8 1.00 asrd z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 2 8 1.00 asrd z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 2 8 1.00 asrd z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 2 8 1.00 asrd z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 2 8 1.00 asrd z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 4 0.50 U asrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 U asrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 U asrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U asrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 3 1.00 bic p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 bic p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 4 0.50 bic z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 bic z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 4 0.50 bic z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 bic z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 bic z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 bic z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 3 1.00 U bics p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 U bics p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 brka p0.b, p15/m, p15.b
+# CHECK-NEXT: 1 3 1.00 brka p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 3 1.00 U brkas p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 3 1.00 brkb p0.b, p15/m, p15.b
+# CHECK-NEXT: 1 3 1.00 brkb p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 3 1.00 U brkbs p0.b, p15/z, p15.b
+# CHECK-NEXT: 1 3 1.00 brkn p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: 1 3 1.00 brkn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U brkns p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: 1 3 1.00 U brkns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 brkpa p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 1 3 1.00 brkpa p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U brkpas p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 1 3 1.00 U brkpas p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 brkpb p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 1 3 1.00 brkpb p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U brkpbs p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: 1 3 1.00 U brkpbs p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 6 1.00 U clasta b0, p7, b0, z31.b
+# CHECK-NEXT: 1 6 1.00 clasta d0, p7, d0, z31.d
+# CHECK-NEXT: 1 6 1.00 clasta h0, p7, h0, z31.h
+# CHECK-NEXT: 1 6 1.00 clasta s0, p7, s0, z31.s
+# CHECK-NEXT: 1 29 1.00 clasta w0, p7, w0, z31.b
+# CHECK-NEXT: 1 29 1.00 clasta w0, p7, w0, z31.h
+# CHECK-NEXT: 1 29 1.00 clasta w0, p7, w0, z31.s
+# CHECK-NEXT: 1 29 1.00 clasta x0, p7, x0, z31.d
+# CHECK-NEXT: 1 6 1.00 clasta z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: 1 6 1.00 clasta z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: 1 6 1.00 clasta z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: 1 6 1.00 clasta z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: 1 6 1.00 U clastb b0, p7, b0, z31.b
+# CHECK-NEXT: 1 6 1.00 clastb d0, p7, d0, z31.d
+# CHECK-NEXT: 1 6 1.00 clastb h0, p7, h0, z31.h
+# CHECK-NEXT: 1 6 1.00 clastb s0, p7, s0, z31.s
+# CHECK-NEXT: 1 29 1.00 clastb w0, p7, w0, z31.b
+# CHECK-NEXT: 1 29 1.00 clastb w0, p7, w0, z31.h
+# CHECK-NEXT: 1 29 1.00 clastb w0, p7, w0, z31.s
+# CHECK-NEXT: 1 29 1.00 clastb x0, p7, x0, z31.d
+# CHECK-NEXT: 1 6 1.00 clastb z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: 1 6 1.00 clastb z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: 1 6 1.00 clastb z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: 1 6 1.00 clastb z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: 1 4 1.00 cls z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 1.00 cls z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 1.00 cls z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 1.00 cls z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 1.00 clz z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 1.00 clz z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 1.00 clz z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 1.00 clz z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpeq p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmpge p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 4 1.00 cmpge p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 4 1.00 cmpge p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmpge p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpge p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmpge p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 4 1.00 cmpge p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 4 1.00 cmpge p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpge p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 4 1.00 cmpge p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 4 1.00 cmpge p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpge p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmpge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmpge p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 4 1.00 cmpge p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 4 1.00 cmpge p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpge p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmpge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmpgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmphi p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 4 1.00 cmphi p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 4 1.00 cmphi p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmphi p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphi p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmphi p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 4 1.00 cmphi p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 4 1.00 cmphi p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphi p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphi p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 4 1.00 cmphi p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 4 1.00 cmphi p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphi p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmphi p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmphi p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 4 1.00 cmphi p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 4 1.00 cmphi p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphi p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmphi p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmphs p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 4 1.00 cmphs p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 4 1.00 cmphs p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmphs p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphs p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmphs p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 4 1.00 cmphs p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 4 1.00 cmphs p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphs p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphs p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 4 1.00 cmphs p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 4 1.00 cmphs p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphs p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmphs p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmphs p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 4 1.00 cmphs p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 4 1.00 cmphs p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmphs p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmphs p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 1.00 cmple p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 4 1.00 cmple p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 4 1.00 cmple p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmple p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 4 1.00 cmple p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 4 1.00 cmple p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 4 1.00 cmple p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 4 1.00 cmple p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmple p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 4 1.00 cmple p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 4 1.00 cmple p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmplo p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 4 1.00 cmplo p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 4 1.00 cmplo p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmplo p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 4 1.00 cmplo p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 4 1.00 cmplo p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 4 1.00 cmplo p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 4 1.00 cmplo p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmplo p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 4 1.00 cmplo p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 4 1.00 cmplo p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpls p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: 1 4 1.00 cmpls p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: 1 4 1.00 cmpls p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpls p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: 1 4 1.00 cmpls p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: 1 4 1.00 cmpls p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: 1 4 1.00 cmpls p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: 1 4 1.00 cmpls p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpls p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: 1 4 1.00 cmpls p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: 1 4 1.00 cmpls p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmplt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 4 1.00 cmplt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 4 1.00 cmplt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmplt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 4 1.00 cmplt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 4 1.00 cmplt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 4 1.00 cmplt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 4 1.00 cmplt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmplt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 4 1.00 cmplt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 4 1.00 cmplt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpne p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: 1 4 1.00 cmpne p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: 1 4 1.00 cmpne p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 cmpne p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpne p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: 1 4 1.00 cmpne p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: 1 4 1.00 cmpne p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpne p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: 1 4 1.00 cmpne p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: 1 4 1.00 cmpne p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpne p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 cmpne p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: 1 4 1.00 cmpne p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: 1 4 1.00 cmpne p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: 1 4 1.00 cmpne p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 cnot z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 0.50 cnot z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 cnot z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 cnot z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 1.00 cnt z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 1.00 cnt z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 1.00 cnt z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 1.00 cnt z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 1 0.50 cntb x0
+# CHECK-NEXT: 1 1 0.50 cntb x0, #28
+# CHECK-NEXT: 1 1 0.50 cntb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 cntb x0, pow2
+# CHECK-NEXT: 1 1 0.50 cntd x0
+# CHECK-NEXT: 1 1 0.50 cntd x0, #28
+# CHECK-NEXT: 1 1 0.50 cntd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 cntd x0, pow2
+# CHECK-NEXT: 1 1 0.50 cnth x0
+# CHECK-NEXT: 1 1 0.50 cnth x0, #28
+# CHECK-NEXT: 1 1 0.50 cnth x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 cnth x0, pow2
+# CHECK-NEXT: 1 6 1.00 cntp x0, p15, p0.b
+# CHECK-NEXT: 1 6 1.00 cntp x0, p15, p0.d
+# CHECK-NEXT: 1 6 1.00 cntp x0, p15, p0.h
+# CHECK-NEXT: 1 6 1.00 cntp x0, p15, p0.s
+# CHECK-NEXT: 1 1 0.50 cntw x0
+# CHECK-NEXT: 1 1 0.50 cntw x0, #28
+# CHECK-NEXT: 1 1 0.50 cntw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 cntw x0, pow2
+# CHECK-NEXT: 1 6 1.00 compact z31.d, p7, z31.d
+# CHECK-NEXT: 1 6 1.00 compact z31.s, p7, z31.s
+# CHECK-NEXT: 1 2 1.00 U ctermeq w30, wzr
+# CHECK-NEXT: 1 2 1.00 U ctermeq wzr, w30
+# CHECK-NEXT: 1 2 1.00 U ctermeq x30, xzr
+# CHECK-NEXT: 1 2 1.00 U ctermeq xzr, x30
+# CHECK-NEXT: 1 2 1.00 U ctermne w30, wzr
+# CHECK-NEXT: 1 2 1.00 U ctermne wzr, w30
+# CHECK-NEXT: 1 2 1.00 U ctermne x30, xzr
+# CHECK-NEXT: 1 2 1.00 U ctermne xzr, x30
+# CHECK-NEXT: 1 1 0.50 decb x0
+# CHECK-NEXT: 1 1 0.50 decb x0, #14
+# CHECK-NEXT: 1 1 0.50 decb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 decb x0, pow2
+# CHECK-NEXT: 1 1 0.50 decb x0, vl1
+# CHECK-NEXT: 1 1 0.50 decd x0
+# CHECK-NEXT: 1 1 0.50 decd x0, #14
+# CHECK-NEXT: 1 1 0.50 decd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 decd x0, pow2
+# CHECK-NEXT: 1 1 0.50 decd x0, vl1
+# CHECK-NEXT: 1 1 0.50 dech x0
+# CHECK-NEXT: 1 1 0.50 dech x0, #14
+# CHECK-NEXT: 1 1 0.50 dech x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 dech x0, pow2
+# CHECK-NEXT: 1 1 0.50 dech x0, vl1
+# CHECK-NEXT: 2 7 1.00 decp x0, p0.b
+# CHECK-NEXT: 2 7 1.00 decp x0, p0.d
+# CHECK-NEXT: 2 7 1.00 decp x0, p0.h
+# CHECK-NEXT: 2 7 1.00 decp x0, p0.s
+# CHECK-NEXT: 2 7 1.00 decp xzr, p15.b
+# CHECK-NEXT: 2 7 1.00 decp xzr, p15.d
+# CHECK-NEXT: 2 7 1.00 decp xzr, p15.h
+# CHECK-NEXT: 2 7 1.00 decp xzr, p15.s
+# CHECK-NEXT: 1 12 1.00 U decp z31.d, p15.d
+# CHECK-NEXT: 1 12 1.00 U decp z31.h, p15.h
+# CHECK-NEXT: 1 12 1.00 U decp z31.s, p15.s
+# CHECK-NEXT: 1 1 0.50 decw x0
+# CHECK-NEXT: 1 1 0.50 decw x0, #14
+# CHECK-NEXT: 1 1 0.50 decw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 decw x0, pow2
+# CHECK-NEXT: 1 1 0.50 decw x0, vl1
+# CHECK-NEXT: 1 4 1.00 dupm z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 4 1.00 dupm z0.s, #0xfffffff9
+# CHECK-NEXT: 1 4 1.00 dupm z23.h, #0xfff9
+# CHECK-NEXT: 1 4 1.00 dupm z5.b, #0xf9
+# CHECK-NEXT: 1 3 1.00 eor p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 4 1.00 eor z0.d, z0.d, #0x6
+# CHECK-NEXT: 1 4 1.00 eor z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 4 0.50 eor z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 eor z0.s, z0.s, #0x6
+# CHECK-NEXT: 1 4 1.00 eor z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: 1 4 0.50 eor z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 4 1.00 eor z23.h, z23.h, #0x6
+# CHECK-NEXT: 1 4 1.00 eor z23.h, z23.h, #0xfff9
+# CHECK-NEXT: 1 4 0.50 eor z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 eor z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 eor z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 eor z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 1.00 eor z5.b, z5.b, #0x6
+# CHECK-NEXT: 1 4 1.00 eor z5.b, z5.b, #0xf9
+# CHECK-NEXT: 1 3 1.00 U eors p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 10 46 5.00 eorv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 eorv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 eorv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 eorv s0, p7, z31.s
+# CHECK-NEXT: 1 6 1.00 ext z31.b, z31.b, z0.b, #0
+# CHECK-NEXT: 1 6 1.00 ext z31.b, z31.b, z0.b, #255
+# CHECK-NEXT: 1 9 0.50 fabd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fabd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fabd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fabs z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 fabs z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 fabs z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 facge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 0.50 facge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 0.50 facge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 0.50 facge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 0.50 facge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 4 0.50 facge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 0.50 facgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 0.50 facgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 0.50 facgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 0.50 facgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 0.50 facgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 4 0.50 facgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 9 1.00 fadd z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 9 0.50 fadd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fadd z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 9 1.00 fadd z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 9 0.50 fadd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fadd z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 9 1.00 fadd z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 9 0.50 fadd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fadd z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 9 1.00 fadd z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 9 1.00 fadd z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 9 1.00 fadd z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 15 108 7.50 fadda d0, p7, d0, z31.d
+# CHECK-NEXT: 63 468 31.50 fadda h0, p7, h0, z31.h
+# CHECK-NEXT: 31 228 15.50 fadda s0, p7, s0, z31.s
+# CHECK-NEXT: 7 45 3.50 faddv d0, p7, z31.d
+# CHECK-NEXT: 11 75 5.50 faddv h0, p7, z31.h
+# CHECK-NEXT: 9 60 4.50 faddv s0, p7, z31.s
+# CHECK-NEXT: 2 15 1.00 fcadd z0.d, p0/m, z0.d, z0.d, #90
+# CHECK-NEXT: 2 15 1.00 fcadd z0.h, p0/m, z0.h, z0.h, #90
+# CHECK-NEXT: 2 15 1.00 fcadd z0.s, p0/m, z0.s, z0.s, #90
+# CHECK-NEXT: 2 15 1.00 fcadd z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: 2 15 1.00 fcadd z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: 2 15 1.00 fcadd z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: 1 4 1.00 fcmeq p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmeq p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 1.00 fcmeq p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmeq p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 1.00 fcmeq p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmeq p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 4 1.00 fcmge p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 1.00 fcmge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 1.00 fcmge p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 1.00 fcmge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 1.00 fcmge p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 4 1.00 fcmge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 4 1.00 fcmgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: 3 15 1.50 fcmla z0.d, p0/m, z0.d, z0.d, #0
+# CHECK-NEXT: 3 15 1.50 fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: 3 15 1.50 fcmla z0.h, p0/m, z0.h, z0.h, #0
+# CHECK-NEXT: 3 15 1.50 fcmla z0.h, p0/m, z1.h, z2.h, #90
+# CHECK-NEXT: 3 15 1.50 fcmla z0.h, z0.h, z0.h[0], #0
+# CHECK-NEXT: 3 15 1.50 fcmla z0.s, p0/m, z0.s, z0.s, #0
+# CHECK-NEXT: 3 15 1.50 fcmla z0.s, p0/m, z1.s, z2.s, #90
+# CHECK-NEXT: 3 15 1.50 fcmla z21.s, z10.s, z5.s[1], #90
+# CHECK-NEXT: 3 15 1.50 fcmla z23.s, z13.s, z8.s[0], #270
+# CHECK-NEXT: 3 15 1.50 fcmla z29.d, p7/m, z30.d, z31.d, #180
+# CHECK-NEXT: 3 15 1.50 fcmla z29.h, p7/m, z30.h, z31.h, #180
+# CHECK-NEXT: 3 15 1.50 fcmla z29.s, p7/m, z30.s, z31.s, #180
+# CHECK-NEXT: 3 15 1.50 fcmla z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: 3 15 1.50 fcmla z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: 3 15 1.50 fcmla z31.h, z31.h, z7.h[3], #270
+# CHECK-NEXT: 3 15 1.50 fcmla z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: 1 4 1.00 fcmle p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmle p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmle p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmlt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmlt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmlt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmne p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmne p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 1.00 fcmne p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmne p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 1.00 fcmne p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: 1 4 1.00 fcmne p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 4 1.00 fcmuo p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: 1 4 1.00 fcmuo p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: 1 4 1.00 fcmuo p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: 1 9 0.50 fcvt z0.d, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvt z0.d, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 fcvt z0.h, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 fcvt z0.h, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 fcvt z0.s, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 fcvt z0.s, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.d, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.d, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.s, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.s, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzs z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.d, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.d, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.s, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.s, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 fcvtzu z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 154 154.00 fdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 134 134.00 fdiv z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 98 98.00 fdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 154 154.00 fdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 134 134.00 fdivr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 98 98.00 fdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fexpa z0.d, z31.d
+# CHECK-NEXT: 1 4 0.50 fexpa z0.h, z31.h
+# CHECK-NEXT: 1 4 0.50 fexpa z0.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 1.00 fmax z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 4 0.50 fmax z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 4 1.00 fmax z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 4 0.50 fmax z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 4 1.00 fmax z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 4 0.50 fmax z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 1.00 fmax z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 4 1.00 fmax z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 4 1.00 fmax z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 4 1.00 fmaxnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 4 0.50 fmaxnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 4 1.00 fmaxnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 4 0.50 fmaxnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 4 1.00 fmaxnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 4 0.50 fmaxnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 1.00 fmaxnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 4 1.00 fmaxnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 4 1.00 fmaxnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 11 54 5.50 fmaxnmv d0, p7, z31.d
+# CHECK-NEXT: 11 54 5.50 fmaxnmv h0, p7, z31.h
+# CHECK-NEXT: 9 44 4.50 fmaxnmv s0, p7, z31.s
+# CHECK-NEXT: 11 54 5.50 fmaxv d0, p7, z31.d
+# CHECK-NEXT: 11 54 5.50 fmaxv h0, p7, z31.h
+# CHECK-NEXT: 9 44 4.50 fmaxv s0, p7, z31.s
+# CHECK-NEXT: 1 4 1.00 fmin z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 4 0.50 fmin z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 4 1.00 fmin z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 4 0.50 fmin z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 4 1.00 fmin z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 4 0.50 fmin z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 1.00 fmin z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 4 1.00 fmin z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 4 1.00 fmin z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 4 1.00 fminnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: 1 4 0.50 fminnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 4 1.00 fminnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: 1 4 0.50 fminnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 4 1.00 fminnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: 1 4 0.50 fminnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 1.00 fminnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 4 1.00 fminnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 4 1.00 fminnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 11 54 5.50 fminnmv d0, p7, z31.d
+# CHECK-NEXT: 11 54 5.50 fminnmv h0, p7, z31.h
+# CHECK-NEXT: 9 44 4.50 fminnmv s0, p7, z31.s
+# CHECK-NEXT: 11 54 5.50 fminv d0, p7, z31.d
+# CHECK-NEXT: 11 54 5.50 fminv h0, p7, z31.h
+# CHECK-NEXT: 9 44 4.50 fminv s0, p7, z31.s
+# CHECK-NEXT: 1 9 0.50 fmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 2 15 1.00 fmla z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: 1 9 0.50 fmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 2 15 1.00 fmla z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 9 0.50 fmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 2 15 1.00 fmla z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 9 0.50 fmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 2 15 1.00 fmls z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: 1 9 0.50 fmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 2 15 1.00 fmls z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: 1 9 0.50 fmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 2 15 1.00 fmls z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: 1 6 1.00 fmov z0.d, #-10.00000000
+# CHECK-NEXT: 1 6 1.00 fmov z0.d, #0.12500000
+# CHECK-NEXT: 1 4 1.00 U fmov z0.d, p0/m, #-10.00000000
+# CHECK-NEXT: 1 4 1.00 U fmov z0.d, p0/m, #0.12500000
+# CHECK-NEXT: 1 6 1.00 fmov z0.h, #-0.12500000
+# CHECK-NEXT: 1 4 1.00 U fmov z0.h, p0/m, #-0.12500000
+# CHECK-NEXT: 1 6 1.00 fmov z0.s, #-0.12500000
+# CHECK-NEXT: 1 4 1.00 U fmov z0.s, p0/m, #-0.12500000
+# CHECK-NEXT: 1 9 0.50 fmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fmul z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 9 0.50 fmul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 2 15 1.00 fmul z0.d, z0.d, z0.d[0]
+# CHECK-NEXT: 1 9 0.50 fmul z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fmul z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 9 0.50 fmul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 2 15 1.00 fmul z0.h, z0.h, z0.h[0]
+# CHECK-NEXT: 1 9 0.50 fmul z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fmul z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 9 0.50 fmul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 2 15 1.00 fmul z0.s, z0.s, z0.s[0]
+# CHECK-NEXT: 1 9 0.50 fmul z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fmul z31.d, p7/m, z31.d, #2.0
+# CHECK-NEXT: 2 15 1.00 fmul z31.d, z31.d, z15.d[1]
+# CHECK-NEXT: 1 9 0.50 fmul z31.h, p7/m, z31.h, #2.0
+# CHECK-NEXT: 2 15 1.00 fmul z31.h, z31.h, z7.h[7]
+# CHECK-NEXT: 1 9 0.50 fmul z31.s, p7/m, z31.s, #2.0
+# CHECK-NEXT: 2 15 1.00 fmul z31.s, z31.s, z7.s[3]
+# CHECK-NEXT: 1 9 0.50 fmulx z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fmulx z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fmulx z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 fneg z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 fneg z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 fneg z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 fnmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fnmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fnmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fnmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fnmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fnmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fnmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fnmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fnmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fnmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fnmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fnmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 frecpe z0.d, z31.d
+# CHECK-NEXT: 1 4 0.50 frecpe z0.h, z31.h
+# CHECK-NEXT: 1 4 0.50 frecpe z0.s, z31.s
+# CHECK-NEXT: 1 9 1.00 frecps z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 9 1.00 frecps z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 9 1.00 frecps z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 frecpx z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 frecpx z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 frecpx z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frinta z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frinta z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frinta z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frinti z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frinti z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frinti z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frintm z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frintm z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frintm z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frintn z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frintn z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frintn z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frintp z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frintp z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frintp z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frintx z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frintx z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frintx z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 0.50 frintz z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 9 0.50 frintz z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 9 0.50 frintz z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 frsqrte z0.d, z31.d
+# CHECK-NEXT: 1 4 0.50 frsqrte z0.h, z31.h
+# CHECK-NEXT: 1 4 0.50 frsqrte z0.s, z31.s
+# CHECK-NEXT: 1 9 1.00 frsqrts z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 9 1.00 frsqrts z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 9 1.00 frsqrts z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fscale z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fscale z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fscale z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 154 154.00 fsqrt z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 134 134.00 fsqrt z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 98 98.00 fsqrt z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 9 1.00 fsub z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 9 0.50 fsub z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 fsub z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 9 1.00 fsub z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 9 0.50 fsub z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 fsub z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 9 1.00 fsub z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 9 0.50 fsub z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 9 0.50 fsub z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 9 1.00 fsub z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 9 1.00 fsub z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 9 1.00 fsub z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 9 1.00 fsubr z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: 1 9 0.50 fsubr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 1.00 fsubr z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: 1 9 0.50 fsubr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 1.00 fsubr z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: 1 9 0.50 fsubr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 9 1.00 fsubr z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: 1 9 1.00 fsubr z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: 1 9 1.00 fsubr z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: 1 9 0.50 ftmad z0.d, z0.d, z31.d, #7
+# CHECK-NEXT: 1 9 0.50 ftmad z0.h, z0.h, z31.h, #7
+# CHECK-NEXT: 1 9 0.50 ftmad z0.s, z0.s, z31.s, #7
+# CHECK-NEXT: 1 9 0.50 ftsmul z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 ftsmul z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 ftsmul z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 4 0.50 ftssel z0.d, z1.d, z31.d
+# CHECK-NEXT: 1 4 0.50 ftssel z0.h, z1.h, z31.h
+# CHECK-NEXT: 1 4 0.50 ftssel z0.s, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.50 incb x0
+# CHECK-NEXT: 1 1 0.50 incb x0, #14
+# CHECK-NEXT: 1 1 0.50 incb x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 incb x0, pow2
+# CHECK-NEXT: 1 1 0.50 incb x0, vl1
+# CHECK-NEXT: 1 1 0.50 incd x0
+# CHECK-NEXT: 1 1 0.50 incd x0, #14
+# CHECK-NEXT: 1 1 0.50 incd x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 incd x0, pow2
+# CHECK-NEXT: 1 1 0.50 incd x0, vl1
+# CHECK-NEXT: 1 4 0.50 incd z0.d
+# CHECK-NEXT: 1 4 0.50 incd z0.d, all, mul #16
+# CHECK-NEXT: 1 1 0.50 inch x0
+# CHECK-NEXT: 1 1 0.50 inch x0, #14
+# CHECK-NEXT: 1 1 0.50 inch x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 inch x0, pow2
+# CHECK-NEXT: 1 1 0.50 inch x0, vl1
+# CHECK-NEXT: 1 4 0.50 inch z0.h
+# CHECK-NEXT: 1 4 0.50 inch z0.h, all, mul #16
+# CHECK-NEXT: 2 7 1.00 incp x0, p0.b
+# CHECK-NEXT: 2 7 1.00 incp x0, p0.d
+# CHECK-NEXT: 2 7 1.00 incp x0, p0.h
+# CHECK-NEXT: 2 7 1.00 incp x0, p0.s
+# CHECK-NEXT: 2 7 1.00 incp xzr, p15.b
+# CHECK-NEXT: 2 7 1.00 incp xzr, p15.d
+# CHECK-NEXT: 2 7 1.00 incp xzr, p15.h
+# CHECK-NEXT: 2 7 1.00 incp xzr, p15.s
+# CHECK-NEXT: 1 12 1.00 U incp z31.d, p15.d
+# CHECK-NEXT: 1 12 1.00 U incp z31.h, p15.h
+# CHECK-NEXT: 1 12 1.00 U incp z31.s, p15.s
+# CHECK-NEXT: 1 1 0.50 incw x0
+# CHECK-NEXT: 1 1 0.50 incw x0, #14
+# CHECK-NEXT: 1 1 0.50 incw x0, all, mul #16
+# CHECK-NEXT: 1 1 0.50 incw x0, pow2
+# CHECK-NEXT: 1 1 0.50 incw x0, vl1
+# CHECK-NEXT: 1 4 0.50 incw z0.s
+# CHECK-NEXT: 1 4 0.50 incw z0.s, all, mul #16
+# CHECK-NEXT: 2 13 2.00 index z0.b, #0, #0
+# CHECK-NEXT: 1 9 1.00 index z0.d, #0, #0
+# CHECK-NEXT: 2 13 2.00 index z0.h, #0, #0
+# CHECK-NEXT: 3 17 2.00 index z0.h, w0, w0
+# CHECK-NEXT: 1 9 1.00 index z0.s, #0, #0
+# CHECK-NEXT: 3 17 2.00 index z21.b, w10, w21
+# CHECK-NEXT: 2 17 2.00 index z21.d, x10, x21
+# CHECK-NEXT: 2 17 2.00 index z21.s, w10, w21
+# CHECK-NEXT: 2 17 2.00 index z23.b, #13, w8
+# CHECK-NEXT: 2 17 2.00 index z23.b, w13, #8
+# CHECK-NEXT: 1 13 1.00 index z23.d, #13, x8
+# CHECK-NEXT: 1 13 1.00 index z23.d, x13, #8
+# CHECK-NEXT: 2 17 2.00 index z23.h, #13, w8
+# CHECK-NEXT: 2 17 2.00 index z23.h, w13, #8
+# CHECK-NEXT: 1 13 1.00 index z23.s, #13, w8
+# CHECK-NEXT: 1 13 1.00 index z23.s, w13, #8
+# CHECK-NEXT: 2 13 2.00 index z31.b, #-1, #-1
+# CHECK-NEXT: 2 17 2.00 index z31.b, #-1, wzr
+# CHECK-NEXT: 2 17 2.00 index z31.b, wzr, #-1
+# CHECK-NEXT: 3 17 2.00 index z31.b, wzr, wzr
+# CHECK-NEXT: 1 9 1.00 index z31.d, #-1, #-1
+# CHECK-NEXT: 1 13 1.00 index z31.d, #-1, xzr
+# CHECK-NEXT: 1 13 1.00 index z31.d, xzr, #-1
+# CHECK-NEXT: 2 17 2.00 index z31.d, xzr, xzr
+# CHECK-NEXT: 2 13 2.00 index z31.h, #-1, #-1
+# CHECK-NEXT: 2 17 2.00 index z31.h, #-1, wzr
+# CHECK-NEXT: 2 17 2.00 index z31.h, wzr, #-1
+# CHECK-NEXT: 3 17 2.00 index z31.h, wzr, wzr
+# CHECK-NEXT: 1 9 1.00 index z31.s, #-1, #-1
+# CHECK-NEXT: 1 13 1.00 index z31.s, #-1, wzr
+# CHECK-NEXT: 1 13 1.00 index z31.s, wzr, #-1
+# CHECK-NEXT: 2 17 2.00 index z31.s, wzr, wzr
+# CHECK-NEXT: 1 10 1.00 insr z0.b, w0
+# CHECK-NEXT: 1 10 1.00 insr z0.d, x0
+# CHECK-NEXT: 1 10 1.00 insr z0.h, w0
+# CHECK-NEXT: 1 10 1.00 insr z0.s, w0
+# CHECK-NEXT: 1 6 1.00 insr z31.b, b31
+# CHECK-NEXT: 1 10 1.00 insr z31.b, wzr
+# CHECK-NEXT: 1 6 1.00 insr z31.d, d31
+# CHECK-NEXT: 1 10 1.00 insr z31.d, xzr
+# CHECK-NEXT: 1 6 1.00 insr z31.h, h31
+# CHECK-NEXT: 1 10 1.00 insr z31.h, wzr
+# CHECK-NEXT: 1 6 1.00 insr z31.s, s31
+# CHECK-NEXT: 1 10 1.00 insr z31.s, wzr
+# CHECK-NEXT: 1 6 1.00 U lasta b0, p7, z31.b
+# CHECK-NEXT: 1 6 1.00 lasta d0, p7, z31.d
+# CHECK-NEXT: 1 6 1.00 lasta h0, p7, z31.h
+# CHECK-NEXT: 1 6 1.00 lasta s0, p7, z31.s
+# CHECK-NEXT: 1 29 1.00 lasta w0, p7, z31.b
+# CHECK-NEXT: 1 29 1.00 lasta w0, p7, z31.h
+# CHECK-NEXT: 1 29 1.00 lasta w0, p7, z31.s
+# CHECK-NEXT: 1 29 1.00 lasta x0, p7, z31.d
+# CHECK-NEXT: 1 6 1.00 U lastb b0, p7, z31.b
+# CHECK-NEXT: 1 6 1.00 lastb d0, p7, z31.d
+# CHECK-NEXT: 1 6 1.00 lastb h0, p7, z31.h
+# CHECK-NEXT: 1 6 1.00 lastb s0, p7, z31.s
+# CHECK-NEXT: 1 29 1.00 lastb w0, p7, z31.b
+# CHECK-NEXT: 1 29 1.00 lastb w0, p7, z31.h
+# CHECK-NEXT: 1 29 1.00 lastb w0, p7, z31.s
+# CHECK-NEXT: 1 29 1.00 lastb x0, p7, z31.d
+# CHECK-NEXT: 1 11 0.50 * ld1b { z0.b }, p0/z, [sp, x0]
+# CHECK-NEXT: 1 11 0.50 * ld1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 23 4.00 * U ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 19 4.00 * U ld1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ld1b { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: 1 11 0.50 * ld1b { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 19 4.00 * U ld1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 11 0.50 * ld1b { z5.h }, p3/z, [x17, x16]
+# CHECK-NEXT: 1 20 2.00 * U ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 1 20 2.00 * U ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 1 11 0.50 * U ld1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ld1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * ld1d { z23.d }, p3/z, [sp, x8, lsl #3]
+# CHECK-NEXT: 1 11 0.50 * ld1d { z23.d }, p3/z, [x13, x8, lsl #3]
+# CHECK-NEXT: 1 20 2.00 * U ld1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: 1 11 0.50 * U ld1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: 1 20 2.00 * U ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 1 20 2.00 * U ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 23 4.00 * U ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 19 4.00 * U ld1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: 1 20 2.00 * U ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 23 4.00 * U ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 1 23 4.00 * U ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 1 19 4.00 * U ld1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 11 0.50 * ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z31.b }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rd { z31.d }, p7/z, [sp, #504]
+# CHECK-NEXT: 1 11 0.50 * U ld1rh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: 1 11 0.50 * U ld1rh { z31.h }, p7/z, [sp, #126]
+# CHECK-NEXT: 1 11 0.50 * U ld1rh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: 1 11 0.50 * U ld1rqb { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 11 0.50 * ld1rqb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ld1rqb { z21.b }, p5/z, [x10, #112]
+# CHECK-NEXT: 1 11 0.50 * ld1rqb { z23.b }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 11 0.50 * ld1rqb { z31.b }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 11 0.50 * U ld1rqd { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 1 11 0.50 * ld1rqd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ld1rqd { z23.d }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 11 0.50 * ld1rqd { z23.d }, p3/z, [x13, #112]
+# CHECK-NEXT: 1 11 0.50 * ld1rqd { z31.d }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 11 0.50 * U ld1rqh { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * ld1rqh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ld1rqh { z23.h }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 11 0.50 * ld1rqh { z23.h }, p3/z, [x13, #112]
+# CHECK-NEXT: 1 11 0.50 * ld1rqh { z31.h }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 11 0.50 * U ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * ld1rqw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ld1rqw { z23.s }, p3/z, [x13, #-128]
+# CHECK-NEXT: 1 11 0.50 * ld1rqw { z23.s }, p3/z, [x13, #112]
+# CHECK-NEXT: 1 11 0.50 * ld1rqw { z31.s }, p7/z, [sp, #-16]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rsw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: 1 11 0.50 * U ld1rw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1rw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: 1 11 0.50 * U ld1rw { z31.s }, p7/z, [sp, #252]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * ld1sb { z0.h }, p0/z, [sp, x0]
+# CHECK-NEXT: 1 11 0.50 * ld1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 23 4.00 * U ld1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 19 4.00 * U ld1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ld1sb { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: 1 11 0.50 * ld1sb { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ld1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 19 4.00 * U ld1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 20 2.00 * U ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 1 20 2.00 * U ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 1 11 0.50 * U ld1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 23 4.00 * U ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 19 4.00 * U ld1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 11 0.50 * U ld1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * ld1sh { z21.s }, p5/z, [sp, x21, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * U ld1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ld1sh { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * ld1sh { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: 1 20 2.00 * U ld1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * U ld1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 11 0.50 * U ld1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 23 4.00 * U ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 1 23 4.00 * U ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 1 19 4.00 * U ld1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 20 2.00 * U ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 1 20 2.00 * U ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 1 11 0.50 * U ld1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: 1 20 2.00 * U ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * U ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 1 20 2.00 * U ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 1 20 2.00 * U ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 1 11 0.50 * U ld1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 16 2.00 * U ld1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 23 4.00 * U ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ld1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 19 4.00 * U ld1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 11 0.50 * U ld1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * ld1w { z21.s }, p5/z, [sp, x21, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * U ld1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ld1w { z21.s }, p5/z, [x10, x21, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * ld1w { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: 1 20 2.00 * U ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * U ld1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 20 2.00 * U ld1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 16 2.00 * U ld1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 1 11 0.50 * U ld1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 23 4.00 * U ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: 1 23 4.00 * U ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: 1 19 4.00 * U ld1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: 3 15 4.50 * U ld2b { z0.b, z1.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 3 15 4.50 * U ld2b { z0.b, z1.b }, p0/z, [x0]
+# CHECK-NEXT: 3 15 4.50 * U ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 3 15 4.50 * U ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 3 15 4.50 * U ld2b { z5.b, z6.b }, p3/z, [x17, x16]
+# CHECK-NEXT: 3 12 1.50 * U ld2d { z0.d, z1.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 2 11 1.00 * U ld2d { z0.d, z1.d }, p0/z, [x0]
+# CHECK-NEXT: 2 11 1.00 * U ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 2 11 1.00 * U ld2d { z23.d, z24.d }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 3 12 1.50 * U ld2d { z5.d, z6.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: 3 15 4.50 * U ld2h { z0.h, z1.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 3 15 4.50 * U ld2h { z0.h, z1.h }, p0/z, [x0]
+# CHECK-NEXT: 3 15 4.50 * U ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 3 15 4.50 * U ld2h { z23.h, z24.h }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 3 15 4.50 * U ld2h { z5.h, z6.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 3 12 1.50 * U ld2w { z0.s, z1.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 2 11 1.00 * U ld2w { z0.s, z1.s }, p0/z, [x0]
+# CHECK-NEXT: 2 11 1.00 * U ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: 2 11 1.00 * U ld2w { z23.s, z24.s }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: 3 12 1.50 * U ld2w { z5.s, z6.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: 4 15 6.50 * U ld3b { z0.b, z1.b, z2.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 4 15 6.50 * U ld3b { z0.b, z1.b, z2.b }, p0/z, [x0]
+# CHECK-NEXT: 4 15 6.50 * U ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 4 15 6.50 * U ld3b { z23.b, z24.b, z25.b }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 4 15 6.50 * U ld3b { z5.b, z6.b, z7.b }, p3/z, [x17, x16]
+# CHECK-NEXT: 4 12 2.00 * U ld3d { z0.d, z1.d, z2.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 3 11 1.50 * U ld3d { z0.d, z1.d, z2.d }, p0/z, [x0]
+# CHECK-NEXT: 3 11 1.50 * U ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 3 11 1.50 * U ld3d { z23.d, z24.d, z25.d }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 4 12 2.00 * U ld3d { z5.d, z6.d, z7.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: 4 15 6.50 * U ld3h { z0.h, z1.h, z2.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 4 15 6.50 * U ld3h { z0.h, z1.h, z2.h }, p0/z, [x0]
+# CHECK-NEXT: 4 15 6.50 * U ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 4 15 6.50 * U ld3h { z23.h, z24.h, z25.h }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 4 15 6.50 * U ld3h { z5.h, z6.h, z7.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 4 12 2.00 * U ld3w { z0.s, z1.s, z2.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 3 11 1.50 * U ld3w { z0.s, z1.s, z2.s }, p0/z, [x0]
+# CHECK-NEXT: 3 11 1.50 * U ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: 3 11 1.50 * U ld3w { z23.s, z24.s, z25.s }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: 4 12 2.00 * U ld3w { z5.s, z6.s, z7.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: 5 15 8.50 * U ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 5 15 8.50 * U ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0]
+# CHECK-NEXT: 5 15 8.50 * U ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 5 15 8.50 * U ld4b { z23.b, z24.b, z25.b, z26.b }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 5 15 8.50 * U ld4b { z5.b, z6.b, z7.b, z8.b }, p3/z, [x17, x16]
+# CHECK-NEXT: 5 12 2.50 * U ld4d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 4 11 2.00 * U ld4d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0]
+# CHECK-NEXT: 4 11 2.00 * U ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 4 11 2.00 * U ld4d { z23.d, z24.d, z25.d, z26.d }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 5 12 2.50 * U ld4d { z5.d, z6.d, z7.d, z8.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: 5 15 8.50 * U ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 5 15 8.50 * U ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
+# CHECK-NEXT: 5 15 8.50 * U ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 5 15 8.50 * U ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 5 15 8.50 * U ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: 5 12 2.50 * U ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 4 11 2.00 * U ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0]
+# CHECK-NEXT: 4 11 2.00 * U ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: 4 11 2.00 * U ld4w { z23.s, z24.s, z25.s, z26.s }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: 5 12 2.50 * U ld4w { z5.s, z6.s, z7.s, z8.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 16 2.00 * U ldff1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 23 4.00 * U ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 19 4.00 * U ldff1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 20 2.00 * U ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z31.b }, p7/z, [sp]
+# CHECK-NEXT: 1 20 2.00 * U ldff1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z31.h }, p7/z, [sp]
+# CHECK-NEXT: 1 11 0.50 * U ldff1b { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 1 19 4.00 * U ldff1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 11 0.50 * U ldff1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 1 20 2.00 * U ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 1 20 2.00 * U ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 1 16 2.00 * U ldff1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 20 2.00 * U ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: 1 20 2.00 * U ldff1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1d { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: 1 11 0.50 * U ldff1h { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 20 2.00 * U ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 1 20 2.00 * U ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 1 16 2.00 * U ldff1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * U ldff1h { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 23 4.00 * U ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 19 4.00 * U ldff1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 20 2.00 * U ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 1 20 2.00 * U ldff1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1h { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 11 0.50 * U ldff1h { z31.h }, p7/z, [sp]
+# CHECK-NEXT: 1 23 4.00 * U ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 1 23 4.00 * U ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 1 11 0.50 * U ldff1h { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 1 19 4.00 * U ldff1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sb { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 16 2.00 * U ldff1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sb { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 23 4.00 * U ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ldff1sb { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 19 4.00 * U ldff1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sb { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sb { z31.h }, p7/z, [sp]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sb { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 1 19 4.00 * U ldff1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 1 16 2.00 * U ldff1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 23 4.00 * U ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 19 4.00 * U ldff1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sh { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: 1 23 4.00 * U ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: 1 23 4.00 * U ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sh { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 1 19 4.00 * U ldff1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 1 16 2.00 * U ldff1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 1 20 2.00 * U ldff1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1sw { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 1 11 0.50 * U ldff1w { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 20 2.00 * U ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 1 20 2.00 * U ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 1 16 2.00 * U ldff1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 23 4.00 * U ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: 1 23 4.00 * U ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 19 4.00 * U ldff1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: 1 20 2.00 * U ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: 1 20 2.00 * U ldff1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: 1 20 2.00 * U ldff1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: 1 11 0.50 * U ldff1w { z31.d }, p7/z, [sp]
+# CHECK-NEXT: 1 16 2.00 * U ldff1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: 1 23 4.00 * U ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: 1 23 4.00 * U ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: 1 11 0.50 * U ldff1w { z31.s }, p7/z, [sp]
+# CHECK-NEXT: 1 19 4.00 * U ldff1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * U ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: 1 11 0.50 * ldnt1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ldnt1b { z21.b }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1b { z23.b }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: 1 11 0.50 * ldnt1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ldnt1d { z21.d }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1d { z23.d }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 11 0.50 * ldnt1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ldnt1h { z21.h }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1h { z23.h }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 11 0.50 * ldnt1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: 1 11 0.50 * ldnt1w { z21.s }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 0.50 * ldnt1w { z23.s }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 1.00 * ldr p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * ldr p5, [x10, #255, mul vl]
+# CHECK-NEXT: 1 11 1.00 * ldr p7, [x13, #-256, mul vl]
+# CHECK-NEXT: 1 11 1.00 * U ldr z0, [x0]
+# CHECK-NEXT: 1 11 1.00 * U ldr z23, [x13, #255, mul vl]
+# CHECK-NEXT: 1 11 1.00 * U ldr z31, [sp, #-256, mul vl]
+# CHECK-NEXT: 1 4 0.50 lsl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 lsl z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: 1 4 0.50 lsl z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.b, z1.b, z2.d
+# CHECK-NEXT: 1 4 0.50 lsl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 lsl z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 lsl z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: 1 4 0.50 lsl z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.h, z1.h, z2.d
+# CHECK-NEXT: 1 4 0.50 lsl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 lsl z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: 1 4 0.50 lsl z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 lsl z0.s, z1.s, z2.d
+# CHECK-NEXT: 1 4 0.50 lsl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: 1 4 0.50 lsl z31.b, z31.b, #7
+# CHECK-NEXT: 1 4 0.50 lsl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: 1 4 0.50 lsl z31.d, z31.d, #63
+# CHECK-NEXT: 1 4 0.50 lsl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: 1 4 0.50 lsl z31.h, z31.h, #15
+# CHECK-NEXT: 1 4 0.50 lsl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: 1 4 0.50 lsl z31.s, z31.s, #31
+# CHECK-NEXT: 1 4 0.50 U lslr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 U lslr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 U lslr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U lslr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 lsr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 lsr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: 1 4 0.50 lsr z0.b, z0.b, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.b, z1.b, z2.d
+# CHECK-NEXT: 1 4 0.50 lsr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 lsr z0.d, z0.d, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 lsr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: 1 4 0.50 lsr z0.h, z0.h, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.h, z1.h, z2.d
+# CHECK-NEXT: 1 4 0.50 lsr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 lsr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: 1 4 0.50 lsr z0.s, z0.s, #1
+# CHECK-NEXT: 1 4 0.50 lsr z0.s, z1.s, z2.d
+# CHECK-NEXT: 1 4 0.50 lsr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: 1 4 0.50 lsr z31.b, z31.b, #8
+# CHECK-NEXT: 1 4 0.50 lsr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: 1 4 0.50 lsr z31.d, z31.d, #64
+# CHECK-NEXT: 1 4 0.50 lsr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: 1 4 0.50 lsr z31.h, z31.h, #16
+# CHECK-NEXT: 1 4 0.50 lsr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: 1 4 0.50 lsr z31.s, z31.s, #32
+# CHECK-NEXT: 1 4 0.50 U lsrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 U lsrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 U lsrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 U lsrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 9 0.50 mad z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 9 0.50 mad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 mad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 mad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 mla z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 9 0.50 mla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 mla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 mla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 9 0.50 mls z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 9 0.50 mls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 mls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 mls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 3 1.00 mov p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 mov p0.b, p0/m, p0.b
+# CHECK-NEXT: 1 3 1.00 mov p0.b, p0/z, p0.b
+# CHECK-NEXT: 1 3 1.00 mov p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 mov p15.b, p15/m, p15.b
+# CHECK-NEXT: 1 3 1.00 mov p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 4 1.00 mov z0.b, #127
+# CHECK-NEXT: 1 4 1.00 mov z0.b, b0
+# CHECK-NEXT: 1 6 1.00 U mov z0.b, p0/m, b0
+# CHECK-NEXT: 1 8 1.00 mov z0.b, p0/m, w0
+# CHECK-NEXT: 1 4 1.00 mov z0.b, p0/z, #127
+# CHECK-NEXT: 1 6 1.00 mov z0.b, w0
+# CHECK-NEXT: 1 4 1.00 mov z0.d, #0
+# CHECK-NEXT: 1 4 1.00 mov z0.d, #0xe0000000000003ff
+# CHECK-NEXT: 1 4 1.00 mov z0.d, #0xffffffffffff7fff
+# CHECK-NEXT: 1 4 1.00 mov z0.d, #32768
+# CHECK-NEXT: 1 4 1.00 mov z0.d, d0
+# CHECK-NEXT: 1 6 1.00 mov z0.d, p0/m, d0
+# CHECK-NEXT: 1 8 1.00 mov z0.d, p0/m, x0
+# CHECK-NEXT: 1 6 1.00 mov z0.d, x0
+# CHECK-NEXT: 1 4 0.50 mov z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 mov z0.h, #-256
+# CHECK-NEXT: 1 4 1.00 mov z0.h, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z0.h, #0
+# CHECK-NEXT: 1 4 1.00 mov z0.h, #32512
+# CHECK-NEXT: 1 4 1.00 mov z0.h, #32767
+# CHECK-NEXT: 1 4 1.00 mov z0.h, h0
+# CHECK-NEXT: 1 6 1.00 mov z0.h, p0/m, h0
+# CHECK-NEXT: 1 8 1.00 mov z0.h, p0/m, w0
+# CHECK-NEXT: 1 4 1.00 mov z0.h, p0/z, #32512
+# CHECK-NEXT: 1 6 1.00 mov z0.h, w0
+# CHECK-NEXT: 1 4 1.00 mov z0.q, q0
+# CHECK-NEXT: 1 4 1.00 mov z0.s, #0
+# CHECK-NEXT: 1 4 1.00 mov z0.s, #0xffff7fff
+# CHECK-NEXT: 1 4 1.00 mov z0.s, #32768
+# CHECK-NEXT: 1 6 1.00 mov z0.s, p0/m, s0
+# CHECK-NEXT: 1 8 1.00 mov z0.s, p0/m, w0
+# CHECK-NEXT: 1 4 1.00 mov z0.s, s0
+# CHECK-NEXT: 1 6 1.00 mov z0.s, w0
+# CHECK-NEXT: 1 4 1.00 mov z21.d, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.d, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.d, #127
+# CHECK-NEXT: 1 4 1.00 mov z21.d, #32512
+# CHECK-NEXT: 1 4 1.00 mov z21.d, p0/z, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.d, p0/z, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.d, p0/z, #127
+# CHECK-NEXT: 1 4 1.00 mov z21.d, p0/z, #32512
+# CHECK-NEXT: 1 4 1.00 mov z21.d, p15/m, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.d, p15/m, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.h, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.h, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.h, #127
+# CHECK-NEXT: 1 4 1.00 mov z21.h, #32512
+# CHECK-NEXT: 1 4 1.00 mov z21.h, p0/z, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.h, p0/z, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.h, p0/z, #127
+# CHECK-NEXT: 1 4 1.00 mov z21.h, p0/z, #32512
+# CHECK-NEXT: 1 4 1.00 mov z21.h, p15/m, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.h, p15/m, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.s, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.s, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.s, #127
+# CHECK-NEXT: 1 4 1.00 mov z21.s, #32512
+# CHECK-NEXT: 1 4 1.00 mov z21.s, p0/z, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.s, p0/z, #-32768
+# CHECK-NEXT: 1 4 1.00 mov z21.s, p0/z, #127
+# CHECK-NEXT: 1 4 1.00 mov z21.s, p0/z, #32512
+# CHECK-NEXT: 1 4 1.00 mov z21.s, p15/m, #-128
+# CHECK-NEXT: 1 4 1.00 mov z21.s, p15/m, #-32768
+# CHECK-NEXT: 1 4 0.50 mov z31.b, p15/m, z31.b
+# CHECK-NEXT: 1 6 1.00 U mov z31.b, p7/m, b31
+# CHECK-NEXT: 1 1 0.17 U movprfx z31, z6
+# CHECK-NEXT: 1 8 1.00 mov z31.b, p7/m, wsp
+# CHECK-NEXT: 1 6 1.00 mov z31.b, wsp
+# CHECK-NEXT: 1 4 1.00 mov z31.b, z31.b[63]
+# CHECK-NEXT: 1 4 0.50 mov z31.d, p15/m, z31.d
+# CHECK-NEXT: 1 6 1.00 mov z31.d, p7/m, d31
+# CHECK-NEXT: 1 1 0.17 U movprfx z31.d, p7/z, z6.d
+# CHECK-NEXT: 1 8 1.00 mov z31.d, p7/m, sp
+# CHECK-NEXT: 1 6 1.00 mov z31.d, sp
+# CHECK-NEXT: 1 4 0.50 mov z31.d, z0.d
+# CHECK-NEXT: 1 4 1.00 mov z31.d, z31.d[7]
+# CHECK-NEXT: 1 4 0.50 mov z31.h, p15/m, z31.h
+# CHECK-NEXT: 1 6 1.00 mov z31.h, p7/m, h31
+# CHECK-NEXT: 1 8 1.00 mov z31.h, p7/m, wsp
+# CHECK-NEXT: 1 6 1.00 mov z31.h, wsp
+# CHECK-NEXT: 1 4 1.00 mov z31.h, z31.h[31]
+# CHECK-NEXT: 1 4 0.50 mov z31.s, p15/m, z31.s
+# CHECK-NEXT: 1 6 1.00 mov z31.s, p7/m, s31
+# CHECK-NEXT: 1 8 1.00 mov z31.s, p7/m, wsp
+# CHECK-NEXT: 1 6 1.00 mov z31.s, wsp
+# CHECK-NEXT: 1 4 1.00 mov z31.s, z31.s[15]
+# CHECK-NEXT: 1 4 1.00 mov z5.b, #-1
+# CHECK-NEXT: 1 4 1.00 mov z5.b, #-128
+# CHECK-NEXT: 1 4 1.00 mov z5.b, #127
+# CHECK-NEXT: 1 4 1.00 mov z5.b, p0/z, #-1
+# CHECK-NEXT: 1 4 1.00 mov z5.b, p0/z, #-128
+# CHECK-NEXT: 1 4 1.00 mov z5.b, p0/z, #127
+# CHECK-NEXT: 1 4 1.00 mov z5.b, p15/m, #-128
+# CHECK-NEXT: 1 4 1.00 mov z5.d, #-6
+# CHECK-NEXT: 1 4 1.00 mov z5.h, #-6
+# CHECK-NEXT: 1 4 1.00 mov z5.q, z17.q[3]
+# CHECK-NEXT: 1 4 1.00 mov z5.s, #-6
+# CHECK-NEXT: 1 3 1.00 U movs p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 U movs p0.b, p0/z, p0.b
+# CHECK-NEXT: 1 3 1.00 U movs p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U movs p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 1 0.17 U mrs x3, ID_AA64ZFR0_EL1
+# CHECK-NEXT: 1 1 0.17 U mrs x3, ZCR_EL1
+# CHECK-NEXT: 1 1 0.17 U mrs x3, ZCR_EL12
+# CHECK-NEXT: 1 1 0.17 U mrs x3, ZCR_EL2
+# CHECK-NEXT: 1 1 0.17 U mrs x3, ZCR_EL3
+# CHECK-NEXT: 1 9 0.50 msb z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: 1 9 0.50 msb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: 1 9 0.50 msb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 msb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: 1 1 0.17 U msr ZCR_EL1, x3
+# CHECK-NEXT: 1 1 0.17 U msr ZCR_EL12, x3
+# CHECK-NEXT: 1 1 0.17 U msr ZCR_EL2, x3
+# CHECK-NEXT: 1 1 0.17 U msr ZCR_EL3, x3
+# CHECK-NEXT: 1 9 0.50 mul z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: 1 9 0.50 mul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 mul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 mul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 9 1.00 mul z31.b, z31.b, #-128
+# CHECK-NEXT: 1 9 1.00 mul z31.b, z31.b, #127
+# CHECK-NEXT: 1 9 1.00 mul z31.d, z31.d, #-128
+# CHECK-NEXT: 1 9 1.00 mul z31.d, z31.d, #127
+# CHECK-NEXT: 1 9 1.00 mul z31.h, z31.h, #-128
+# CHECK-NEXT: 1 9 1.00 mul z31.h, z31.h, #127
+# CHECK-NEXT: 1 9 1.00 mul z31.s, z31.s, #-128
+# CHECK-NEXT: 1 9 1.00 mul z31.s, z31.s, #127
+# CHECK-NEXT: 1 3 1.00 nand p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 nand p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U nands p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 U nands p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 4 1.00 neg z0.b, p0/m, z0.b
+# CHECK-NEXT: 1 4 1.00 neg z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 1.00 neg z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 4 1.00 neg z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 4 1.00 neg z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 1.00 neg z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 1.00 neg z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 1.00 neg z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 1.00 nor p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 nor p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U nors p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 U nors p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 not p0.b, p0/z, p0.b
+# CHECK-NEXT: 1 3 1.00 not p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 4 0.50 not z31.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 0.50 not z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 not z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 not z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 1.00 U nots p0.b, p0/z, p0.b
+# CHECK-NEXT: 1 3 1.00 U nots p15.b, p15/z, p15.b
+# CHECK-NEXT: 1 3 1.00 orn p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 orn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 U orns p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: 1 3 1.00 U orns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 orr p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 1 4 1.00 orr z0.d, z0.d, #0x6
+# CHECK-NEXT: 1 4 1.00 orr z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: 1 4 1.00 orr z0.s, z0.s, #0x6
+# CHECK-NEXT: 1 4 1.00 orr z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: 1 4 0.50 orr z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 4 1.00 orr z23.h, z23.h, #0x6
+# CHECK-NEXT: 1 4 1.00 orr z23.h, z23.h, #0xfff9
+# CHECK-NEXT: 1 4 0.50 orr z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 orr z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 orr z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 orr z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 1.00 orr z5.b, z5.b, #0x6
+# CHECK-NEXT: 1 4 1.00 orr z5.b, z5.b, #0xf9
+# CHECK-NEXT: 1 3 1.00 U orrs p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: 10 46 5.00 orv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 orv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 orv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 orv s0, p7, z31.s
+# CHECK-NEXT: 1 3 1.00 pfalse p15.b
+# CHECK-NEXT: 1 3 1.00 pfirst p0.b, p15, p0.b
+# CHECK-NEXT: 1 3 1.00 pfirst p15.b, p15, p15.b
+# CHECK-NEXT: 1 3 1.00 pnext p0.b, p15, p0.b
+# CHECK-NEXT: 1 3 1.00 pnext p0.d, p15, p0.d
+# CHECK-NEXT: 1 3 1.00 pnext p0.h, p15, p0.h
+# CHECK-NEXT: 1 3 1.00 pnext p0.s, p15, p0.s
+# CHECK-NEXT: 1 3 1.00 pnext p15.b, p15, p15.b
+# CHECK-NEXT: 1 1 0.50 * * U prfb #14, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb #15, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb #6, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb #7, p0, [x0]
+# CHECK-NEXT: 1 1 2.00 * * prfb #7, p3, [z13.s, #31]
+# CHECK-NEXT: 1 1 2.00 * * prfb #7, p3, [z13.s]
+# CHECK-NEXT: 1 1 1.00 * * U prfb pldl1keep, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 1 1 1.00 * * U prfb pldl1keep, p0, [x0, z0.d]
+# CHECK-NEXT: 1 1 2.00 * * U prfb pldl1keep, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfb pldl3strm, p5, [x10, z21.d, sxtw]
+# CHECK-NEXT: 1 1 2.00 * * U prfb pldl3strm, p5, [x10, z21.s, uxtw]
+# CHECK-NEXT: 1 1 1.00 * * U prfb pldl3strm, p5, [z10.d, #31]
+# CHECK-NEXT: 1 1 1.00 * * U prfb pldl3strm, p5, [z10.d]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfb pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd #14, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd #15, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfd #15, p7, [z31.d, #248]
+# CHECK-NEXT: 1 1 1.00 * * U prfd #15, p7, [z31.d]
+# CHECK-NEXT: 1 1 2.00 * * prfd #15, p7, [z31.s, #248]
+# CHECK-NEXT: 1 1 2.00 * * prfd #15, p7, [z31.s]
+# CHECK-NEXT: 1 1 0.50 * * U prfd #6, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd #7, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: 1 1 1.00 * * U prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 1 1 1.00 * * U prfd pldl1keep, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 1 1 2.00 * * U prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
+# CHECK-NEXT: 1 1 2.00 * * U prfd pldl1keep, p0, [x0, z0.s, uxtw #3]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfd pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh #14, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh #15, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfh #15, p7, [z31.d, #62]
+# CHECK-NEXT: 1 1 1.00 * * U prfh #15, p7, [z31.d]
+# CHECK-NEXT: 1 1 2.00 * * prfh #15, p7, [z31.s, #62]
+# CHECK-NEXT: 1 1 2.00 * * prfh #15, p7, [z31.s]
+# CHECK-NEXT: 1 1 0.50 * * U prfh #6, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh #7, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
+# CHECK-NEXT: 1 1 1.00 * * U prfh pldl3strm, p5, [x10, z21.d, uxtw #1]
+# CHECK-NEXT: 1 1 2.00 * * U prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
+# CHECK-NEXT: 1 1 2.00 * * U prfh pldl3strm, p5, [x10, z21.s, uxtw #1]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfh pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw #14, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw #15, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfw #15, p7, [z31.d, #124]
+# CHECK-NEXT: 1 1 1.00 * * U prfw #15, p7, [z31.d]
+# CHECK-NEXT: 1 1 2.00 * * prfw #15, p7, [z31.s, #124]
+# CHECK-NEXT: 1 1 2.00 * * prfw #15, p7, [z31.s]
+# CHECK-NEXT: 1 1 0.50 * * U prfw #6, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw #7, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfw #7, p3, [x13, z8.d, uxtw #2]
+# CHECK-NEXT: 1 1 1.00 * * U prfw pldl1keep, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 1 1 2.00 * * U prfw pldl1keep, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pldl3strm, p0, [x0]
+# CHECK-NEXT: 1 1 1.00 * * U prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+# CHECK-NEXT: 1 1 2.00 * * U prfw pldl3strm, p5, [x10, z21.s, sxtw #2]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pstl1keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pstl1strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pstl2keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pstl2strm, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pstl3keep, p0, [x0]
+# CHECK-NEXT: 1 1 0.50 * * U prfw pstl3strm, p0, [x0]
+# CHECK-NEXT: 1 3 1.00 ptest p15, p0.b
+# CHECK-NEXT: 1 3 1.00 ptest p15, p15.b
+# CHECK-NEXT: 1 3 1.00 ptrue p0.b, pow2
+# CHECK-NEXT: 1 3 1.00 ptrue p0.d, pow2
+# CHECK-NEXT: 1 3 1.00 ptrue p0.h, pow2
+# CHECK-NEXT: 1 3 1.00 ptrue p0.s, pow2
+# CHECK-NEXT: 1 3 1.00 ptrue p15.b
+# CHECK-NEXT: 1 3 1.00 ptrue p15.d
+# CHECK-NEXT: 1 3 1.00 ptrue p15.h
+# CHECK-NEXT: 1 3 1.00 ptrue p15.s
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #14
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #15
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #16
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #17
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #18
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #19
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #20
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #21
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #22
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #23
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #24
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #25
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #26
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #27
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, #28
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, mul3
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, mul4
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl1
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl128
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl16
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl2
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl256
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl3
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl32
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl4
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl5
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl6
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl64
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl7
+# CHECK-NEXT: 1 3 1.00 ptrue p7.s, vl8
+# CHECK-NEXT: 1 3 1.00 U ptrues p0.b, pow2
+# CHECK-NEXT: 1 3 1.00 U ptrues p0.d, pow2
+# CHECK-NEXT: 1 3 1.00 U ptrues p0.h, pow2
+# CHECK-NEXT: 1 3 1.00 U ptrues p0.s, pow2
+# CHECK-NEXT: 1 3 1.00 U ptrues p15.b
+# CHECK-NEXT: 1 3 1.00 U ptrues p15.d
+# CHECK-NEXT: 1 3 1.00 U ptrues p15.h
+# CHECK-NEXT: 1 3 1.00 U ptrues p15.s
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #14
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #15
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #16
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #17
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #18
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #19
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #20
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #21
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #22
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #23
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #24
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #25
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #26
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #27
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, #28
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, mul3
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, mul4
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl1
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl128
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl16
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl2
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl256
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl3
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl32
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl4
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl5
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl6
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl64
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl7
+# CHECK-NEXT: 1 3 1.00 U ptrues p7.s, vl8
+# CHECK-NEXT: 1 3 1.00 punpkhi p0.h, p0.b
+# CHECK-NEXT: 1 3 1.00 punpkhi p15.h, p15.b
+# CHECK-NEXT: 1 3 1.00 punpklo p0.h, p0.b
+# CHECK-NEXT: 1 3 1.00 punpklo p15.h, p15.b
+# CHECK-NEXT: 1 4 0.50 rbit z0.b, p7/m, z31.b
+# CHECK-NEXT: 1 4 0.50 rbit z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 rbit z0.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 rbit z0.s, p7/m, z31.s
+# CHECK-NEXT: 1 3 1.00 U rdffr p0.b
+# CHECK-NEXT: 1 3 1.00 U rdffr p0.b, p0/z
+# CHECK-NEXT: 1 3 1.00 U rdffr p15.b
+# CHECK-NEXT: 1 3 1.00 U rdffr p15.b, p15/z
+# CHECK-NEXT: 1 3 1.00 U rdffrs p0.b, p0/z
+# CHECK-NEXT: 1 3 1.00 U rdffrs p15.b, p15/z
+# CHECK-NEXT: 1 1 0.50 rdvl x0, #0
+# CHECK-NEXT: 1 1 0.50 rdvl x21, #-32
+# CHECK-NEXT: 1 1 0.50 rdvl x23, #31
+# CHECK-NEXT: 1 1 0.50 rdvl xzr, #-1
+# CHECK-NEXT: 1 6 1.00 rev z0.b, z31.b
+# CHECK-NEXT: 1 6 1.00 rev z0.d, z31.d
+# CHECK-NEXT: 1 6 1.00 rev z0.h, z31.h
+# CHECK-NEXT: 1 6 1.00 rev z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 revb z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 revb z0.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 revb z0.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 revh z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 revh z0.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 revw z0.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 sabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 sabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 sabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 sabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 10 46 5.00 saddv d0, p7, z31.b
+# CHECK-NEXT: 9 42 4.50 saddv d0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 saddv d0, p7, z31.s
+# CHECK-NEXT: 1 9 0.50 scvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 scvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 scvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 scvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 scvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 scvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 scvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 178 178.00 sdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 114 114.00 sdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 178 178.00 sdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 114 114.00 sdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 2 15 1.00 sdot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: 1 9 0.50 sdot z0.d, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 sdot z0.s, z1.b, z31.b
+# CHECK-NEXT: 2 15 1.00 sdot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: 1 4 0.50 sel z23.b, p11, z13.b, z8.b
+# CHECK-NEXT: 1 4 0.50 sel z23.d, p11, z13.d, z8.d
+# CHECK-NEXT: 1 4 0.50 sel z23.h, p11, z13.h, z8.h
+# CHECK-NEXT: 1 4 0.50 sel z23.s, p11, z13.s, z8.s
+# CHECK-NEXT: 1 1 0.17 * U setffr
+# CHECK-NEXT: 1 4 1.00 smax z0.b, z0.b, #-128
+# CHECK-NEXT: 1 4 1.00 smax z0.d, z0.d, #-128
+# CHECK-NEXT: 1 4 1.00 smax z0.h, z0.h, #-128
+# CHECK-NEXT: 1 4 1.00 smax z0.s, z0.s, #-128
+# CHECK-NEXT: 1 4 0.50 smax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 1.00 smax z31.b, z31.b, #127
+# CHECK-NEXT: 1 4 0.50 smax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 1.00 smax z31.d, z31.d, #127
+# CHECK-NEXT: 1 4 0.50 smax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 1.00 smax z31.h, z31.h, #127
+# CHECK-NEXT: 1 4 0.50 smax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 1.00 smax z31.s, z31.s, #127
+# CHECK-NEXT: 10 46 5.00 smaxv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 smaxv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 smaxv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 smaxv s0, p7, z31.s
+# CHECK-NEXT: 1 4 1.00 smin z0.b, z0.b, #-128
+# CHECK-NEXT: 1 4 1.00 smin z0.d, z0.d, #-128
+# CHECK-NEXT: 1 4 1.00 smin z0.h, z0.h, #-128
+# CHECK-NEXT: 1 4 1.00 smin z0.s, z0.s, #-128
+# CHECK-NEXT: 1 4 0.50 smin z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 1.00 smin z31.b, z31.b, #127
+# CHECK-NEXT: 1 4 0.50 smin z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 1.00 smin z31.d, z31.d, #127
+# CHECK-NEXT: 1 4 0.50 smin z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 1.00 smin z31.h, z31.h, #127
+# CHECK-NEXT: 1 4 0.50 smin z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 1.00 smin z31.s, z31.s, #127
+# CHECK-NEXT: 10 46 5.00 sminv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 sminv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 sminv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 sminv s0, p7, z31.s
+# CHECK-NEXT: 1 9 0.50 smulh z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: 1 9 0.50 smulh z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 smulh z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 smulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 6 1.00 splice z31.b, p7, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 splice z31.d, p7, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 splice z31.h, p7, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 splice z31.s, p7, z31.s, z31.s
+# CHECK-NEXT: 1 4 0.50 sqadd z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 sqadd z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 sqadd z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 sqadd z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sqadd z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 sqadd z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 sqadd z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sqadd z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 sqadd z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 sqadd z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sqadd z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 sqadd z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 sqadd z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 0.50 sqadd z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 0.50 sqadd z31.s, z31.s, #65280
+# CHECK-NEXT: 1 2 1.00 sqdecb x0
+# CHECK-NEXT: 1 2 1.00 sqdecb x0, #14
+# CHECK-NEXT: 1 2 1.00 sqdecb x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqdecb x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqdecb x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqdecb x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqdecb x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqdecb x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqdecb x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 sqdecd x0
+# CHECK-NEXT: 1 2 1.00 sqdecd x0, #14
+# CHECK-NEXT: 1 2 1.00 sqdecd x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqdecd x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqdecd x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqdecd x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqdecd x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqdecd x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqdecd x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqdecd z0.d
+# CHECK-NEXT: 1 4 0.50 sqdecd z0.d, all, mul #16
+# CHECK-NEXT: 1 4 0.50 sqdecd z0.d, pow2
+# CHECK-NEXT: 1 4 0.50 sqdecd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 sqdech x0
+# CHECK-NEXT: 1 2 1.00 sqdech x0, #14
+# CHECK-NEXT: 1 2 1.00 sqdech x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqdech x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqdech x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqdech x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqdech x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqdech x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqdech x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqdech z0.h
+# CHECK-NEXT: 1 4 0.50 sqdech z0.h, all, mul #16
+# CHECK-NEXT: 1 4 0.50 sqdech z0.h, pow2
+# CHECK-NEXT: 1 4 0.50 sqdech z0.h, pow2, mul #16
+# CHECK-NEXT: 2 6 1.50 sqdecp x0, p0.b
+# CHECK-NEXT: 2 6 1.50 sqdecp x0, p0.d
+# CHECK-NEXT: 2 6 1.50 sqdecp x0, p0.h
+# CHECK-NEXT: 2 6 1.50 sqdecp x0, p0.s
+# CHECK-NEXT: 2 6 1.50 U sqdecp xzr, p15.b, wzr
+# CHECK-NEXT: 2 6 1.50 U sqdecp xzr, p15.d, wzr
+# CHECK-NEXT: 2 6 1.50 U sqdecp xzr, p15.h, wzr
+# CHECK-NEXT: 2 6 1.50 U sqdecp xzr, p15.s, wzr
+# CHECK-NEXT: 1 12 1.00 sqdecp z0.d, p0.d
+# CHECK-NEXT: 1 12 1.00 sqdecp z0.h, p0.h
+# CHECK-NEXT: 1 12 1.00 sqdecp z0.s, p0.s
+# CHECK-NEXT: 1 2 1.00 sqdecw x0
+# CHECK-NEXT: 1 2 1.00 sqdecw x0, #14
+# CHECK-NEXT: 1 2 1.00 sqdecw x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqdecw x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqdecw x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqdecw x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqdecw x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqdecw x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqdecw x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqdecw z0.s
+# CHECK-NEXT: 1 4 0.50 sqdecw z0.s, all, mul #16
+# CHECK-NEXT: 1 4 0.50 sqdecw z0.s, pow2
+# CHECK-NEXT: 1 4 0.50 sqdecw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 sqincb x0
+# CHECK-NEXT: 1 2 1.00 sqincb x0, #14
+# CHECK-NEXT: 1 2 1.00 sqincb x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqincb x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqincb x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqincb x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqincb x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqincb x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqincb x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 sqincd x0
+# CHECK-NEXT: 1 2 1.00 sqincd x0, #14
+# CHECK-NEXT: 1 2 1.00 sqincd x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqincd x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqincd x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqincd x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqincd x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqincd x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqincd x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqincd z0.d
+# CHECK-NEXT: 1 4 0.50 sqincd z0.d, all, mul #16
+# CHECK-NEXT: 1 4 0.50 sqincd z0.d, pow2
+# CHECK-NEXT: 1 4 0.50 sqincd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 sqinch x0
+# CHECK-NEXT: 1 2 1.00 sqinch x0, #14
+# CHECK-NEXT: 1 2 1.00 sqinch x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqinch x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqinch x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqinch x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqinch x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqinch x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqinch x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqinch z0.h
+# CHECK-NEXT: 1 4 0.50 sqinch z0.h, all, mul #16
+# CHECK-NEXT: 1 4 0.50 sqinch z0.h, pow2
+# CHECK-NEXT: 1 4 0.50 sqinch z0.h, pow2, mul #16
+# CHECK-NEXT: 2 6 1.50 sqincp x0, p0.b
+# CHECK-NEXT: 2 6 1.50 sqincp x0, p0.d
+# CHECK-NEXT: 2 6 1.50 sqincp x0, p0.h
+# CHECK-NEXT: 2 6 1.50 sqincp x0, p0.s
+# CHECK-NEXT: 2 6 1.50 U sqincp xzr, p15.b, wzr
+# CHECK-NEXT: 2 6 1.50 U sqincp xzr, p15.d, wzr
+# CHECK-NEXT: 2 6 1.50 U sqincp xzr, p15.h, wzr
+# CHECK-NEXT: 2 6 1.50 U sqincp xzr, p15.s, wzr
+# CHECK-NEXT: 1 12 1.00 sqincp z0.d, p0.d
+# CHECK-NEXT: 1 12 1.00 sqincp z0.h, p0.h
+# CHECK-NEXT: 1 12 1.00 sqincp z0.s, p0.s
+# CHECK-NEXT: 1 2 1.00 sqincw x0
+# CHECK-NEXT: 1 2 1.00 sqincw x0, #14
+# CHECK-NEXT: 1 2 1.00 sqincw x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 sqincw x0, pow2
+# CHECK-NEXT: 1 2 1.00 sqincw x0, vl1
+# CHECK-NEXT: 1 2 1.00 U sqincw x0, w0
+# CHECK-NEXT: 1 2 1.00 U sqincw x0, w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 U sqincw x0, w0, pow2
+# CHECK-NEXT: 1 2 1.00 U sqincw x0, w0, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqincw z0.s
+# CHECK-NEXT: 1 4 0.50 sqincw z0.s, all, mul #16
+# CHECK-NEXT: 1 4 0.50 sqincw z0.s, pow2
+# CHECK-NEXT: 1 4 0.50 sqincw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 sqsub z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 sqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 sqsub z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 sqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 sqsub z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 sqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 sqsub z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 sqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 sqsub z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 sqsub z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 0.50 sqsub z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 0.50 sqsub z31.s, z31.s, #65280
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.b }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.d }, p0, [x0, x0]
+# CHECK-NEXT: 4 20 4.00 * st1b { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 4 20 4.00 * st1b { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 4 20 4.00 * st1b { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.d }, p0, [x0]
+# CHECK-NEXT: 4 16 4.00 * st1b { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.h }, p0, [x0, x0]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.h }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.s }, p0, [x0, x0]
+# CHECK-NEXT: 8 20 8.00 * st1b { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: 8 20 8.00 * st1b { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 1.00 * st1b { z0.s }, p0, [x0]
+# CHECK-NEXT: 8 16 12.00 * st1b { z0.s }, p7, [z0.s]
+# CHECK-NEXT: 1 11 1.00 * st1b { z21.b }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1b { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1b { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1b { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1b { z31.b }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1b { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 16 4.00 * st1b { z31.d }, p7, [z31.d, #31]
+# CHECK-NEXT: 1 11 1.00 * st1b { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1b { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 16 12.00 * st1b { z31.s }, p7, [z31.s, #31]
+# CHECK-NEXT: 1 11 1.00 * st1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 4 20 4.00 * st1d { z0.d }, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: 4 20 4.00 * st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: 4 20 4.00 * st1d { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 4 20 4.00 * st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: 4 20 4.00 * st1d { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 4 20 4.00 * st1d { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1d { z0.d }, p0, [x0]
+# CHECK-NEXT: 4 16 4.00 * st1d { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1d { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1d { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 16 4.00 * st1d { z31.d }, p7, [z31.d, #248]
+# CHECK-NEXT: 1 11 1.00 * st1h { z0.d }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 4 20 4.00 * st1h { z0.d }, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: 4 20 4.00 * st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: 4 20 4.00 * st1h { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 4 20 4.00 * st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: 4 20 4.00 * st1h { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 4 20 4.00 * st1h { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1h { z0.d }, p0, [x0]
+# CHECK-NEXT: 4 16 4.00 * st1h { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 11 1.00 * st1h { z0.h }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * st1h { z0.s }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 8 20 8.00 * st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
+# CHECK-NEXT: 8 20 8.00 * st1h { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: 8 20 8.00 * st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
+# CHECK-NEXT: 8 20 8.00 * st1h { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 1.00 * st1h { z0.s }, p0, [x0]
+# CHECK-NEXT: 8 16 12.00 * st1h { z0.s }, p7, [z0.s]
+# CHECK-NEXT: 1 11 1.00 * st1h { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1h { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1h { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1h { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 16 4.00 * st1h { z31.d }, p7, [z31.d, #62]
+# CHECK-NEXT: 1 11 1.00 * st1h { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1h { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 16 12.00 * st1h { z31.s }, p7, [z31.s, #62]
+# CHECK-NEXT: 1 11 1.00 * st1w { z0.d }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 4 20 4.00 * st1w { z0.d }, p0, [x0, z0.d, lsl #2]
+# CHECK-NEXT: 4 20 4.00 * st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: 4 20 4.00 * st1w { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: 4 20 4.00 * st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: 4 20 4.00 * st1w { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: 4 20 4.00 * st1w { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1w { z0.d }, p0, [x0]
+# CHECK-NEXT: 4 16 4.00 * st1w { z0.d }, p7, [z0.d]
+# CHECK-NEXT: 1 11 1.00 * st1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 8 20 8.00 * st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
+# CHECK-NEXT: 8 20 8.00 * st1w { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: 8 20 8.00 * st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: 8 20 8.00 * st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: 1 11 1.00 * st1w { z0.s }, p0, [x0]
+# CHECK-NEXT: 8 16 12.00 * st1w { z0.s }, p7, [z0.s]
+# CHECK-NEXT: 1 11 1.00 * st1w { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1w { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: 1 11 1.00 * st1w { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 4 16 4.00 * st1w { z31.d }, p7, [z31.d, #124]
+# CHECK-NEXT: 1 11 1.00 * st1w { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: 8 16 12.00 * st1w { z31.s }, p7, [z31.s, #124]
+# CHECK-NEXT: 3 12 8.00 * U st2b { z0.b, z1.b }, p0, [x0, x0]
+# CHECK-NEXT: 3 12 8.00 * U st2b { z0.b, z1.b }, p0, [x0]
+# CHECK-NEXT: 3 12 8.00 * U st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 3 12 8.00 * U st2b { z23.b, z24.b }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 3 12 8.00 * U st2b { z5.b, z6.b }, p3, [x17, x16]
+# CHECK-NEXT: 2 11 2.00 * U st2d { z0.d, z1.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 3 12 2.00 * U st2d { z0.d, z1.d }, p0, [x0]
+# CHECK-NEXT: 3 12 2.00 * U st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 3 12 2.00 * U st2d { z23.d, z24.d }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 2 11 2.00 * U st2d { z5.d, z6.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: 3 12 8.00 * U st2h { z0.h, z1.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 3 12 8.00 * U st2h { z0.h, z1.h }, p0, [x0]
+# CHECK-NEXT: 3 12 8.00 * U st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 3 12 8.00 * U st2h { z23.h, z24.h }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 3 12 8.00 * U st2h { z5.h, z6.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: 2 11 2.00 * U st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 3 12 2.00 * U st2w { z0.s, z1.s }, p0, [x0]
+# CHECK-NEXT: 3 12 2.00 * U st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: 3 12 2.00 * U st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: 2 11 2.00 * U st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: 4 15 12.00 * U st3b { z0.b, z1.b, z2.b }, p0, [x0, x0]
+# CHECK-NEXT: 4 15 12.00 * U st3b { z0.b, z1.b, z2.b }, p0, [x0]
+# CHECK-NEXT: 4 15 12.00 * U st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 4 15 12.00 * U st3b { z23.b, z24.b, z25.b }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 4 15 12.00 * U st3b { z5.b, z6.b, z7.b }, p3, [x17, x16]
+# CHECK-NEXT: 3 11 3.00 * U st3d { z0.d, z1.d, z2.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 4 12 3.00 * U st3d { z0.d, z1.d, z2.d }, p0, [x0]
+# CHECK-NEXT: 4 12 3.00 * U st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 4 12 3.00 * U st3d { z23.d, z24.d, z25.d }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 3 11 3.00 * U st3d { z5.d, z6.d, z7.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: 4 15 12.00 * U st3h { z0.h, z1.h, z2.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 4 15 12.00 * U st3h { z0.h, z1.h, z2.h }, p0, [x0]
+# CHECK-NEXT: 4 15 12.00 * U st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 4 15 12.00 * U st3h { z23.h, z24.h, z25.h }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 4 15 12.00 * U st3h { z5.h, z6.h, z7.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: 3 11 3.00 * U st3w { z0.s, z1.s, z2.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 4 12 3.00 * U st3w { z0.s, z1.s, z2.s }, p0, [x0]
+# CHECK-NEXT: 4 12 3.00 * U st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: 4 12 3.00 * U st3w { z23.s, z24.s, z25.s }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: 3 11 3.00 * U st3w { z5.s, z6.s, z7.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: 5 15 16.00 * U st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x0, x0]
+# CHECK-NEXT: 5 15 16.00 * U st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x0]
+# CHECK-NEXT: 5 15 16.00 * U st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 5 15 16.00 * U st4b { z23.b, z24.b, z25.b, z26.b }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 5 15 16.00 * U st4b { z5.b, z6.b, z7.b, z8.b }, p3, [x17, x16]
+# CHECK-NEXT: 4 11 4.00 * U st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 5 12 4.00 * U st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x0]
+# CHECK-NEXT: 5 12 4.00 * U st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 5 12 4.00 * U st4d { z23.d, z24.d, z25.d, z26.d }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 4 11 4.00 * U st4d { z5.d, z6.d, z7.d, z8.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: 5 15 16.00 * U st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 5 15 16.00 * U st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x0]
+# CHECK-NEXT: 5 15 16.00 * U st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 5 15 16.00 * U st4h { z23.h, z24.h, z25.h, z26.h }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 5 15 16.00 * U st4h { z5.h, z6.h, z7.h, z8.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: 4 11 4.00 * U st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 5 12 4.00 * U st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x0]
+# CHECK-NEXT: 5 12 4.00 * U st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: 5 12 4.00 * U st4w { z23.s, z24.s, z25.s, z26.s }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: 4 11 4.00 * U st4w { z5.s, z6.s, z7.s, z8.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: 1 11 1.00 * stnt1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: 1 11 1.00 * stnt1b { z0.b }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * stnt1b { z21.b }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1b { z23.b }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: 1 11 1.00 * stnt1d { z0.d }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * stnt1d { z21.d }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1d { z23.d }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: 1 11 1.00 * stnt1h { z0.h }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * stnt1h { z21.h }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1h { z23.h }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: 1 11 1.00 * stnt1w { z0.s }, p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * stnt1w { z21.s }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: 1 11 1.00 * stnt1w { z23.s }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: 1 11 1.00 * str p0, [x0]
+# CHECK-NEXT: 1 11 1.00 * str p15, [sp, #-256, mul vl]
+# CHECK-NEXT: 1 11 1.00 * str p5, [x10, #255, mul vl]
+# CHECK-NEXT: 1 11 1.00 * U str z0, [x0]
+# CHECK-NEXT: 1 11 1.00 * U str z21, [x10, #-256, mul vl]
+# CHECK-NEXT: 1 11 1.00 * U str z31, [sp, #255, mul vl]
+# CHECK-NEXT: 1 4 0.50 sub z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 sub z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 sub z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 sub z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 sub z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 1.00 sub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sub z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 sub z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 sub z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 1.00 sub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sub z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 sub z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 sub z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 1.00 sub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 sub z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 sub z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: 1 4 0.50 sub z21.b, z10.b, z21.b
+# CHECK-NEXT: 1 4 0.50 sub z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: 1 4 0.50 sub z21.d, z10.d, z21.d
+# CHECK-NEXT: 1 4 0.50 sub z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: 1 4 0.50 sub z21.h, z10.h, z21.h
+# CHECK-NEXT: 1 4 0.50 sub z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: 1 4 0.50 sub z21.s, z10.s, z21.s
+# CHECK-NEXT: 1 4 0.50 sub z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: 1 4 0.50 sub z23.b, z13.b, z8.b
+# CHECK-NEXT: 1 4 0.50 sub z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: 1 4 0.50 sub z23.d, z13.d, z8.d
+# CHECK-NEXT: 1 4 0.50 sub z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: 1 4 0.50 sub z23.h, z13.h, z8.h
+# CHECK-NEXT: 1 4 0.50 sub z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: 1 4 0.50 sub z23.s, z13.s, z8.s
+# CHECK-NEXT: 1 4 0.50 sub z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 1.00 sub z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 sub z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 sub z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 1.00 sub z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 0.50 sub z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 sub z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 1.00 sub z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 0.50 sub z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 sub z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 1 4 1.00 sub z31.s, z31.s, #65280
+# CHECK-NEXT: 1 4 0.50 sub z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 4 0.50 subr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: 1 4 1.00 subr z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 subr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: 1 4 1.00 subr z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 1.00 subr z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 subr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: 1 4 1.00 subr z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 1.00 subr z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 subr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: 1 4 1.00 subr z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 1.00 subr z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 1.00 subr z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 1.00 subr z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 1.00 subr z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 1.00 subr z31.s, z31.s, #65280
+# CHECK-NEXT: 1 6 1.00 sunpkhi z31.d, z31.s
+# CHECK-NEXT: 1 6 1.00 sunpkhi z31.h, z31.b
+# CHECK-NEXT: 1 6 1.00 sunpkhi z31.s, z31.h
+# CHECK-NEXT: 1 6 1.00 sunpklo z31.d, z31.s
+# CHECK-NEXT: 1 6 1.00 sunpklo z31.h, z31.b
+# CHECK-NEXT: 1 6 1.00 sunpklo z31.s, z31.h
+# CHECK-NEXT: 1 4 0.50 sxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 sxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 4 0.50 sxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 4 0.50 sxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 sxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 sxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 sxth z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 sxth z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 4 0.50 sxth z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 sxth z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 sxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 sxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 6 1.00 tbl z31.b, { z31.b }, z31.b
+# CHECK-NEXT: 1 6 1.00 tbl z31.d, { z31.d }, z31.d
+# CHECK-NEXT: 1 6 1.00 tbl z31.h, { z31.h }, z31.h
+# CHECK-NEXT: 1 6 1.00 tbl z31.s, { z31.s }, z31.s
+# CHECK-NEXT: 1 3 1.00 trn1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 trn1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1 3 1.00 trn1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1 3 1.00 trn1 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 6 1.00 trn1 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 trn1 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 trn1 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 trn1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 3 1.00 trn2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1 3 1.00 trn2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1 3 1.00 trn2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1 3 1.00 trn2 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 6 1.00 trn2 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 trn2 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 trn2 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 trn2 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 4 0.50 uabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 0.50 uabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 uabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 uabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 10 46 5.00 uaddv d0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 uaddv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 uaddv d0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 uaddv d0, p7, z31.s
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: 1 9 0.50 ucvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 178 178.00 udiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 114 114.00 udiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 178 178.00 udivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 114 114.00 udivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 2 15 1.00 udot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: 1 9 0.50 udot z0.d, z1.h, z31.h
+# CHECK-NEXT: 1 9 0.50 udot z0.s, z1.b, z31.b
+# CHECK-NEXT: 2 15 1.00 udot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: 1 4 1.00 umax z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 umax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 1.00 umax z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 umax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 umax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 umax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 10 46 5.00 umaxv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 umaxv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 umaxv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 umaxv s0, p7, z31.s
+# CHECK-NEXT: 1 4 1.00 umin z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 umin z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: 1 4 1.00 umin z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 umin z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: 1 4 0.50 umin z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: 1 4 0.50 umin z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: 10 46 5.00 uminv b0, p7, z31.b
+# CHECK-NEXT: 7 34 3.50 uminv d0, p7, z31.d
+# CHECK-NEXT: 9 42 4.50 uminv h0, p7, z31.h
+# CHECK-NEXT: 8 38 4.00 uminv s0, p7, z31.s
+# CHECK-NEXT: 1 9 0.50 umulh z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: 1 9 0.50 umulh z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: 1 9 0.50 umulh z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: 1 9 0.50 umulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: 1 4 0.50 uqadd z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 uqadd z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 uqadd z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 uqadd z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 uqadd z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 uqadd z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 uqadd z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 uqadd z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 uqadd z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 uqadd z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 uqadd z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 uqadd z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 uqadd z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 0.50 uqadd z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 0.50 uqadd z31.s, z31.s, #65280
+# CHECK-NEXT: 1 2 1.00 uqdecb w0
+# CHECK-NEXT: 1 2 1.00 uqdecb w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecb w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdecb w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecb x0
+# CHECK-NEXT: 1 2 1.00 uqdecb x0, #14
+# CHECK-NEXT: 1 2 1.00 uqdecb x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecb x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdecb x0, vl1
+# CHECK-NEXT: 1 2 1.00 uqdecd w0
+# CHECK-NEXT: 1 2 1.00 uqdecd w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecd w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdecd w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecd x0
+# CHECK-NEXT: 1 2 1.00 uqdecd x0, #14
+# CHECK-NEXT: 1 2 1.00 uqdecd x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecd x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdecd x0, vl1
+# CHECK-NEXT: 1 4 0.50 uqdecd z0.d
+# CHECK-NEXT: 1 4 0.50 uqdecd z0.d, all, mul #16
+# CHECK-NEXT: 1 4 0.50 uqdecd z0.d, pow2
+# CHECK-NEXT: 1 4 0.50 uqdecd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdech w0
+# CHECK-NEXT: 1 2 1.00 uqdech w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdech w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdech w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdech x0
+# CHECK-NEXT: 1 2 1.00 uqdech x0, #14
+# CHECK-NEXT: 1 2 1.00 uqdech x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdech x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdech x0, vl1
+# CHECK-NEXT: 1 4 0.50 uqdech z0.h
+# CHECK-NEXT: 1 4 0.50 uqdech z0.h, all, mul #16
+# CHECK-NEXT: 1 4 0.50 uqdech z0.h, pow2
+# CHECK-NEXT: 1 4 0.50 uqdech z0.h, pow2, mul #16
+# CHECK-NEXT: 2 6 1.50 uqdecp wzr, p15.b
+# CHECK-NEXT: 2 6 1.50 uqdecp wzr, p15.d
+# CHECK-NEXT: 2 6 1.50 uqdecp wzr, p15.h
+# CHECK-NEXT: 2 6 1.50 uqdecp wzr, p15.s
+# CHECK-NEXT: 2 6 1.50 uqdecp x0, p0.b
+# CHECK-NEXT: 2 6 1.50 uqdecp x0, p0.d
+# CHECK-NEXT: 2 6 1.50 uqdecp x0, p0.h
+# CHECK-NEXT: 2 6 1.50 uqdecp x0, p0.s
+# CHECK-NEXT: 1 12 1.00 uqdecp z0.d, p0.d
+# CHECK-NEXT: 1 12 1.00 uqdecp z0.h, p0.h
+# CHECK-NEXT: 1 12 1.00 uqdecp z0.s, p0.s
+# CHECK-NEXT: 1 2 1.00 uqdecw w0
+# CHECK-NEXT: 1 2 1.00 uqdecw w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecw w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdecw w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecw x0
+# CHECK-NEXT: 1 2 1.00 uqdecw x0, #14
+# CHECK-NEXT: 1 2 1.00 uqdecw x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqdecw x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqdecw x0, vl1
+# CHECK-NEXT: 1 4 0.50 uqdecw z0.s
+# CHECK-NEXT: 1 4 0.50 uqdecw z0.s, all, mul #16
+# CHECK-NEXT: 1 4 0.50 uqdecw z0.s, pow2
+# CHECK-NEXT: 1 4 0.50 uqdecw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincb w0
+# CHECK-NEXT: 1 2 1.00 uqincb w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincb w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqincb w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincb x0
+# CHECK-NEXT: 1 2 1.00 uqincb x0, #14
+# CHECK-NEXT: 1 2 1.00 uqincb x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincb x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqincb x0, vl1
+# CHECK-NEXT: 1 2 1.00 uqincd w0
+# CHECK-NEXT: 1 2 1.00 uqincd w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincd w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqincd w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincd x0
+# CHECK-NEXT: 1 2 1.00 uqincd x0, #14
+# CHECK-NEXT: 1 2 1.00 uqincd x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincd x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqincd x0, vl1
+# CHECK-NEXT: 1 4 0.50 uqincd z0.d
+# CHECK-NEXT: 1 4 0.50 uqincd z0.d, all, mul #16
+# CHECK-NEXT: 1 4 0.50 uqincd z0.d, pow2
+# CHECK-NEXT: 1 4 0.50 uqincd z0.d, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqinch w0
+# CHECK-NEXT: 1 2 1.00 uqinch w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqinch w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqinch w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqinch x0
+# CHECK-NEXT: 1 2 1.00 uqinch x0, #14
+# CHECK-NEXT: 1 2 1.00 uqinch x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqinch x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqinch x0, vl1
+# CHECK-NEXT: 1 4 0.50 uqinch z0.h
+# CHECK-NEXT: 1 4 0.50 uqinch z0.h, all, mul #16
+# CHECK-NEXT: 1 4 0.50 uqinch z0.h, pow2
+# CHECK-NEXT: 1 4 0.50 uqinch z0.h, pow2, mul #16
+# CHECK-NEXT: 2 6 1.50 uqincp wzr, p15.b
+# CHECK-NEXT: 2 6 1.50 uqincp wzr, p15.d
+# CHECK-NEXT: 2 6 1.50 uqincp wzr, p15.h
+# CHECK-NEXT: 2 6 1.50 uqincp wzr, p15.s
+# CHECK-NEXT: 2 6 1.50 uqincp x0, p0.b
+# CHECK-NEXT: 2 6 1.50 uqincp x0, p0.d
+# CHECK-NEXT: 2 6 1.50 uqincp x0, p0.h
+# CHECK-NEXT: 2 6 1.50 uqincp x0, p0.s
+# CHECK-NEXT: 1 12 1.00 uqincp z0.d, p0.d
+# CHECK-NEXT: 1 12 1.00 uqincp z0.h, p0.h
+# CHECK-NEXT: 1 12 1.00 uqincp z0.s, p0.s
+# CHECK-NEXT: 1 2 1.00 uqincw w0
+# CHECK-NEXT: 1 2 1.00 uqincw w0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincw w0, pow2
+# CHECK-NEXT: 1 2 1.00 uqincw w0, pow2, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincw x0
+# CHECK-NEXT: 1 2 1.00 uqincw x0, #14
+# CHECK-NEXT: 1 2 1.00 uqincw x0, all, mul #16
+# CHECK-NEXT: 1 2 1.00 uqincw x0, pow2
+# CHECK-NEXT: 1 2 1.00 uqincw x0, vl1
+# CHECK-NEXT: 1 4 0.50 uqincw z0.s
+# CHECK-NEXT: 1 4 0.50 uqincw z0.s, all, mul #16
+# CHECK-NEXT: 1 4 0.50 uqincw z0.s, pow2
+# CHECK-NEXT: 1 4 0.50 uqincw z0.s, pow2, mul #16
+# CHECK-NEXT: 1 4 0.50 uqsub z0.b, z0.b, #0
+# CHECK-NEXT: 1 4 0.50 uqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 4 0.50 uqsub z0.d, z0.d, #0
+# CHECK-NEXT: 1 4 0.50 uqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 uqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 4 0.50 uqsub z0.h, z0.h, #0
+# CHECK-NEXT: 1 4 0.50 uqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 uqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 4 0.50 uqsub z0.s, z0.s, #0
+# CHECK-NEXT: 1 4 0.50 uqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: 1 4 0.50 uqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 4 0.50 uqsub z31.b, z31.b, #255
+# CHECK-NEXT: 1 4 0.50 uqsub z31.d, z31.d, #65280
+# CHECK-NEXT: 1 4 0.50 uqsub z31.h, z31.h, #65280
+# CHECK-NEXT: 1 4 0.50 uqsub z31.s, z31.s, #65280
+# CHECK-NEXT: 1 6 1.00 uunpkhi z31.d, z31.s
+# CHECK-NEXT: 1 6 1.00 uunpkhi z31.h, z31.b
+# CHECK-NEXT: 1 6 1.00 uunpkhi z31.s, z31.h
+# CHECK-NEXT: 1 6 1.00 uunpklo z31.d, z31.s
+# CHECK-NEXT: 1 6 1.00 uunpklo z31.h, z31.b
+# CHECK-NEXT: 1 6 1.00 uunpklo z31.s, z31.h
+# CHECK-NEXT: 1 4 0.50 uxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 uxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: 1 4 0.50 uxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 4 0.50 uxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 uxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: 1 4 0.50 uxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 uxth z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 uxth z0.s, p0/m, z0.s
+# CHECK-NEXT: 1 4 0.50 uxth z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 4 0.50 uxth z31.s, p7/m, z31.s
+# CHECK-NEXT: 1 4 0.50 uxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: 1 4 0.50 uxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: 1 6 1.00 uzp1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1 6 1.00 uzp1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1 6 1.00 uzp1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1 6 1.00 uzp1 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 6 1.00 uzp1 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 uzp1 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 uzp1 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 uzp1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 6 1.00 uzp2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1 6 1.00 uzp2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1 6 1.00 uzp2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1 6 1.00 uzp2 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 6 1.00 uzp2 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 uzp2 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 uzp2 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 uzp2 z31.s, z31.s, z31.s
+# CHECK-NEXT: 2 3 1.00 * U wrffr p0.b
+# CHECK-NEXT: 2 3 1.00 * U wrffr p15.b
+# CHECK-NEXT: 1 6 1.00 zip1 p0.b, p0.b, p0.b
+# CHECK-NEXT: 1 6 1.00 zip1 p0.d, p0.d, p0.d
+# CHECK-NEXT: 1 6 1.00 zip1 p0.h, p0.h, p0.h
+# CHECK-NEXT: 1 6 1.00 zip1 p0.s, p0.s, p0.s
+# CHECK-NEXT: 1 6 1.00 zip1 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1 6 1.00 zip1 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1 6 1.00 zip1 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1 6 1.00 zip1 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 6 1.00 zip1 z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 6 1.00 zip1 z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 6 1.00 zip1 z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 6 1.00 zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 6 1.00 zip1 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 zip1 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 zip1 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 zip1 z31.s, z31.s, z31.s
+# CHECK-NEXT: 1 6 1.00 zip2 p0.b, p0.b, p0.b
+# CHECK-NEXT: 1 6 1.00 zip2 p0.d, p0.d, p0.d
+# CHECK-NEXT: 1 6 1.00 zip2 p0.h, p0.h, p0.h
+# CHECK-NEXT: 1 6 1.00 zip2 p0.s, p0.s, p0.s
+# CHECK-NEXT: 1 6 1.00 zip2 p15.b, p15.b, p15.b
+# CHECK-NEXT: 1 6 1.00 zip2 p15.d, p15.d, p15.d
+# CHECK-NEXT: 1 6 1.00 zip2 p15.h, p15.h, p15.h
+# CHECK-NEXT: 1 6 1.00 zip2 p15.s, p15.s, p15.s
+# CHECK-NEXT: 1 6 1.00 zip2 z0.b, z0.b, z0.b
+# CHECK-NEXT: 1 6 1.00 zip2 z0.d, z0.d, z0.d
+# CHECK-NEXT: 1 6 1.00 zip2 z0.h, z0.h, z0.h
+# CHECK-NEXT: 1 6 1.00 zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: 1 6 1.00 zip2 z31.b, z31.b, z31.b
+# CHECK-NEXT: 1 6 1.00 zip2 z31.d, z31.d, z31.d
+# CHECK-NEXT: 1 6 1.00 zip2 z31.h, z31.h, z31.h
+# CHECK-NEXT: 1 6 1.00 zip2 z31.s, z31.s, z31.s
+
+# CHECK: Resources:
+# CHECK-NEXT: [0] - A64FXIPBR
+# CHECK-NEXT: [1] - A64FXIPEAGA
+# CHECK-NEXT: [2] - A64FXIPEAGB
+# CHECK-NEXT: [3] - A64FXIPEXA
+# CHECK-NEXT: [4] - A64FXIPEXB
+# CHECK-NEXT: [5] - A64FXIPFLA
+# CHECK-NEXT: [6] - A64FXIPFLB
+# CHECK-NEXT: [7] - A64FXIPPR
+
+# CHECK: Resource pressure per iteration:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
+# CHECK-NEXT: - 1390.00 1376.00 599.00 256.00 4631.00 681.00 340.00
+
+# CHECK: Resource pressure by instruction:
+# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z0.b, p0/m, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - abs z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z0.s, z1.s, z2.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.b, z10.b, z21.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.d, z10.d, z21.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.h, z10.h, z21.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z21.s, z10.s, z21.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.b, z13.b, z8.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.h, z13.h, z8.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z23.s, z13.s, z8.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - add z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - 0.50 0.50 - - - addpl sp, sp, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - addpl x0, x0, #-32
+# CHECK-NEXT: - - - 0.50 0.50 - - - addpl x21, x21, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - addpl x23, x8, #-1
+# CHECK-NEXT: - - - 0.50 0.50 - - - addvl sp, sp, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - addvl x0, x0, #-32
+# CHECK-NEXT: - - - 0.50 0.50 - - - addvl x21, x21, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - addvl x23, x8, #-1
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.d, [z0.d, z0.d, lsl #1]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.d, [z0.d, z0.d, lsl #2]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.d, [z0.d, z0.d, lsl #3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, sxtw #1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, sxtw #2]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, sxtw #3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, sxtw]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, uxtw #1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, uxtw #2]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, uxtw #3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - adr z0.d, [z0.d, z0.d, uxtw]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.d, [z0.d, z0.d]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.s, [z0.s, z0.s, lsl #1]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.s, [z0.s, z0.s, lsl #2]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.s, [z0.s, z0.s, lsl #3]
+# CHECK-NEXT: - - - - - 2.00 - - adr z0.s, [z0.s, z0.s]
+# CHECK-NEXT: - - - - - - - 1.00 and p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - 1.00 - - and z0.d, z0.d, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - and z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - and z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - and z0.s, z0.s, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - and z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - and z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - 1.00 - - and z23.h, z23.h, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - and z23.h, z23.h, #0xfff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - and z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - and z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - and z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - and z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - and z5.b, z5.b, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - and z5.b, z5.b, #0xf9
+# CHECK-NEXT: - - - - - - - 1.00 ands p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - 5.00 5.00 - andv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - andv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - andv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - andv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.b, z1.b, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.h, z1.h, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z0.s, z1.s, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - asr z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - 1.50 - 0.50 asrd z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - asrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - asrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - asrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - asrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - - - 1.00 bic p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 bic p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - bic z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 bics p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 bics p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brka p0.b, p15/m, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brka p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkas p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkb p0.b, p15/m, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkb p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkbs p0.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkn p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 brkn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkns p0.b, p15/z, p1.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 brkns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpa p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpa p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpas p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpas p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpb p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpb p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpbs p0.b, p15/z, p1.b, p2.b
+# CHECK-NEXT: - - - - - - - 1.00 brkpbs p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - clasta b0, p7, b0, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - clasta d0, p7, d0, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clasta h0, p7, h0, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - clasta s0, p7, s0, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clasta w0, p7, w0, z31.b
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clasta w0, p7, w0, z31.h
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clasta w0, p7, w0, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clasta x0, p7, x0, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clasta z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - clasta z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clasta z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - clasta z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - clastb b0, p7, b0, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - clastb d0, p7, d0, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clastb h0, p7, h0, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - clastb s0, p7, s0, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clastb w0, p7, w0, z31.b
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clastb w0, p7, w0, z31.h
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clastb w0, p7, w0, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - clastb x0, p7, x0, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clastb z0.b, p7, z0.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - clastb z0.d, p7, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clastb z0.h, p7, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - clastb z0.s, p7, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - cls z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - cls z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - cls z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - cls z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - clz z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - clz z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - clz z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - clz z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpeq p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphi p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.b, p0/z, z1.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmphs p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmple p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplo p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.b, p0/z, z0.b, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.b, p0/z, z0.b, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.d, p0/z, z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.d, p0/z, z0.d, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.h, p0/z, z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.h, p0/z, z0.h, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.s, p0/z, z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.s, p0/z, z0.s, #127
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpls p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmplt p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.b, p0/z, z0.b, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.b, p0/z, z0.b, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.b, p0/z, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.b, p0/z, z0.b, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.d, p0/z, z0.d, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.d, p0/z, z0.d, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.d, p0/z, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.h, p0/z, z0.h, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.h, p0/z, z0.h, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.h, p0/z, z0.h, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.h, p0/z, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.s, p0/z, z0.s, #-16
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.s, p0/z, z0.s, #15
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.s, p0/z, z0.s, z0.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 cmpne p0.s, p0/z, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - cnot z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - cnot z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - cnot z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - cnot z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - 1.00 - cnt z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - - 1.00 - cnt z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - - 1.00 - cnt z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - - 1.00 - cnt z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntb x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntb x0, #28
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntb x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntb x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntd x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntd x0, #28
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntd x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntd x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - cnth x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - cnth x0, #28
+# CHECK-NEXT: - - - 0.50 0.50 - - - cnth x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - cnth x0, pow2
+# CHECK-NEXT: - - - 1.00 - - - 1.00 cntp x0, p15, p0.b
+# CHECK-NEXT: - - - 1.00 - - - 1.00 cntp x0, p15, p0.d
+# CHECK-NEXT: - - - 1.00 - - - 1.00 cntp x0, p15, p0.h
+# CHECK-NEXT: - - - 1.00 - - - 1.00 cntp x0, p15, p0.s
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntw x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntw x0, #28
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntw x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - cntw x0, pow2
+# CHECK-NEXT: - - - - - 1.00 - - compact z31.d, p7, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - compact z31.s, p7, z31.s
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermeq w30, wzr
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermeq wzr, w30
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermeq x30, xzr
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermeq xzr, x30
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermne w30, wzr
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermne wzr, w30
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermne x30, xzr
+# CHECK-NEXT: - - - 1.00 1.00 - - - ctermne xzr, x30
+# CHECK-NEXT: - - - 0.50 0.50 - - - decb x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - decb x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - decb x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - decb x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - decb x0, vl1
+# CHECK-NEXT: - - - 0.50 0.50 - - - decd x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - decd x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - decd x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - decd x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - decd x0, vl1
+# CHECK-NEXT: - - - 0.50 0.50 - - - dech x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - dech x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - dech x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - dech x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - dech x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp x0, p0.b
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp x0, p0.d
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp x0, p0.h
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp x0, p0.s
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp xzr, p15.b
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp xzr, p15.d
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp xzr, p15.h
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 decp xzr, p15.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 decp z31.d, p15.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 decp z31.h, p15.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 decp z31.s, p15.s
+# CHECK-NEXT: - - - 0.50 0.50 - - - decw x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - decw x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - decw x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - decw x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - decw x0, vl1
+# CHECK-NEXT: - - - - - 1.00 - - dupm z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: - - - - - 1.00 - - dupm z0.s, #0xfffffff9
+# CHECK-NEXT: - - - - - 1.00 - - dupm z23.h, #0xfff9
+# CHECK-NEXT: - - - - - 1.00 - - dupm z5.b, #0xf9
+# CHECK-NEXT: - - - - - - - 1.00 eor p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - 1.00 - - eor z0.d, z0.d, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - eor z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - eor z0.s, z0.s, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - eor z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - 1.00 - - eor z23.h, z23.h, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - eor z23.h, z23.h, #0xfff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - eor z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - eor z5.b, z5.b, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - eor z5.b, z5.b, #0xf9
+# CHECK-NEXT: - - - - - - - 1.00 eors p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - 5.00 5.00 - eorv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - eorv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - eorv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - eorv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - ext z31.b, z31.b, z0.b, #0
+# CHECK-NEXT: - - - - - 1.00 - - ext z31.b, z31.b, z0.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fabs z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - facge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - facgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - fadd z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fadd z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fadd z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fadd z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fadd z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fadd z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fadd z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 7.50 7.50 - fadda d0, p7, d0, z31.d
+# CHECK-NEXT: - - - - - 31.50 31.50 - fadda h0, p7, h0, z31.h
+# CHECK-NEXT: - - - - - 15.50 15.50 - fadda s0, p7, s0, z31.s
+# CHECK-NEXT: - - - - - 3.50 3.50 - faddv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 5.50 5.50 - faddv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.50 4.50 - faddv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcadd z0.d, p0/m, z0.d, z0.d, #90
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcadd z0.h, p0/m, z0.h, z0.h, #90
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcadd z0.s, p0/m, z0.s, z0.s, #90
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcadd z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcadd z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: - - - - - 1.00 1.00 - fcadd z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: - - - - - 1.00 - - fcmeq p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmeq p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmeq p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmeq p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmeq p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmeq p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 1.00 - - fcmge p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.d, p0/z, z1.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.h, p0/z, z1.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 1.00 - - fcmgt p0.s, p0/z, z1.s, z0.s
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.d, p0/m, z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.d, p0/m, z1.d, z2.d, #90
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.h, p0/m, z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.h, p0/m, z1.h, z2.h, #90
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.h, z0.h, z0.h[0], #0
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.s, p0/m, z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z0.s, p0/m, z1.s, z2.s, #90
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z21.s, z10.s, z5.s[1], #90
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z23.s, z13.s, z8.s[0], #270
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z29.d, p7/m, z30.d, z31.d, #180
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z29.h, p7/m, z30.h, z31.h, #180
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z29.s, p7/m, z30.s, z31.s, #180
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z31.d, p7/m, z31.d, z31.d, #270
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z31.h, p7/m, z31.h, z31.h, #270
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z31.h, z31.h, z7.h[3], #270
+# CHECK-NEXT: - - - - - 1.50 1.50 - fcmla z31.s, p7/m, z31.s, z31.s, #270
+# CHECK-NEXT: - - - - - 1.00 - - fcmle p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmle p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmle p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmlt p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmlt p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmlt p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmne p0.d, p0/z, z0.d, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmne p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmne p0.h, p0/z, z0.h, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmne p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmne p0.s, p0/z, z0.s, #0.0
+# CHECK-NEXT: - - - - - 1.00 - - fcmne p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 1.00 - - fcmuo p0.d, p0/z, z0.d, z1.d
+# CHECK-NEXT: - - - - - 1.00 - - fcmuo p0.h, p0/z, z0.h, z1.h
+# CHECK-NEXT: - - - - - 1.00 - - fcmuo p0.s, p0/z, z0.s, z1.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvt z0.d, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvt z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvt z0.h, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvt z0.h, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvt z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvt z0.s, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.d, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.s, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzs z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.d, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.s, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fcvtzu z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 154.00 - - fdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 134.00 - - fdiv z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 98.00 - - fdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 154.00 - - fdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 134.00 - - fdivr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 98.00 - - fdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fexpa z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fexpa z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fexpa z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fmax z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmax z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fmax z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmax z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fmax z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmax z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fmax z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmax z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmax z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmaxnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmaxnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 5.50 5.50 - fmaxnmv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 5.50 5.50 - fmaxnmv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.50 4.50 - fmaxnmv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 5.50 5.50 - fmaxv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 5.50 5.50 - fmaxv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.50 4.50 - fmaxv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fmin z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmin z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fmin z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmin z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fmin z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmin z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fmin z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmin z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fmin z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fminnm z0.d, p0/m, z0.d, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminnm z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fminnm z0.h, p0/m, z0.h, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminnm z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fminnm z0.s, p0/m, z0.s, #0.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - fminnm z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fminnm z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fminnm z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fminnm z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 5.50 5.50 - fminnmv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 5.50 5.50 - fminnmv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.50 4.50 - fminnmv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 5.50 5.50 - fminv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 5.50 5.50 - fminv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.50 4.50 - fminv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmla z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmla z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmla z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmls z0.d, z1.d, z7.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmls z0.h, z1.h, z7.h[7]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmls z0.s, z1.s, z7.s[3]
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.d, #-10.00000000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.d, #0.12500000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.d, p0/m, #-10.00000000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.d, p0/m, #0.12500000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.h, #-0.12500000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.h, p0/m, #-0.12500000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.s, #-0.12500000
+# CHECK-NEXT: - - - - - 1.00 - - fmov z0.s, p0/m, #-0.12500000
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmul z0.d, z0.d, z0.d[0]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmul z0.h, z0.h, z0.h[0]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmul z0.s, z0.s, z0.s[0]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z31.d, p7/m, z31.d, #2.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmul z31.d, z31.d, z15.d[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z31.h, p7/m, z31.h, #2.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmul z31.h, z31.h, z7.h[7]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmul z31.s, p7/m, z31.s, #2.0
+# CHECK-NEXT: - - - - - 1.00 1.00 - fmul z31.s, z31.s, z7.s[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fmulx z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fneg z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmsb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmsb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fnmsb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpe z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - frecps z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - frecps z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - frecps z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpx z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpx z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frecpx z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinta z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frinti z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintm z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintn z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintp z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintx z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frintz z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - frsqrte z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - frsqrte z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - frsqrte z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - frsqrts z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - frsqrts z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - frsqrts z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fscale z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fscale z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fscale z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 154.00 - - fsqrt z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 134.00 - - fsqrt z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 98.00 - - fsqrt z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fsub z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fsub z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fsub z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsub z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fsub z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fsub z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fsub z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fsubr z0.d, p0/m, z0.d, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsubr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - fsubr z0.h, p0/m, z0.h, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsubr z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - fsubr z0.s, p0/m, z0.s, #0.5
+# CHECK-NEXT: - - - - - 0.50 0.50 - fsubr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - fsubr z31.d, p7/m, z31.d, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fsubr z31.h, p7/m, z31.h, #1.0
+# CHECK-NEXT: - - - - - 1.00 - - fsubr z31.s, p7/m, z31.s, #1.0
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftmad z0.d, z0.d, z31.d, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftmad z0.h, z0.h, z31.h, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftmad z0.s, z0.s, z31.s, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftsmul z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftsmul z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftsmul z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftssel z0.d, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftssel z0.h, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ftssel z0.s, z1.s, z31.s
+# CHECK-NEXT: - - - 0.50 0.50 - - - incb x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - incb x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - incb x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - incb x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - incb x0, vl1
+# CHECK-NEXT: - - - 0.50 0.50 - - - incd x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - incd x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - incd x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - incd x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - incd x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - incd z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - incd z0.d, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - inch x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - inch x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - inch x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - inch x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - inch x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - inch z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - inch z0.h, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp x0, p0.b
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp x0, p0.d
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp x0, p0.h
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp x0, p0.s
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp xzr, p15.b
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp xzr, p15.d
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp xzr, p15.h
+# CHECK-NEXT: - - - 1.00 1.00 - - 1.00 incp xzr, p15.s
+# CHECK-NEXT: - - - - - 1.00 - 1.00 incp z31.d, p15.d
+# CHECK-NEXT: - - - - - 1.00 - 1.00 incp z31.h, p15.h
+# CHECK-NEXT: - - - - - 1.00 - 1.00 incp z31.s, p15.s
+# CHECK-NEXT: - - - 0.50 0.50 - - - incw x0
+# CHECK-NEXT: - - - 0.50 0.50 - - - incw x0, #14
+# CHECK-NEXT: - - - 0.50 0.50 - - - incw x0, all, mul #16
+# CHECK-NEXT: - - - 0.50 0.50 - - - incw x0, pow2
+# CHECK-NEXT: - - - 0.50 0.50 - - - incw x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - incw z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - incw z0.s, all, mul #16
+# CHECK-NEXT: - - - - - 2.00 - - index z0.b, #0, #0
+# CHECK-NEXT: - - - - - 1.00 - - index z0.d, #0, #0
+# CHECK-NEXT: - - - - - 2.00 - - index z0.h, #0, #0
+# CHECK-NEXT: - - - 2.00 - 2.00 1.00 - index z0.h, w0, w0
+# CHECK-NEXT: - - - - - 1.00 - - index z0.s, #0, #0
+# CHECK-NEXT: - - - 2.00 - 2.00 1.00 - index z21.b, w10, w21
+# CHECK-NEXT: - - - 1.00 - 2.00 - - index z21.d, x10, x21
+# CHECK-NEXT: - - - 1.00 - 2.00 - - index z21.s, w10, w21
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z23.b, #13, w8
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z23.b, w13, #8
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z23.d, #13, x8
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z23.d, x13, #8
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z23.h, #13, w8
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z23.h, w13, #8
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z23.s, #13, w8
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z23.s, w13, #8
+# CHECK-NEXT: - - - - - 2.00 - - index z31.b, #-1, #-1
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z31.b, #-1, wzr
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z31.b, wzr, #-1
+# CHECK-NEXT: - - - 2.00 - 2.00 1.00 - index z31.b, wzr, wzr
+# CHECK-NEXT: - - - - - 1.00 - - index z31.d, #-1, #-1
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z31.d, #-1, xzr
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z31.d, xzr, #-1
+# CHECK-NEXT: - - - 1.00 - 2.00 - - index z31.d, xzr, xzr
+# CHECK-NEXT: - - - - - 2.00 - - index z31.h, #-1, #-1
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z31.h, #-1, wzr
+# CHECK-NEXT: - - - 2.00 - 2.00 - - index z31.h, wzr, #-1
+# CHECK-NEXT: - - - 2.00 - 2.00 1.00 - index z31.h, wzr, wzr
+# CHECK-NEXT: - - - - - 1.00 - - index z31.s, #-1, #-1
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z31.s, #-1, wzr
+# CHECK-NEXT: - - - 1.00 - 1.00 - - index z31.s, wzr, #-1
+# CHECK-NEXT: - - - 1.00 - 2.00 - - index z31.s, wzr, wzr
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z0.b, w0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z0.d, x0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z0.h, w0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z0.s, w0
+# CHECK-NEXT: - - - - - 1.00 - - insr z31.b, b31
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z31.b, wzr
+# CHECK-NEXT: - - - - - 1.00 - - insr z31.d, d31
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z31.d, xzr
+# CHECK-NEXT: - - - - - 1.00 - - insr z31.h, h31
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z31.h, wzr
+# CHECK-NEXT: - - - - - 1.00 - - insr z31.s, s31
+# CHECK-NEXT: - - - 1.00 - 1.00 - - insr z31.s, wzr
+# CHECK-NEXT: - - - - - 1.00 - - lasta b0, p7, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - lasta d0, p7, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - lasta h0, p7, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - lasta s0, p7, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lasta w0, p7, z31.b
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lasta w0, p7, z31.h
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lasta w0, p7, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lasta x0, p7, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - lastb b0, p7, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - lastb d0, p7, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - lastb h0, p7, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - lastb s0, p7, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lastb w0, p7, z31.b
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lastb w0, p7, z31.h
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lastb w0, p7, z31.s
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - lastb x0, p7, z31.d
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z0.b }, p0/z, [sp, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1b { z5.h }, p3/z, [x17, x16]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1d { z23.d }, p3/z, [sp, x8, lsl #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1d { z23.d }, p3/z, [x13, x8, lsl #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z5.h }, p3/z, [sp, x16, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1h { z5.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z31.b }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rd { z31.d }, p7/z, [sp, #504]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rh { z31.h }, p7/z, [sp, #126]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqb { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqb { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqb { z21.b }, p5/z, [x10, #112]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqb { z23.b }, p3/z, [x13, #-128]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqb { z31.b }, p7/z, [sp, #-16]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqd { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqd { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqd { z23.d }, p3/z, [x13, #-128]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqd { z23.d }, p3/z, [x13, #112]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqd { z31.d }, p7/z, [sp, #-16]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqh { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqh { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqh { z23.h }, p3/z, [x13, #-128]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqh { z23.h }, p3/z, [x13, #112]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqh { z31.h }, p7/z, [sp, #-16]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqw { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqw { z23.s }, p3/z, [x13, #-128]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqw { z23.s }, p3/z, [x13, #112]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rqw { z31.s }, p7/z, [sp, #-16]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsb { z31.d }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsb { z31.h }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsb { z31.s }, p7/z, [sp, #63]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsh { z31.d }, p7/z, [sp, #126]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsh { z31.s }, p7/z, [sp, #126]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rsw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rw { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rw { z31.d }, p7/z, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1rw { z31.s }, p7/z, [sp, #252]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z0.h }, p0/z, [sp, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z21.s }, p5/z, [x10, x21]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z23.d }, p3/z, [x13, x8]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z21.s }, p5/z, [sp, x21, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z21.s }, p5/z, [x10, x21, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z23.d }, p3/z, [x13, x8, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sw { z23.d }, p3/z, [sp, x8, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sw { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z21.s }, p5/z, [sp, x21, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z21.s }, p5/z, [x10, x21, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z23.d }, p3/z, [x13, x8, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ld1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ld1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ld1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ld1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ld1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2b { z0.b, z1.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2b { z0.b, z1.b }, p0/z, [x0]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2b { z21.b, z22.b }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2b { z23.b, z24.b }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2b { z5.b, z6.b }, p3/z, [x17, x16]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld2d { z0.d, z1.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - 1.00 1.00 - - - - - ld2d { z0.d, z1.d }, p0/z, [x0]
+# CHECK-NEXT: - 1.00 1.00 - - - - - ld2d { z21.d, z22.d }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - 1.00 1.00 - - - - - ld2d { z23.d, z24.d }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld2d { z5.d, z6.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2h { z0.h, z1.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2h { z0.h, z1.h }, p0/z, [x0]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2h { z21.h, z22.h }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2h { z23.h, z24.h }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - - - - ld2h { z5.h, z6.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld2w { z0.s, z1.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 1.00 1.00 - - - - - ld2w { z0.s, z1.s }, p0/z, [x0]
+# CHECK-NEXT: - 1.00 1.00 - - - - - ld2w { z21.s, z22.s }, p5/z, [x10, #10, mul vl]
+# CHECK-NEXT: - 1.00 1.00 - - - - - ld2w { z23.s, z24.s }, p3/z, [x13, #-16, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld2w { z5.s, z6.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3b { z0.b, z1.b, z2.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3b { z0.b, z1.b, z2.b }, p0/z, [x0]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3b { z21.b, z22.b, z23.b }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3b { z23.b, z24.b, z25.b }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3b { z5.b, z6.b, z7.b }, p3/z, [x17, x16]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld3d { z0.d, z1.d, z2.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld3d { z0.d, z1.d, z2.d }, p0/z, [x0]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld3d { z21.d, z22.d, z23.d }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld3d { z23.d, z24.d, z25.d }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld3d { z5.d, z6.d, z7.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3h { z0.h, z1.h, z2.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3h { z0.h, z1.h, z2.h }, p0/z, [x0]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3h { z21.h, z22.h, z23.h }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3h { z23.h, z24.h, z25.h }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - - - - ld3h { z5.h, z6.h, z7.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld3w { z0.s, z1.s, z2.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld3w { z0.s, z1.s, z2.s }, p0/z, [x0]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - - - - ld3w { z23.s, z24.s, z25.s }, p3/z, [x13, #-24, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld3w { z5.s, z6.s, z7.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4b { z23.b, z24.b, z25.b, z26.b }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4b { z5.b, z6.b, z7.b, z8.b }, p3/z, [x17, x16]
+# CHECK-NEXT: - 2.50 2.50 - - - - - ld4d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld4d { z0.d, z1.d, z2.d, z3.d }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld4d { z21.d, z22.d, z23.d, z24.d }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld4d { z23.d, z24.d, z25.d, z26.d }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - 2.50 2.50 - - - - - ld4d { z5.d, z6.d, z7.d, z8.d }, p3/z, [x17, x16, lsl #3]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - - - - ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
+# CHECK-NEXT: - 2.50 2.50 - - - - - ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld4w { z0.s, z1.s, z2.s, z3.s }, p0/z, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld4w { z21.s, z22.s, z23.s, z24.s }, p5/z, [x10, #20, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - - - - ld4w { z23.s, z24.s, z25.s, z26.s }, p3/z, [x13, #-32, mul vl]
+# CHECK-NEXT: - 2.50 2.50 - - - - - ld4w { z5.s, z6.s, z7.s, z8.s }, p3/z, [x17, x16, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1b { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1b { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z31.b }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1b { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1b { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z31.h }, p7/z, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1b { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1b { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1d { z0.d }, p0/z, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1d { z0.d }, p0/z, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1d { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1d { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1d { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1d { z23.d }, p3/z, [x13, z8.d, lsl #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1d { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1d { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1d { z31.d }, p7/z, [z31.d, #248]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1h { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1h { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1h { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1h { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1h { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1h { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1h { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1h { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1h { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1h { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1h { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1h { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1h { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1h { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1h { z31.h }, p7/z, [sp]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1h { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1h { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1h { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1h { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sb { z0.d }, p0/z, [x0, x0]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1sb { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sb { z0.h }, p0/z, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sb { z0.s }, p0/z, [x0, x0]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1sb { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1sb { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1sb { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sb { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sb { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sb { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sb { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1sb { z31.d }, p7/z, [z31.d, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sb { z31.h }, p7/z, [sp]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sb { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1sb { z31.s }, p7/z, [z31.s, #31]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sh { z0.d }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sh { z0.d }, p0/z, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sh { z0.d }, p0/z, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1sh { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sh { z0.s }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1sh { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1sh { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1sh { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sh { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sh { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sh { z23.d }, p3/z, [x13, z8.d, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sh { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sh { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1sh { z31.d }, p7/z, [z31.d, #62]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1sh { z31.s }, p7/z, [sp, z31.s, sxtw #1]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1sh { z31.s }, p7/z, [sp, z31.s, uxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sh { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1sh { z31.s }, p7/z, [z31.s, #62]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sw { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sw { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sw { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1sw { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sw { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sw { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sw { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1sw { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1sw { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1sw { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1w { z0.d }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1w { z0.d }, p0/z, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1w { z0.d }, p0/z, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1w { z0.d }, p0/z, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1w { z0.s }, p0/z, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1w { z0.s }, p0/z, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1w { z0.s }, p0/z, [z0.s]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1w { z21.d }, p5/z, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1w { z21.d }, p5/z, [x10, z21.d, uxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1w { z23.d }, p3/z, [x13, z8.d, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 1.00 - - ldff1w { z31.d }, p7/z, [sp, z31.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1w { z31.d }, p7/z, [sp]
+# CHECK-NEXT: - 2.00 2.00 - - 1.00 - - ldff1w { z31.d }, p7/z, [z31.d, #124]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1w { z31.s }, p7/z, [sp, z31.s, sxtw #2]
+# CHECK-NEXT: - 4.00 4.00 1.00 - 2.00 - - ldff1w { z31.s }, p7/z, [sp, z31.s, uxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldff1w { z31.s }, p7/z, [sp]
+# CHECK-NEXT: - 4.00 4.00 - - 2.00 - - ldff1w { z31.s }, p7/z, [z31.s, #124]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z21.b }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z31.b }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1b { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1d { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1d { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1h { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z21.h }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z31.h }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sb { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sh { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sh { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sh { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sh { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sh { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sh { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sw { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sw { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1sw { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1w { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1w { z21.d }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1w { z21.s }, p5/z, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1w { z31.d }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnf1w { z31.s }, p7/z, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1b { z0.b }, p0/z, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1b { z0.b }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1b { z21.b }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1b { z23.b }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1d { z0.d }, p0/z, [x0, x0, lsl #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1d { z0.d }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1d { z21.d }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1d { z23.d }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1h { z0.h }, p0/z, [x0, x0, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1h { z0.h }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1h { z21.h }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1h { z23.h }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1w { z0.s }, p0/z, [x0, x0, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1w { z0.s }, p0/z, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1w { z21.s }, p5/z, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - ldnt1w { z23.s }, p3/z, [x13, #-8, mul vl]
+# CHECK-NEXT: - 1.00 - - - - - - ldr p0, [x0]
+# CHECK-NEXT: - 1.00 - - - - - - ldr p5, [x10, #255, mul vl]
+# CHECK-NEXT: - 1.00 - - - - - - ldr p7, [x13, #-256, mul vl]
+# CHECK-NEXT: - 1.00 - - - - - - ldr z0, [x0]
+# CHECK-NEXT: - 1.00 - - - - - - ldr z23, [x13, #255, mul vl]
+# CHECK-NEXT: - 1.00 - - - - - - ldr z31, [sp, #-256, mul vl]
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.b, p0/m, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.b, z1.b, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.d, p0/m, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.h, p0/m, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.h, z1.h, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.s, p0/m, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z0.s, z1.s, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.b, p0/m, z31.b, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.b, z31.b, #7
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.d, p0/m, z31.d, #63
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.d, z31.d, #63
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.h, p0/m, z31.h, #15
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.h, z31.h, #15
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.s, p0/m, z31.s, #31
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsl z31.s, z31.s, #31
+# CHECK-NEXT: - - - - - 0.50 0.50 - lslr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - lslr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lslr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - lslr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.b, p0/m, z0.b, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.b, p0/m, z0.b, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.b, z0.b, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.b, z1.b, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.d, p0/m, z0.d, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.d, z0.d, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.h, p0/m, z0.h, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.h, p0/m, z0.h, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.h, z0.h, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.h, z1.h, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.s, p0/m, z0.s, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.s, p0/m, z0.s, z1.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.s, z0.s, #1
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z0.s, z1.s, z2.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.b, p0/m, z31.b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.b, z31.b, #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.d, p0/m, z31.d, #64
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.d, z31.d, #64
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.h, p0/m, z31.h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.h, z31.h, #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.s, p0/m, z31.s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsr z31.s, z31.s, #32
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsrr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsrr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsrr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - lsrr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - mad z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mad z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - mad z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - mad z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - mla z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mla z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - mla z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - mla z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - mls z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mls z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - mls z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - mls z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 mov p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 mov p0.b, p0/m, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 mov p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 mov p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 mov p15.b, p15/m, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 mov p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.b, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.b, b0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.b, p0/m, b0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z0.b, p0/m, w0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.b, p0/z, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.b, w0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, #0xe0000000000003ff
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, #0xffffffffffff7fff
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, #32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, d0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, p0/m, d0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z0.d, p0/m, x0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.d, x0
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, #-256
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, #32767
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, h0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, p0/m, h0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z0.h, p0/m, w0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, p0/z, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.h, w0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.q, q0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.s, #0xffff7fff
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.s, #32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.s, p0/m, s0
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z0.s, p0/m, w0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.s, s0
+# CHECK-NEXT: - - - - - 1.00 - - mov z0.s, w0
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, p0/z, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, p0/z, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, p0/z, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, p0/z, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, p15/m, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.d, p15/m, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, p0/z, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, p0/z, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, p0/z, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, p0/z, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, p15/m, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.h, p15/m, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, p0/z, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, p0/z, #-32768
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, p0/z, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, p0/z, #32512
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, p15/m, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z21.s, p15/m, #-32768
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov z31.b, p15/m, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.b, p7/m, b31
+# CHECK-NEXT: - - - - - - - - movprfx z31, z6
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z31.b, p7/m, wsp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.b, wsp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.b, z31.b[63]
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov z31.d, p15/m, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.d, p7/m, d31
+# CHECK-NEXT: - - - - - - - - movprfx z31.d, p7/z, z6.d
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z31.d, p7/m, sp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.d, sp
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov z31.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.d, z31.d[7]
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov z31.h, p15/m, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.h, p7/m, h31
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z31.h, p7/m, wsp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.h, wsp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.h, z31.h[31]
+# CHECK-NEXT: - - - - - 0.50 0.50 - mov z31.s, p15/m, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.s, p7/m, s31
+# CHECK-NEXT: - - - 1.00 - 1.00 - - mov z31.s, p7/m, wsp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.s, wsp
+# CHECK-NEXT: - - - - - 1.00 - - mov z31.s, z31.s[15]
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, #-1
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, p0/z, #-1
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, p0/z, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, p0/z, #127
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.b, p15/m, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.d, #-6
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.h, #-6
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.q, z17.q[3]
+# CHECK-NEXT: - - - - - 1.00 - - mov z5.s, #-6
+# CHECK-NEXT: - - - - - - - 1.00 movs p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 movs p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 movs p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 movs p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - - mrs x3, ID_AA64ZFR0_EL1
+# CHECK-NEXT: - - - - - - - - mrs x3, ZCR_EL1
+# CHECK-NEXT: - - - - - - - - mrs x3, ZCR_EL12
+# CHECK-NEXT: - - - - - - - - mrs x3, ZCR_EL2
+# CHECK-NEXT: - - - - - - - - mrs x3, ZCR_EL3
+# CHECK-NEXT: - - - - - 0.50 0.50 - msb z0.b, p7/m, z1.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - msb z0.d, p7/m, z1.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - msb z0.h, p7/m, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - msb z0.s, p7/m, z1.s, z31.s
+# CHECK-NEXT: - - - - - - - - msr ZCR_EL1, x3
+# CHECK-NEXT: - - - - - - - - msr ZCR_EL12, x3
+# CHECK-NEXT: - - - - - - - - msr ZCR_EL2, x3
+# CHECK-NEXT: - - - - - - - - msr ZCR_EL3, x3
+# CHECK-NEXT: - - - - - 0.50 0.50 - mul z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - mul z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - mul z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - mul z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.b, z31.b, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.b, z31.b, #127
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.d, z31.d, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.d, z31.d, #127
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.h, z31.h, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.h, z31.h, #127
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.s, z31.s, #-128
+# CHECK-NEXT: - - - - - 1.00 - - mul z31.s, z31.s, #127
+# CHECK-NEXT: - - - - - - - 1.00 nand p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 nand p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 nands p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 nands p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - neg z0.b, p0/m, z0.b
+# CHECK-NEXT: - - - - - 1.00 - - neg z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - neg z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - neg z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - neg z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - neg z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - neg z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - neg z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 nor p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 nor p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 nors p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 nors p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 not p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 not p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - not z31.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - not z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - not z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - not z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 nots p0.b, p0/z, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 nots p15.b, p15/z, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 orn p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 orn p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 orns p0.b, p0/z, p0.b, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 orns p15.b, p15/z, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 orr p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - 1.00 - - orr z0.d, z0.d, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - orr z0.d, z0.d, #0xfffffffffffffff9
+# CHECK-NEXT: - - - - - 1.00 - - orr z0.s, z0.s, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - orr z0.s, z0.s, #0xfffffff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - orr z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - 1.00 - - orr z23.h, z23.h, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - orr z23.h, z23.h, #0xfff9
+# CHECK-NEXT: - - - - - 0.50 0.50 - orr z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - orr z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - orr z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - orr z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - orr z5.b, z5.b, #0x6
+# CHECK-NEXT: - - - - - 1.00 - - orr z5.b, z5.b, #0xf9
+# CHECK-NEXT: - - - - - - - 1.00 orrs p0.b, p0/z, p0.b, p1.b
+# CHECK-NEXT: - - - - - 5.00 5.00 - orv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - orv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - orv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - orv s0, p7, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 pfalse p15.b
+# CHECK-NEXT: - - - - - - - 1.00 pfirst p0.b, p15, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 pfirst p15.b, p15, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 pnext p0.b, p15, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 pnext p0.d, p15, p0.d
+# CHECK-NEXT: - - - - - - - 1.00 pnext p0.h, p15, p0.h
+# CHECK-NEXT: - - - - - - - 1.00 pnext p0.s, p15, p0.s
+# CHECK-NEXT: - - - - - - - 1.00 pnext p15.b, p15, p15.b
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb #14, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb #15, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb #6, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb #7, p0, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfb #7, p3, [z13.s, #31]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfb #7, p3, [z13.s]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfb pldl1keep, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfb pldl1keep, p0, [x0, z0.d]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfb pldl1keep, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pldl3strm, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfb pldl3strm, p5, [x10, z21.d, sxtw]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfb pldl3strm, p5, [x10, z21.s, uxtw]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfb pldl3strm, p5, [z10.d, #31]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfb pldl3strm, p5, [z10.d]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pstl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pstl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pstl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pstl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pstl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfb pstl3strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd #14, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd #15, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfd #15, p7, [z31.d, #248]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfd #15, p7, [z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfd #15, p7, [z31.s, #248]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfd #15, p7, [z31.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd #6, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd #7, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfd pldl1keep, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfd pldl1keep, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfd pldl1keep, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfd pldl1keep, p0, [x0, z0.s, sxtw #3]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfd pldl1keep, p0, [x0, z0.s, uxtw #3]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pldl3strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pstl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pstl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pstl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pstl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pstl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfd pstl3strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh #14, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh #15, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfh #15, p7, [z31.d, #62]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfh #15, p7, [z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfh #15, p7, [z31.s, #62]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfh #15, p7, [z31.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh #6, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh #7, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfh pldl1keep, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pldl3strm, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfh pldl3strm, p5, [x10, z21.d, sxtw #1]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfh pldl3strm, p5, [x10, z21.d, uxtw #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfh pldl3strm, p5, [x10, z21.s, sxtw #1]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfh pldl3strm, p5, [x10, z21.s, uxtw #1]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pstl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pstl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pstl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pstl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pstl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfh pstl3strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw #14, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw #15, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfw #15, p7, [z31.d, #124]
+# CHECK-NEXT: - 1.00 1.00 - - 1.00 - - prfw #15, p7, [z31.d]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfw #15, p7, [z31.s, #124]
+# CHECK-NEXT: - 2.00 2.00 - - 2.00 - - prfw #15, p7, [z31.s]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw #6, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw #7, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfw #7, p3, [x13, z8.d, uxtw #2]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfw pldl1keep, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfw pldl1keep, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl1strm, p0, [x0, #-32, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl1strm, p0, [x0, #31, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pldl3strm, p0, [x0]
+# CHECK-NEXT: - 1.00 1.00 1.00 - 1.00 - - prfw pldl3strm, p5, [x10, z21.d, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 1.00 - 2.00 - - prfw pldl3strm, p5, [x10, z21.s, sxtw #2]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pstl1keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pstl1strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pstl2keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pstl2strm, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pstl3keep, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - - - - prfw pstl3strm, p0, [x0]
+# CHECK-NEXT: - - - - - - - 1.00 ptest p15, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 ptest p15, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p0.b, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p0.d, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p0.h, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p0.s, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p15.b
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p15.d
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p15.h
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p15.s
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #14
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #15
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #16
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #17
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #18
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #19
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #20
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #21
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #22
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #23
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #24
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #25
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #26
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #27
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, #28
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, mul3
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, mul4
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl1
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl128
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl16
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl2
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl256
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl3
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl32
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl4
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl5
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl6
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl64
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl7
+# CHECK-NEXT: - - - - - - - 1.00 ptrue p7.s, vl8
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p0.b, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p0.d, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p0.h, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p0.s, pow2
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p15.b
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p15.d
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p15.h
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p15.s
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #14
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #15
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #16
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #17
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #18
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #19
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #20
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #21
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #22
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #23
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #24
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #25
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #26
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #27
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, #28
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, mul3
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, mul4
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl1
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl128
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl16
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl2
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl256
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl3
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl32
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl4
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl5
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl6
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl64
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl7
+# CHECK-NEXT: - - - - - - - 1.00 ptrues p7.s, vl8
+# CHECK-NEXT: - - - - - - - 1.00 punpkhi p0.h, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 punpkhi p15.h, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 punpklo p0.h, p0.b
+# CHECK-NEXT: - - - - - - - 1.00 punpklo p15.h, p15.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rbit z0.b, p7/m, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - rbit z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - rbit z0.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - rbit z0.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 rdffr p0.b
+# CHECK-NEXT: - - - - - - - 1.00 rdffr p0.b, p0/z
+# CHECK-NEXT: - - - - - - - 1.00 rdffr p15.b
+# CHECK-NEXT: - - - - - - - 1.00 rdffr p15.b, p15/z
+# CHECK-NEXT: - - - - - - - 1.00 rdffrs p0.b, p0/z
+# CHECK-NEXT: - - - - - - - 1.00 rdffrs p15.b, p15/z
+# CHECK-NEXT: - - - 0.50 0.50 - - - rdvl x0, #0
+# CHECK-NEXT: - - - 0.50 0.50 - - - rdvl x21, #-32
+# CHECK-NEXT: - - - 0.50 0.50 - - - rdvl x23, #31
+# CHECK-NEXT: - - - 0.50 0.50 - - - rdvl xzr, #-1
+# CHECK-NEXT: - - - - - 1.00 - - rev z0.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - rev z0.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - rev z0.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - rev z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - revb z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - revb z0.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - revb z0.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - revh z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - revh z0.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - revw z0.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 5.00 5.00 - saddv d0, p7, z31.b
+# CHECK-NEXT: - - - - - 4.50 4.50 - saddv d0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - saddv d0, p7, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - scvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 178.00 - - sdiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 114.00 - - sdiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 178.00 - - sdivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 114.00 - - sdivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - sdot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sdot z0.d, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sdot z0.s, z1.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 1.00 - sdot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sel z23.b, p11, z13.b, z8.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sel z23.d, p11, z13.d, z8.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sel z23.h, p11, z13.h, z8.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sel z23.s, p11, z13.s, z8.s
+# CHECK-NEXT: - - - - - - - - setffr
+# CHECK-NEXT: - - - - - 1.00 - - smax z0.b, z0.b, #-128
+# CHECK-NEXT: - - - - - 1.00 - - smax z0.d, z0.d, #-128
+# CHECK-NEXT: - - - - - 1.00 - - smax z0.h, z0.h, #-128
+# CHECK-NEXT: - - - - - 1.00 - - smax z0.s, z0.s, #-128
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - smax z31.b, z31.b, #127
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - smax z31.d, z31.d, #127
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - smax z31.h, z31.h, #127
+# CHECK-NEXT: - - - - - 0.50 0.50 - smax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - smax z31.s, z31.s, #127
+# CHECK-NEXT: - - - - - 5.00 5.00 - smaxv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - smaxv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - smaxv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - smaxv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - smin z0.b, z0.b, #-128
+# CHECK-NEXT: - - - - - 1.00 - - smin z0.d, z0.d, #-128
+# CHECK-NEXT: - - - - - 1.00 - - smin z0.h, z0.h, #-128
+# CHECK-NEXT: - - - - - 1.00 - - smin z0.s, z0.s, #-128
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - smin z31.b, z31.b, #127
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - smin z31.d, z31.d, #127
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - smin z31.h, z31.h, #127
+# CHECK-NEXT: - - - - - 0.50 0.50 - smin z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - smin z31.s, z31.s, #127
+# CHECK-NEXT: - - - - - 5.00 5.00 - sminv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - sminv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - sminv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - sminv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - smulh z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - smulh z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - smulh z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - smulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - splice z31.b, p7, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - splice z31.d, p7, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - splice z31.h, p7, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - splice z31.s, p7, z31.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqadd z31.s, z31.s, #65280
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecb x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecd x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecd z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecd z0.d, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecd z0.d, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecd z0.d, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdech x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdech z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdech z0.h, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdech z0.h, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdech z0.h, pow2, mul #16
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp x0, p0.b
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp x0, p0.d
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp x0, p0.h
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp x0, p0.s
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp xzr, p15.b, wzr
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp xzr, p15.d, wzr
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp xzr, p15.h, wzr
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqdecp xzr, p15.s, wzr
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - sqdecp z0.d, p0.d
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - sqdecp z0.h, p0.h
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - sqdecp z0.s, p0.s
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqdecw x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecw z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecw z0.s, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecw z0.s, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqdecw z0.s, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincb x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincd x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincd z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincd z0.d, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincd z0.d, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincd z0.d, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqinch x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqinch z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqinch z0.h, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqinch z0.h, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqinch z0.h, pow2, mul #16
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp x0, p0.b
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp x0, p0.d
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp x0, p0.h
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp x0, p0.s
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp xzr, p15.b, wzr
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp xzr, p15.d, wzr
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp xzr, p15.h, wzr
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - sqincp xzr, p15.s, wzr
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - sqincp z0.d, p0.d
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - sqincp z0.h, p0.h
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - sqincp z0.s, p0.s
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - sqincw x0, w0, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincw z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincw z0.s, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincw z0.s, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqincw z0.s, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sqsub z31.s, z31.s, #65280
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.b }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.d }, p0, [x0, x0]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1b { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1b { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1b { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.d }, p0, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1b { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.h }, p0, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.h }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.s }, p0, [x0, x0]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1b { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1b { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z0.s }, p0, [x0]
+# CHECK-NEXT: - 8.00 8.00 - - 12.00 - - st1b { z0.s }, p7, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z21.b }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z31.b }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1b { z31.d }, p7, [z31.d, #31]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1b { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 8.00 8.00 - - 12.00 - - st1b { z31.s }, p7, [z31.s, #31]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1d { z0.d }, p0, [x0, z0.d, lsl #3]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1d { z0.d }, p0, [x0, z0.d, sxtw #3]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1d { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1d { z0.d }, p0, [x0, z0.d, uxtw #3]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1d { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1d { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1d { z0.d }, p0, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1d { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1d { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1d { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1d { z31.d }, p7, [z31.d, #248]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z0.d }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1h { z0.d }, p0, [x0, z0.d, lsl #1]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1h { z0.d }, p0, [x0, z0.d, sxtw #1]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1h { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1h { z0.d }, p0, [x0, z0.d, uxtw #1]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1h { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1h { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z0.d }, p0, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1h { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z0.h }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z0.s }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1h { z0.s }, p0, [x0, z0.s, sxtw #1]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1h { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1h { z0.s }, p0, [x0, z0.s, uxtw #1]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1h { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z0.s }, p0, [x0]
+# CHECK-NEXT: - 8.00 8.00 - - 12.00 - - st1h { z0.s }, p7, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z21.h }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1h { z31.d }, p7, [z31.d, #62]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z31.h }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1h { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 8.00 8.00 - - 12.00 - - st1h { z31.s }, p7, [z31.s, #62]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z0.d }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1w { z0.d }, p0, [x0, z0.d, lsl #2]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1w { z0.d }, p0, [x0, z0.d, sxtw #2]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1w { z0.d }, p0, [x0, z0.d, sxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1w { z0.d }, p0, [x0, z0.d, uxtw #2]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1w { z0.d }, p0, [x0, z0.d, uxtw]
+# CHECK-NEXT: - 4.00 4.00 4.00 - 4.00 - - st1w { z0.d }, p0, [x0, z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z0.d }, p0, [x0]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1w { z0.d }, p7, [z0.d]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1w { z0.s }, p0, [x0, z0.s, sxtw #2]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1w { z0.s }, p0, [x0, z0.s, sxtw]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1w { z0.s }, p0, [x0, z0.s, uxtw #2]
+# CHECK-NEXT: - 8.00 8.00 8.00 - 8.00 - - st1w { z0.s }, p0, [x0, z0.s, uxtw]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z0.s }, p0, [x0]
+# CHECK-NEXT: - 8.00 8.00 - - 12.00 - - st1w { z0.s }, p7, [z0.s]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z21.d }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z21.s }, p5, [x10, #5, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z31.d }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 4.00 4.00 - - 4.00 - - st1w { z31.d }, p7, [z31.d, #124]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - st1w { z31.s }, p7, [sp, #-1, mul vl]
+# CHECK-NEXT: - 8.00 8.00 - - 12.00 - - st1w { z31.s }, p7, [z31.s, #124]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2b { z0.b, z1.b }, p0, [x0, x0]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2b { z0.b, z1.b }, p0, [x0]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2b { z21.b, z22.b }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2b { z23.b, z24.b }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2b { z5.b, z6.b }, p3, [x17, x16]
+# CHECK-NEXT: - 1.00 1.00 - - 2.00 - - st2d { z0.d, z1.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - 1.50 1.50 - - 2.00 - - st2d { z0.d, z1.d }, p0, [x0]
+# CHECK-NEXT: - 1.50 1.50 - - 2.00 - - st2d { z21.d, z22.d }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - 2.00 - - st2d { z23.d, z24.d }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - 1.00 1.00 - - 2.00 - - st2d { z5.d, z6.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2h { z0.h, z1.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2h { z0.h, z1.h }, p0, [x0]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2h { z21.h, z22.h }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2h { z23.h, z24.h }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - 4.50 4.50 - - 8.00 - - st2h { z5.h, z6.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: - 1.00 1.00 - - 2.00 - - st2w { z0.s, z1.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - 1.50 1.50 - - 2.00 - - st2w { z0.s, z1.s }, p0, [x0]
+# CHECK-NEXT: - 1.50 1.50 - - 2.00 - - st2w { z21.s, z22.s }, p5, [x10, #10, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - 2.00 - - st2w { z23.s, z24.s }, p3, [x13, #-16, mul vl]
+# CHECK-NEXT: - 1.00 1.00 - - 2.00 - - st2w { z5.s, z6.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3b { z0.b, z1.b, z2.b }, p0, [x0, x0]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3b { z0.b, z1.b, z2.b }, p0, [x0]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3b { z21.b, z22.b, z23.b }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3b { z23.b, z24.b, z25.b }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3b { z5.b, z6.b, z7.b }, p3, [x17, x16]
+# CHECK-NEXT: - 1.50 1.50 - - 3.00 - - st3d { z0.d, z1.d, z2.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - 2.00 2.00 - - 3.00 - - st3d { z0.d, z1.d, z2.d }, p0, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 3.00 - - st3d { z21.d, z22.d, z23.d }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - 3.00 - - st3d { z23.d, z24.d, z25.d }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - 3.00 - - st3d { z5.d, z6.d, z7.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3h { z0.h, z1.h, z2.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3h { z0.h, z1.h, z2.h }, p0, [x0]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3h { z21.h, z22.h, z23.h }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3h { z23.h, z24.h, z25.h }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - 6.50 6.50 - - 12.00 - - st3h { z5.h, z6.h, z7.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: - 1.50 1.50 - - 3.00 - - st3w { z0.s, z1.s, z2.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - 2.00 2.00 - - 3.00 - - st3w { z0.s, z1.s, z2.s }, p0, [x0]
+# CHECK-NEXT: - 2.00 2.00 - - 3.00 - - st3w { z21.s, z22.s, z23.s }, p5, [x10, #15, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - 3.00 - - st3w { z23.s, z24.s, z25.s }, p3, [x13, #-24, mul vl]
+# CHECK-NEXT: - 1.50 1.50 - - 3.00 - - st3w { z5.s, z6.s, z7.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x0, x0]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4b { z0.b, z1.b, z2.b, z3.b }, p0, [x0]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4b { z21.b, z22.b, z23.b, z24.b }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4b { z23.b, z24.b, z25.b, z26.b }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4b { z5.b, z6.b, z7.b, z8.b }, p3, [x17, x16]
+# CHECK-NEXT: - 2.00 2.00 - - 4.00 - - st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - 2.50 2.50 - - 4.00 - - st4d { z0.d, z1.d, z2.d, z3.d }, p0, [x0]
+# CHECK-NEXT: - 2.50 2.50 - - 4.00 - - st4d { z21.d, z22.d, z23.d, z24.d }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - 2.50 2.50 - - 4.00 - - st4d { z23.d, z24.d, z25.d, z26.d }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - 4.00 - - st4d { z5.d, z6.d, z7.d, z8.d }, p3, [x17, x16, lsl #3]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4h { z0.h, z1.h, z2.h, z3.h }, p0, [x0]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4h { z21.h, z22.h, z23.h, z24.h }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4h { z23.h, z24.h, z25.h, z26.h }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - 8.50 8.50 - - 16.00 - - st4h { z5.h, z6.h, z7.h, z8.h }, p3, [x17, x16, lsl #1]
+# CHECK-NEXT: - 2.00 2.00 - - 4.00 - - st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - 2.50 2.50 - - 4.00 - - st4w { z0.s, z1.s, z2.s, z3.s }, p0, [x0]
+# CHECK-NEXT: - 2.50 2.50 - - 4.00 - - st4w { z21.s, z22.s, z23.s, z24.s }, p5, [x10, #20, mul vl]
+# CHECK-NEXT: - 2.50 2.50 - - 4.00 - - st4w { z23.s, z24.s, z25.s, z26.s }, p3, [x13, #-32, mul vl]
+# CHECK-NEXT: - 2.00 2.00 - - 4.00 - - st4w { z5.s, z6.s, z7.s, z8.s }, p3, [x17, x16, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1b { z0.b }, p0, [x0, x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1b { z0.b }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1b { z21.b }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1b { z23.b }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1d { z0.d }, p0, [x0, x0, lsl #3]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1d { z0.d }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1d { z21.d }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1d { z23.d }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1h { z0.h }, p0, [x0, x0, lsl #1]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1h { z0.h }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1h { z21.h }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1h { z23.h }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1w { z0.s }, p0, [x0, x0, lsl #2]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1w { z0.s }, p0, [x0]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1w { z21.s }, p5, [x10, #7, mul vl]
+# CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stnt1w { z23.s }, p3, [x13, #-8, mul vl]
+# CHECK-NEXT: - 1.00 - - - - 1.00 - str p0, [x0]
+# CHECK-NEXT: - 1.00 - - - - 1.00 - str p15, [sp, #-256, mul vl]
+# CHECK-NEXT: - 1.00 - - - - 1.00 - str p5, [x10, #255, mul vl]
+# CHECK-NEXT: - 1.00 - - - 1.00 - - str z0, [x0]
+# CHECK-NEXT: - 1.00 - - - 1.00 - - str z21, [x10, #-256, mul vl]
+# CHECK-NEXT: - 1.00 - - - 1.00 - - str z31, [sp, #255, mul vl]
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - - sub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.b, p5/m, z21.b, z10.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.b, z10.b, z21.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.d, p5/m, z21.d, z10.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.d, z10.d, z21.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.h, p5/m, z21.h, z10.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.h, z10.h, z21.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.s, p5/m, z21.s, z10.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z21.s, z10.s, z21.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.b, p3/m, z23.b, z13.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.b, z13.b, z8.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.d, p3/m, z23.d, z13.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.d, z13.d, z8.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.h, p3/m, z23.h, z13.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.h, z13.h, z8.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.s, p3/m, z23.s, z13.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z23.s, z13.s, z8.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - sub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - sub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - sub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - sub z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - sub z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - subr z0.b, p0/m, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - subr z0.d, p0/m, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - subr z0.h, p0/m, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - subr z0.s, p0/m, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 1.00 - - subr z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 1.00 - - subr z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 1.00 - - subr z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 1.00 - - subr z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 1.00 - - subr z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - 1.00 - - sunpkhi z31.d, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - sunpkhi z31.h, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - sunpkhi z31.s, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - sunpklo z31.d, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - sunpklo z31.h, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - sunpklo z31.s, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxth z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxth z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxth z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxth z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - sxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - tbl z31.b, { z31.b }, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - tbl z31.d, { z31.d }, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - tbl z31.h, { z31.h }, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - tbl z31.s, { z31.s }, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 trn1 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 trn1 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - 1.00 trn1 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - 1.00 trn1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - 1.00 - - trn1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - trn1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - trn1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - trn1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - - - 1.00 trn2 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - - - 1.00 trn2 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - - - 1.00 trn2 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - - - 1.00 trn2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - 1.00 - - trn2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - trn2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - trn2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - trn2 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabd z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabd z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabd z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uabd z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 5.00 5.00 - uaddv d0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - uaddv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - uaddv d0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - uaddv d0, p7, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.d, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.h, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.h, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.s, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - ucvtf z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 178.00 - - udiv z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 114.00 - - udiv z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 178.00 - - udivr z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 114.00 - - udivr z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 1.00 - udot z0.d, z1.h, z15.h[1]
+# CHECK-NEXT: - - - - - 0.50 0.50 - udot z0.d, z1.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - udot z0.s, z1.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 1.00 - udot z0.s, z1.b, z7.b[3]
+# CHECK-NEXT: - - - - - 1.00 - - umax z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - umax z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umax z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 5.00 5.00 - umaxv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - umaxv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - umaxv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - umaxv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - umin z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin z31.b, p7/m, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - umin z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin z31.d, p7/m, z31.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin z31.h, p7/m, z31.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umin z31.s, p7/m, z31.s, z31.s
+# CHECK-NEXT: - - - - - 5.00 5.00 - uminv b0, p7, z31.b
+# CHECK-NEXT: - - - - - 3.50 3.50 - uminv d0, p7, z31.d
+# CHECK-NEXT: - - - - - 4.50 4.50 - uminv h0, p7, z31.h
+# CHECK-NEXT: - - - - - 4.00 4.00 - uminv s0, p7, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - umulh z0.b, p7/m, z0.b, z31.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - umulh z0.d, p7/m, z0.d, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - umulh z0.h, p7/m, z0.h, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - umulh z0.s, p7/m, z0.s, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqadd z31.s, z31.s, #65280
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecb x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecd x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecd z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecd z0.d, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecd z0.d, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecd z0.d, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdech x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdech z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdech z0.h, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdech z0.h, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdech z0.h, pow2, mul #16
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp wzr, p15.b
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp wzr, p15.d
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp wzr, p15.h
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp wzr, p15.s
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp x0, p0.b
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp x0, p0.d
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp x0, p0.h
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqdecp x0, p0.s
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - uqdecp z0.d, p0.d
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - uqdecp z0.h, p0.h
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - uqdecp z0.s, p0.s
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqdecw x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecw z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecw z0.s, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecw z0.s, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqdecw z0.s, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincb x0, vl1
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincd x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincd z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincd z0.d, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincd z0.d, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincd z0.d, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqinch x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqinch z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqinch z0.h, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqinch z0.h, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqinch z0.h, pow2, mul #16
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp wzr, p15.b
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp wzr, p15.d
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp wzr, p15.h
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp wzr, p15.s
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp x0, p0.b
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp x0, p0.d
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp x0, p0.h
+# CHECK-NEXT: - - - 1.50 1.50 - 1.00 - uqincp x0, p0.s
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - uqincp z0.d, p0.d
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - uqincp z0.h, p0.h
+# CHECK-NEXT: - - - 0.50 0.50 - 1.00 - uqincp z0.s, p0.s
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw w0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw w0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw w0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw w0, pow2, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw x0
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw x0, #14
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw x0, all, mul #16
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw x0, pow2
+# CHECK-NEXT: - - - 1.00 1.00 - - - uqincw x0, vl1
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincw z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincw z0.s, all, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincw z0.s, pow2
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqincw z0.s, pow2, mul #16
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.b, z0.b, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.d, z0.d, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.d, z0.d, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.h, z0.h, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.h, z0.h, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.s, z0.s, #0
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.s, z0.s, #0, lsl #8
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z31.b, z31.b, #255
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z31.d, z31.d, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z31.h, z31.h, #65280
+# CHECK-NEXT: - - - - - 0.50 0.50 - uqsub z31.s, z31.s, #65280
+# CHECK-NEXT: - - - - - 1.00 - - uunpkhi z31.d, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - uunpkhi z31.h, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - uunpkhi z31.s, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - uunpklo z31.d, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - uunpklo z31.h, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - uunpklo z31.s, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtb z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtb z0.h, p0/m, z0.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtb z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtb z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtb z31.h, p7/m, z31.h
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtb z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxth z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxth z0.s, p0/m, z0.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxth z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxth z31.s, p7/m, z31.s
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtw z0.d, p0/m, z0.d
+# CHECK-NEXT: - - - - - 0.50 0.50 - uxtw z31.d, p7/m, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - uzp1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - uzp2 z31.s, z31.s, z31.s
+# CHECK-NEXT: - 1.00 - - - - 1.00 - wrffr p0.b
+# CHECK-NEXT: - 1.00 - - - - 1.00 - wrffr p15.b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p0.b, p0.b, p0.b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p0.d, p0.d, p0.d
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p0.h, p0.h, p0.h
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p0.s, p0.s, p0.s
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - 1.00 - - zip1 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - zip1 z31.s, z31.s, z31.s
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p0.b, p0.b, p0.b
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p0.d, p0.d, p0.d
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p0.h, p0.h, p0.h
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p0.s, p0.s, p0.s
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p15.b, p15.b, p15.b
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p15.d, p15.d, p15.d
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p15.h, p15.h, p15.h
+# CHECK-NEXT: - - - - - 1.00 - - zip2 p15.s, p15.s, p15.s
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z0.b, z0.b, z0.b
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z0.d, z0.d, z0.d
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z0.h, z0.h, z0.h
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z0.s, z0.s, z0.s
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z31.b, z31.b, z31.b
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z31.d, z31.d, z31.d
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z31.h, z31.h, z31.h
+# CHECK-NEXT: - - - - - 1.00 - - zip2 z31.s, z31.s, z31.s
projects / platform / upstream / llvm.git / commitdiff