L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
+ARM/AFEB9260 MACHINE SUPPORT
+P: Sergey Lapin
+M: slapin@ossfans.org
+L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
+S: Maintained
+
ARM/AJECO 1ARM MACHINE SUPPORT
P: Lennert Buytenhek
M: kernel@wantstofly.org
config ZONE_DMA
bool
- default y
config GENERIC_ISA_DMA
bool
config OPROFILE_ARM11_CORE
bool
+config OPROFILE_ARMV7
+ def_bool y
+ depends on CPU_V7 && !SMP
+ bool
+
endif
config VECTORS_BASE
select TIMER_ACORN
select ISA
select NO_IOPORT
+ select ARCH_SPARSEMEM_ENABLE
help
Support for the Cirrus Logic PS7500FE system-on-a-chip.
select PLAT_IOP
select PCI
select ARCH_SUPPORTS_MSI
+ select VMSPLIT_1G
help
Support for Intel's IOP13XX (XScale) family of processors.
select GENERIC_GPIO
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
+ select ZONE_DMA if PCI
help
Support for Intel's IXP4XX (XScale) family of processors.
select HAVE_PATA_PLATFORM
select ISA_DMA_API
select NO_IOPORT
+ select ARCH_SPARSEMEM_ENABLE
help
On the Acorn Risc-PC, Linux can support the internal IDE disk and
CD-ROM interface, serial and parallel port, and the floppy drive.
config ARCH_SA1100
bool "SA1100-based"
select ISA
- select ARCH_DISCONTIGMEM_ENABLE
select ARCH_SPARSEMEM_ENABLE
- select ARCH_SELECT_MEMORY_MODEL
select ARCH_MTD_XIP
select GENERIC_GPIO
select GENERIC_TIME
bool "Shark"
select ISA
select ISA_DMA
+ select ZONE_DMA
select PCI
help
Support for the StrongARM based Digital DNARD machine, also known
config ARCH_LH7A40X
bool "Sharp LH7A40X"
+ select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
+ select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
help
Say Y here for systems based on one of the Sharp LH7A40X
System on a Chip processors. These CPUs include an ARM922T
select GENERIC_CLOCKEVENTS
select GENERIC_GPIO
select HAVE_CLK
+ select ZONE_DMA
help
Support for TI's DaVinci platform.
If you don't know what to do here, say N.
+choice
+ prompt "Memory split"
+ default VMSPLIT_3G
+ help
+ Select the desired split between kernel and user memory.
+
+ If you are not absolutely sure what you are doing, leave this
+ option alone!
+
+ config VMSPLIT_3G
+ bool "3G/1G user/kernel split"
+ config VMSPLIT_2G
+ bool "2G/2G user/kernel split"
+ config VMSPLIT_1G
+ bool "1G/3G user/kernel split"
+endchoice
+
+config PAGE_OFFSET
+ hex
+ default 0x40000000 if VMSPLIT_1G
+ default 0x80000000 if VMSPLIT_2G
+ default 0xC0000000
+
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
default y
depends on FLATMEM
+# Discontigmem is deprecated
config ARCH_DISCONTIGMEM_ENABLE
bool
- default (ARCH_LH7A40X && !LH7A40X_CONTIGMEM)
- help
- Say Y to support efficient handling of discontiguous physical memory,
- for architectures which are either NUMA (Non-Uniform Memory Access)
- or have huge holes in the physical address space for other reasons.
- See <file:Documentation/vm/numa> for more.
config ARCH_SPARSEMEM_ENABLE
bool
+config ARCH_SPARSEMEM_DEFAULT
+ def_bool ARCH_SPARSEMEM_ENABLE
+
config ARCH_SELECT_MEMORY_MODEL
- bool
+ def_bool ARCH_DISCONTIGMEM_ENABLE && ARCH_SPARSEMEM_ENABLE
config NODES_SHIFT
int
endmenu
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
+menu "CPU Power Management"
-menu "CPU Frequency scaling"
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA)
source "drivers/cpufreq/Kconfig"
default y
select CPU_FREQ_DEFAULT_GOV_USERSPACE
-endmenu
-
endif
+source "drivers/cpuidle/Kconfig"
+
+endmenu
+
menu "Floating point emulation"
comment "At least one emulation must be selected"
source "drivers/hwmon/Kconfig"
+source "drivers/thermal/Kconfig"
+
source "drivers/watchdog/Kconfig"
source "drivers/ssb/Kconfig"
source "drivers/mmc/Kconfig"
+source "drivers/memstick/Kconfig"
+
+source "drivers/accessibility/Kconfig"
+
source "drivers/leds/Kconfig"
source "drivers/rtc/Kconfig"
source "drivers/dca/Kconfig"
+source "drivers/auxdisplay/Kconfig"
+
source "drivers/regulator/Kconfig"
source "drivers/uio/Kconfig"
# Note that GCC does not numerically define an architecture version
# macro, but instead defines a whole series of macros which makes
# testing for a specific architecture or later rather impossible.
-arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7a,-march=armv5t -Wa$(comma)-march=armv7a)
+arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a)
arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
# Only override the compiler option if ARMv6. The ARMv6K extensions are
# always available in ARMv7
endif
EXTRA_CFLAGS := -fpic -fno-builtin
-EXTRA_AFLAGS :=
+EXTRA_AFLAGS := -Wa,-march=all
# Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via
# linker symbols. We only define initrd_phys and params_phys if the
add r1, r1, #1048576
str r1, [r0]
mov pc, lr
+ENDPROC(__setup_mmu)
__armv4_mmu_cache_on:
mov r12, lr
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff
ands r4, r4, r1, lsr #3 @ find maximum number on the way size
- .word 0xe16f5f14 @ clz r5, r4 - find bit position of way size increment
+ clz r5, r4 @ find bit position of way size increment
ldr r7, =0x7fff
ands r7, r7, r1, lsr #13 @ extract max number of the index size
loop2:
config SA1111
bool
- select DMABOUNCE
+ select DMABOUNCE if !ARCH_PXA
+ select ZONE_DMA if !ARCH_PXA
config DMABOUNCE
bool
#endif
write_lock_irqsave(&device_info->lock, flags);
-
list_add(&buf->node, &device_info->safe_buffers);
-
write_unlock_irqrestore(&device_info->lock, flags);
return buf;
/* ************************************************** */
-static inline dma_addr_t
-map_single(struct device *dev, void *ptr, size_t size,
+static struct safe_buffer *find_safe_buffer_dev(struct device *dev,
+ dma_addr_t dma_addr, const char *where)
+{
+ if (!dev || !dev->archdata.dmabounce)
+ return NULL;
+ if (dma_mapping_error(dev, dma_addr)) {
+ if (dev)
+ dev_err(dev, "Trying to %s invalid mapping\n", where);
+ else
+ pr_err("unknown device: Trying to %s invalid mapping\n", where);
+ return NULL;
+ }
+ return find_safe_buffer(dev->archdata.dmabounce, dma_addr);
+}
+
+static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction dir)
{
struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
return dma_addr;
}
-static inline void
-unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
- enum dma_data_direction dir)
+static inline void unmap_single(struct device *dev, dma_addr_t dma_addr,
+ size_t size, enum dma_data_direction dir)
{
- struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
- struct safe_buffer *buf = NULL;
-
- /*
- * Trying to unmap an invalid mapping
- */
- if (dma_mapping_error(dev, dma_addr)) {
- dev_err(dev, "Trying to unmap invalid mapping\n");
- return;
- }
-
- if (device_info)
- buf = find_safe_buffer(device_info, dma_addr);
+ struct safe_buffer *buf = find_safe_buffer_dev(dev, dma_addr, "unmap");
if (buf) {
BUG_ON(buf->size != size);
+ BUG_ON(buf->direction != dir);
dev_dbg(dev,
"%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
__func__, buf->ptr, virt_to_dma(dev, buf->ptr),
buf->safe, buf->safe_dma_addr);
- DO_STATS ( device_info->bounce_count++ );
+ DO_STATS(dev->archdata.dmabounce->bounce_count++);
if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
void *ptr = buf->ptr;
dmac_clean_range(ptr, ptr + size);
outer_clean_range(__pa(ptr), __pa(ptr) + size);
}
- free_safe_buffer(device_info, buf);
- }
-}
-
-static int sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
- enum dma_data_direction dir)
-{
- struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
- struct safe_buffer *buf = NULL;
-
- if (device_info)
- buf = find_safe_buffer(device_info, dma_addr);
-
- if (buf) {
- /*
- * Both of these checks from original code need to be
- * commented out b/c some drivers rely on the following:
- *
- * 1) Drivers may map a large chunk of memory into DMA space
- * but only sync a small portion of it. Good example is
- * allocating a large buffer, mapping it, and then
- * breaking it up into small descriptors. No point
- * in syncing the whole buffer if you only have to
- * touch one descriptor.
- *
- * 2) Buffers that are mapped as DMA_BIDIRECTIONAL are
- * usually only synced in one dir at a time.
- *
- * See drivers/net/eepro100.c for examples of both cases.
- *
- * -ds
- *
- * BUG_ON(buf->size != size);
- * BUG_ON(buf->direction != dir);
- */
-
- dev_dbg(dev,
- "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
- __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
- buf->safe, buf->safe_dma_addr);
-
- DO_STATS ( device_info->bounce_count++ );
-
- switch (dir) {
- case DMA_FROM_DEVICE:
- dev_dbg(dev,
- "%s: copy back safe %p to unsafe %p size %d\n",
- __func__, buf->safe, buf->ptr, size);
- memcpy(buf->ptr, buf->safe, size);
- break;
- case DMA_TO_DEVICE:
- dev_dbg(dev,
- "%s: copy out unsafe %p to safe %p, size %d\n",
- __func__,buf->ptr, buf->safe, size);
- memcpy(buf->safe, buf->ptr, size);
- break;
- case DMA_BIDIRECTIONAL:
- BUG(); /* is this allowed? what does it mean? */
- default:
- BUG();
- }
- /*
- * No need to sync the safe buffer - it was allocated
- * via the coherent allocators.
- */
- return 0;
- } else {
- return 1;
+ free_safe_buffer(dev->archdata.dmabounce, buf);
}
}
* substitute the safe buffer for the unsafe one.
* (basically move the buffer from an unsafe area to a safe one)
*/
-dma_addr_t
-dma_map_single(struct device *dev, void *ptr, size_t size,
+dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
enum dma_data_direction dir)
{
- dma_addr_t dma_addr;
-
dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
__func__, ptr, size, dir);
- BUG_ON(dir == DMA_NONE);
+ BUG_ON(!valid_dma_direction(dir));
- dma_addr = map_single(dev, ptr, size, dir);
+ return map_single(dev, ptr, size, dir);
+}
+EXPORT_SYMBOL(dma_map_single);
- return dma_addr;
+dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size, enum dma_data_direction dir)
+{
+ dev_dbg(dev, "%s(page=%p,off=%#lx,size=%zx,dir=%x)\n",
+ __func__, page, offset, size, dir);
+
+ BUG_ON(!valid_dma_direction(dir));
+
+ return map_single(dev, page_address(page) + offset, size, dir);
}
+EXPORT_SYMBOL(dma_map_page);
/*
* see if a mapped address was really a "safe" buffer and if so, copy
* should be)
*/
-void
-dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
- enum dma_data_direction dir)
+void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+ enum dma_data_direction dir)
{
dev_dbg(dev, "%s(ptr=%p,size=%d,dir=%x)\n",
__func__, (void *) dma_addr, size, dir);
- BUG_ON(dir == DMA_NONE);
-
unmap_single(dev, dma_addr, size, dir);
}
+EXPORT_SYMBOL(dma_unmap_single);
-int
-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
+int dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
+ unsigned long off, size_t sz, enum dma_data_direction dir)
{
- int i;
-
- dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
- __func__, sg, nents, dir);
-
- BUG_ON(dir == DMA_NONE);
-
- for (i = 0; i < nents; i++, sg++) {
- struct page *page = sg_page(sg);
- unsigned int offset = sg->offset;
- unsigned int length = sg->length;
- void *ptr = page_address(page) + offset;
+ struct safe_buffer *buf;
- sg->dma_address =
- map_single(dev, ptr, length, dir);
- }
+ dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",
+ __func__, addr, off, sz, dir);
- return nents;
-}
-
-void
-dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
+ buf = find_safe_buffer_dev(dev, addr, __func__);
+ if (!buf)
+ return 1;
- dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
- __func__, sg, nents, dir);
+ BUG_ON(buf->direction != dir);
- BUG_ON(dir == DMA_NONE);
+ dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
+ __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
+ buf->safe, buf->safe_dma_addr);
- for (i = 0; i < nents; i++, sg++) {
- dma_addr_t dma_addr = sg->dma_address;
- unsigned int length = sg->length;
+ DO_STATS(dev->archdata.dmabounce->bounce_count++);
- unmap_single(dev, dma_addr, length, dir);
+ if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
+ dev_dbg(dev, "%s: copy back safe %p to unsafe %p size %d\n",
+ __func__, buf->safe + off, buf->ptr + off, sz);
+ memcpy(buf->ptr + off, buf->safe + off, sz);
}
+ return 0;
}
+EXPORT_SYMBOL(dmabounce_sync_for_cpu);
-void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_addr,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
-{
- dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n",
- __func__, dma_addr, offset, size, dir);
-
- if (sync_single(dev, dma_addr, offset + size, dir))
- dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir);
-}
-EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
-
-void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_addr,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
-{
- dev_dbg(dev, "%s(dma=%#x,off=%#lx,size=%zx,dir=%x)\n",
- __func__, dma_addr, offset, size, dir);
-
- if (sync_single(dev, dma_addr, offset + size, dir))
- dma_cache_maint(dma_to_virt(dev, dma_addr) + offset, size, dir);
-}
-EXPORT_SYMBOL(dma_sync_single_range_for_device);
-
-void
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
+int dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
+ unsigned long off, size_t sz, enum dma_data_direction dir)
{
- int i;
-
- dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
- __func__, sg, nents, dir);
-
- BUG_ON(dir == DMA_NONE);
+ struct safe_buffer *buf;
- for (i = 0; i < nents; i++, sg++) {
- dma_addr_t dma_addr = sg->dma_address;
- unsigned int length = sg->length;
+ dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n",
+ __func__, addr, off, sz, dir);
- sync_single(dev, dma_addr, length, dir);
- }
-}
-
-void
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
+ buf = find_safe_buffer_dev(dev, addr, __func__);
+ if (!buf)
+ return 1;
- dev_dbg(dev, "%s(sg=%p,nents=%d,dir=%x)\n",
- __func__, sg, nents, dir);
+ BUG_ON(buf->direction != dir);
- BUG_ON(dir == DMA_NONE);
+ dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n",
+ __func__, buf->ptr, virt_to_dma(dev, buf->ptr),
+ buf->safe, buf->safe_dma_addr);
- for (i = 0; i < nents; i++, sg++) {
- dma_addr_t dma_addr = sg->dma_address;
- unsigned int length = sg->length;
+ DO_STATS(dev->archdata.dmabounce->bounce_count++);
- sync_single(dev, dma_addr, length, dir);
+ if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) {
+ dev_dbg(dev, "%s: copy out unsafe %p to safe %p, size %d\n",
+ __func__,buf->ptr + off, buf->safe + off, sz);
+ memcpy(buf->safe + off, buf->ptr + off, sz);
}
+ return 0;
}
+EXPORT_SYMBOL(dmabounce_sync_for_device);
-static int
-dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev, const char *name,
- unsigned long size)
+static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev,
+ const char *name, unsigned long size)
{
pool->size = size;
DO_STATS(pool->allocs = 0);
return pool->pool ? 0 : -ENOMEM;
}
-int
-dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
- unsigned long large_buffer_size)
+int dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
+ unsigned long large_buffer_size)
{
struct dmabounce_device_info *device_info;
int ret;
kfree(device_info);
return ret;
}
+EXPORT_SYMBOL(dmabounce_register_dev);
-void
-dmabounce_unregister_dev(struct device *dev)
+void dmabounce_unregister_dev(struct device *dev)
{
struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
dev_info(dev, "dmabounce: device unregistered\n");
}
-
-
-EXPORT_SYMBOL(dma_map_single);
-EXPORT_SYMBOL(dma_unmap_single);
-EXPORT_SYMBOL(dma_map_sg);
-EXPORT_SYMBOL(dma_unmap_sg);
-EXPORT_SYMBOL(dma_sync_sg_for_cpu);
-EXPORT_SYMBOL(dma_sync_sg_for_device);
-EXPORT_SYMBOL(dmabounce_register_dev);
EXPORT_SYMBOL(dmabounce_unregister_dev);
MODULE_AUTHOR("Christopher Hoover <ch@hpl.hp.com>, Deepak Saxena <dsaxena@plexity.net>");
#include <linux/list.h>
#include <linux/smp.h>
#include <linux/cpumask.h>
+#include <linux/io.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/hardware/gic.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <linux/spinlock.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/sizes.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/gpio.h>
#include <asm/hardware/scoop.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/hardware/ioc.h>
#include <asm/mach/time.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/string.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/hardware/uengine.h>
-#include <asm/io.h>
#if defined(CONFIG_ARCH_IXP2000)
#define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/ioport.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/system.h>
#include <asm/mach/pci.h>
*/
#include <linux/init.h>
#include <linux/list.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/hardware/vic.h>
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.27-rc2
+# Tue Aug 12 22:30:16 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM7X00A is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+CONFIG_ARCH_AT91SAM9260=y
+# CONFIG_ARCH_AT91SAM9261 is not set
+# CONFIG_ARCH_AT91SAM9263 is not set
+# CONFIG_ARCH_AT91SAM9RL is not set
+# CONFIG_ARCH_AT91SAM9G20 is not set
+# CONFIG_ARCH_AT91CAP9 is not set
+# CONFIG_ARCH_AT91X40 is not set
+CONFIG_AT91_PMC_UNIT=y
+
+#
+# AT91SAM9260 Variants
+#
+# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set
+
+#
+# AT91SAM9260 / AT91SAM9XE Board Type
+#
+# CONFIG_MACH_AT91SAM9260EK is not set
+# CONFIG_MACH_CAM60 is not set
+# CONFIG_MACH_SAM9_L9260 is not set
+CONFIG_MACH_AFEB9260=y
+# CONFIG_MACH_USB_A9260 is not set
+# CONFIG_MACH_QIL_A9260 is not set
+
+#
+# AT91 Board Options
+#
+
+#
+# AT91 Feature Selections
+#
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_TIMER_HZ=100
+CONFIG_AT91_EARLY_DBGU=y
+# CONFIG_AT91_EARLY_USART0 is not set
+# CONFIG_AT91_EARLY_USART1 is not set
+# CONFIG_AT91_EARLY_USART2 is not set
+# CONFIG_AT91_EARLY_USART3 is not set
+# CONFIG_AT91_EARLY_USART4 is not set
+# CONFIG_AT91_EARLY_USART5 is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_ATMEL=y
+# CONFIG_MTD_NAND_ATMEL_ECC_HW is not set
+CONFIG_MTD_NAND_ATMEL_ECC_SOFT=y
+# CONFIG_MTD_NAND_ATMEL_ECC_NONE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_ATMEL_TCLIB is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_ATMEL_SSC=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_SERIAL_ATMEL_PDC=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_GPIO=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+CONFIG_AT24=y
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_DEBUG=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+CONFIG_USB_GADGET_AT91=y
+CONFIG_USB_AT91=y
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=m
+# CONFIG_USB_ETH is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+CONFIG_RTC_DEBUG=y
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+CONFIG_RTC_DRV_FM3130=y
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_AT91SAM9 is not set
+# CONFIG_DMADEVICES is not set
+
+#
+# Voltage and Current regulators
+#
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
# CONFIG_TOUCHSCREEN_UCB1400 is not set
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
# CONFIG_INPUT_MISC is not set
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-rc1-bk2
-# Sun Mar 27 23:10:35 2005
+# Linux kernel version: 2.6.27-rc6
+# Tue Sep 16 18:56:58 2008
#
CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
-CONFIG_UID16=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_IOMAP=y
+CONFIG_ARCH_SUPPORTS_AOUT=y
+CONFIG_ZONE_DMA=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
-# Code maturity level options
+# General setup
#
CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
+CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
+# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
+# CONFIG_HAVE_IOREMAP_PROT is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_ARCH_TRACEHOOK is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+# CONFIG_USE_GENERIC_SMP_HELPERS is not set
+CONFIG_HAVE_CLK=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
# CONFIG_MODULE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
#
# System Type
#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IOP3XX is not set
-# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_RPC is not set
CONFIG_ARCH_SA1100=y
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_VERSATILE is not set
-# CONFIG_ARCH_IMX is not set
-# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_MSM7X00A is not set
+CONFIG_DMABOUNCE=y
#
# SA11x0 Implementations
# CONFIG_SA1100_H3800 is not set
# CONFIG_SA1100_BADGE4 is not set
CONFIG_SA1100_JORNADA720=y
+CONFIG_SA1100_JORNADA720_SSP=y
# CONFIG_SA1100_HACKKIT is not set
# CONFIG_SA1100_LART is not set
# CONFIG_SA1100_PLEB is not set
# CONFIG_SA1100_SHANNON is not set
# CONFIG_SA1100_SIMPAD is not set
-# CONFIG_SA1100_SSP is not set
+CONFIG_SA1100_SSP=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
#
# Processor Type
CONFIG_CPU_SA1100=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
+CONFIG_CPU_PABRT_NOIFAR=y
CONFIG_CPU_CACHE_V4WB=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_TLB_V4WB=y
-CONFIG_CPU_MINICACHE=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
#
# Processor Features
#
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
CONFIG_SA1111=y
-CONFIG_DMABOUNCE=y
CONFIG_FORCE_MAX_ZONEORDER=9
#
# Bus support
#
CONFIG_ISA=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_PCCARD=y
# CONFIG_PCMCIA_DEBUG is not set
CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
#
# PC-card bridges
#
-CONFIG_I82365=y
+# CONFIG_I82365 is not set
# CONFIG_TCIC is not set
CONFIG_PCMCIA_SA1100=y
# CONFIG_PCMCIA_SA1111 is not set
-CONFIG_PCCARD_NONSTATIC=y
#
# Kernel Features
#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+CONFIG_ARCH_DISCONTIGMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_NODES_SHIFT=2
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_DISCONTIGMEM_MANUAL=y
+# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_DISCONTIGMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_NEED_MULTIPLE_NODES=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="keepinitrd mem=32M"
+CONFIG_CMDLINE=""
# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
#
# CPU Frequency scaling
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_AOUT=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_ARTHUR is not set
# Power management options
#
CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_APM is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=1
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-# CONFIG_MTD_AFS_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=m
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_GEOMETRY=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_XIP is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_ARM_INTEGRATOR is not set
-CONFIG_MTD_SA1100=y
-# CONFIG_MTD_EDB7312 is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=m
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECS is not set
-CONFIG_BLK_DEV_IDECD=m
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=m
-# CONFIG_IDE_ARM is not set
-# CONFIG_IDE_CHIPSETS is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y
#
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
-# CONFIG_NETLINK_DEV is not set
CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-
-#
-# IP: Virtual Server Configuration
-#
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
# CONFIG_IP_VS is not set
# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
#
# IP: Netfilter Configuration
#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_CONNTRACK_MARK is not set
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
+# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
CONFIG_IRDA=m
#
# IrDA protocols
#
CONFIG_IRLAN=m
-# CONFIG_IRNET is not set
CONFIG_IRCOMM=m
# CONFIG_IRDA_ULTRA is not set
#
#
-# Old SIR device drivers
-#
-# CONFIG_IRPORT_SIR is not set
-
-#
-# Old Serial dongle support
-#
-
-#
# FIR device drivers
#
-# CONFIG_NSC_FIR is not set
-# CONFIG_WINBOND_FIR is not set
-# CONFIG_SMC_IRCC_FIR is not set
-# CONFIG_ALI_FIR is not set
CONFIG_SA1100_FIR=m
# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-CONFIG_MII=m
+# CONFIG_AF_RXRPC is not set
#
-# Ethernet (1000 Mbit)
+# Wireless
#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
+# Device Drivers
#
-CONFIG_NET_RADIO=y
#
-# Obsolete Wireless cards support (pre-802.11)
+# Generic Driver Options
#
-# CONFIG_STRIP is not set
-CONFIG_ARLAN=m
-CONFIG_WAVELAN=m
-CONFIG_PCMCIA_WAVELAN=m
-# CONFIG_PCMCIA_NETWAVE is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+# CONFIG_PNP is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
#
-# Wireless 802.11 Frequency Hopping cards support
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
-# CONFIG_PCMCIA_RAYCS is not set
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECS=y
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
#
-# Wireless 802.11b ISA/PCI cards support
+# IDE chipset support/bugfixes
#
-CONFIG_HERMES=m
-# CONFIG_ATMEL is not set
+# CONFIG_BLK_DEV_PLATFORM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
#
-# Wireless 802.11b Pcmcia/Cardbus cards support
+# SCSI device support
#
-CONFIG_PCMCIA_HERMES=m
-CONFIG_AIRO_CS=m
-# CONFIG_PCMCIA_WL3501 is not set
-CONFIG_NET_WIRELESS=y
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_MII=m
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
#
-# PCMCIA network device support
+# Wireless LAN
#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
CONFIG_NET_PCMCIA=y
CONFIG_PCMCIA_3C589=m
CONFIG_PCMCIA_3C574=m
CONFIG_PCMCIA_SMC91C92=m
CONFIG_PCMCIA_XIRC2PS=m
CONFIG_PCMCIA_AXNET=m
-
-#
-# Wan interfaces
-#
# CONFIG_WAN is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPPOE is not set
+# CONFIG_PPP is not set
# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_INPORT is not set
-# CONFIG_MOUSE_LOGIBM is not set
-# CONFIG_MOUSE_PC110PAD is not set
-# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_HP7XX=y
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+CONFIG_TOUCHSCREEN_HP7XX=y
+# CONFIG_TOUCHSCREEN_HTCPEN is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_INPUT_MISC is not set
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_SA1111 is not set
-CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
#
# Character devices
#
CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
#
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_LEGACY_PTY_COUNT=32
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
#
-# IPMI
+# PCMCIA character devices
#
-# CONFIG_IPMI_HANDLER is not set
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
#
-# Watchdog Cards
+# I2C GPIO expanders:
#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
#
-# Ftape, the floppy tape device driver
+# PCI GPIO expanders:
#
-# CONFIG_DRM is not set
#
-# PCMCIA character devices
+# SPI GPIO expanders:
#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
#
-# TPM devices
+# Sonics Silicon Backplane
#
-# CONFIG_TCG_TPM is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
#
-# I2C support
+# Multifunction device drivers
#
-# CONFIG_I2C is not set
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
#
-# Misc devices
+# Multimedia Capabilities Port drivers
#
+# CONFIG_MCP_SA11X0 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
#
-# Digital Video Broadcasting Devices
+# Multimedia drivers
#
-# CONFIG_DVB is not set
+# CONFIG_DAB is not set
#
# Graphics support
#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
CONFIG_FB=y
-# CONFIG_FB_CFB_FILLRECT is not set
-# CONFIG_FB_CFB_COPYAREA is not set
-# CONFIG_FB_CFB_IMAGEBLIT is not set
-# CONFIG_FB_SOFT_CURSOR is not set
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
# CONFIG_FB_SA1100 is not set
+CONFIG_FB_S1D13XXX=y
# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
#
# Console display driver support
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE is not set
-
-#
-# Logo configuration
-#
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
# CONFIG_LOGO is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=m
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
#
-# Advanced Linux Sound Architecture
+# RTC interfaces
#
-# CONFIG_SND is not set
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
#
-# Open Sound System
+# SPI RTC drivers
#
-# CONFIG_SOUND_PRIME is not set
#
-# USB support
+# Platform RTC drivers
#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB is not set
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
#
-# USB Gadget Support
+# on-CPU RTC drivers
#
-# CONFIG_USB_GADGET is not set
+CONFIG_RTC_DRV_SA1100=y
+# CONFIG_DMADEVICES is not set
#
-# MMC/SD Card support
+# Voltage and Current regulators
#
-# CONFIG_MMC is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_UIO is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
+# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
-
-#
-# XFS support
-#
+# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
+# CONFIG_OCFS2_FS is not set
CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
-CONFIG_ISO9660_FS=m
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
+# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-CONFIG_DEVFS_MOUNT=y
-CONFIG_DEVFS_DEBUG=y
-# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=2
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_JFFS2_FS_NOR_ECC is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_LOCKD=m
-CONFIG_LOCKD_V4=y
-CONFIG_SUNRPC=m
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
-CONFIG_DEBUG_SLAB=y
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+# CONFIG_FTRACE is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
# CONFIG_DEBUG_USER is not set
CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_LL=y
# CONFIG_DEBUG_ICEDCC is not set
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
#
-# Cryptographic options
+# Ciphers
#
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
#
-# Hardware crypto devices
+# Compression
#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
#
# Library routines
#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_GENERIC_FIND_NEXT_BIT is not set
CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
#else
/* this just causes an oops */
-#define BUG() (*(int *)0 = 0)
+#define BUG() do { *(int *)0 = 0; } while (1)
#endif
dmac_inv_range(start, start + size);
}
-#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
-#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
-
-#define __cacheid_vivt_prev7(val) ((val & (15 << 25)) != (14 << 25))
-#define __cacheid_vipt_prev7(val) ((val & (15 << 25)) == (14 << 25))
-#define __cacheid_vipt_nonaliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25))
-#define __cacheid_vipt_aliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23))
-
-#define __cacheid_vivt(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vivt_prev7(val))
-#define __cacheid_vipt(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_prev7(val))
-#define __cacheid_vipt_nonaliasing(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_nonaliasing_prev7(val))
-#define __cacheid_vipt_aliasing(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vipt_aliasing_prev7(val))
-#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
-
-#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
-/*
- * VIVT caches only
- */
-#define cache_is_vivt() 1
-#define cache_is_vipt() 0
-#define cache_is_vipt_nonaliasing() 0
-#define cache_is_vipt_aliasing() 0
-#define icache_is_vivt_asid_tagged() 0
-
-#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
-/*
- * VIPT caches only
- */
-#define cache_is_vivt() 0
-#define cache_is_vipt() 1
-#define cache_is_vipt_nonaliasing() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_vipt_nonaliasing(__val); \
- })
-
-#define cache_is_vipt_aliasing() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_vipt_aliasing(__val); \
- })
-
-#define icache_is_vivt_asid_tagged() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_vivt_asid_tagged_instr(__val); \
- })
-
-#else
-/*
- * VIVT or VIPT caches. Note that this is unreliable since ARM926
- * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test.
- * There's no way to tell from the CacheType register what type (!)
- * the cache is.
- */
-#define cache_is_vivt() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- (!__cacheid_present(__val)) || __cacheid_vivt(__val); \
- })
-
-#define cache_is_vipt() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_present(__val) && __cacheid_vipt(__val); \
- })
-
-#define cache_is_vipt_nonaliasing() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_present(__val) && \
- __cacheid_vipt_nonaliasing(__val); \
- })
-
-#define cache_is_vipt_aliasing() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_present(__val) && \
- __cacheid_vipt_aliasing(__val); \
- })
-
-#define icache_is_vivt_asid_tagged() \
- ({ \
- unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
- __cacheid_present(__val) && \
- __cacheid_vivt_asid_tagged_instr(__val); \
- })
-
-#endif
-
#endif
--- /dev/null
+#ifndef __ASM_ARM_CACHETYPE_H
+#define __ASM_ARM_CACHETYPE_H
+
+#define CACHEID_VIVT (1 << 0)
+#define CACHEID_VIPT_NONALIASING (1 << 1)
+#define CACHEID_VIPT_ALIASING (1 << 2)
+#define CACHEID_VIPT (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING)
+#define CACHEID_ASID_TAGGED (1 << 3)
+
+extern unsigned int cacheid;
+
+#define cache_is_vivt() cacheid_is(CACHEID_VIVT)
+#define cache_is_vipt() cacheid_is(CACHEID_VIPT)
+#define cache_is_vipt_nonaliasing() cacheid_is(CACHEID_VIPT_NONALIASING)
+#define cache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_ALIASING)
+#define icache_is_vivt_asid_tagged() cacheid_is(CACHEID_ASID_TAGGED)
+
+/*
+ * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture
+ * Mask out support which will never be present on newer CPUs.
+ * - v6+ is never VIVT
+ * - v7+ VIPT never aliases
+ */
+#if __LINUX_ARM_ARCH__ >= 7
+#define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING | CACHEID_ASID_TAGGED)
+#elif __LINUX_ARM_ARCH__ >= 6
+#define __CACHEID_ARCH_MIN (~CACHEID_VIVT)
+#else
+#define __CACHEID_ARCH_MIN (~0)
+#endif
+
+/*
+ * Mask out support which isn't configured
+ */
+#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
+#define __CACHEID_ALWAYS (CACHEID_VIVT)
+#define __CACHEID_NEVER (~CACHEID_VIVT)
+#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
+#define __CACHEID_ALWAYS (0)
+#define __CACHEID_NEVER (CACHEID_VIVT)
+#else
+#define __CACHEID_ALWAYS (0)
+#define __CACHEID_NEVER (0)
+#endif
+
+static inline unsigned int __attribute__((pure)) cacheid_is(unsigned int mask)
+{
+ return (__CACHEID_ALWAYS & mask) |
+ (~__CACHEID_NEVER & __CACHEID_ARCH_MIN & mask & cacheid);
+}
+
+#endif
--- /dev/null
+#ifndef __ASM_ARM_CPUTYPE_H
+#define __ASM_ARM_CPUTYPE_H
+
+#include <linux/stringify.h>
+
+#define CPUID_ID 0
+#define CPUID_CACHETYPE 1
+#define CPUID_TCM 2
+#define CPUID_TLBTYPE 3
+
+#ifdef CONFIG_CPU_CP15
+#define read_cpuid(reg) \
+ ({ \
+ unsigned int __val; \
+ asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
+ : "=r" (__val) \
+ : \
+ : "cc"); \
+ __val; \
+ })
+#else
+extern unsigned int processor_id;
+#define read_cpuid(reg) (processor_id)
+#endif
+
+/*
+ * The CPU ID never changes at run time, so we might as well tell the
+ * compiler that it's constant. Use this function to read the CPU ID
+ * rather than directly reading processor_id or read_cpuid() directly.
+ */
+static inline unsigned int __attribute_const__ read_cpuid_id(void)
+{
+ return read_cpuid(CPUID_ID);
+}
+
+static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
+{
+ return read_cpuid(CPUID_CACHETYPE);
+}
+
+/*
+ * Intel's XScale3 core supports some v6 features (supersections, L2)
+ * but advertises itself as v5 as it does not support the v6 ISA. For
+ * this reason, we need a way to explicitly test for this type of CPU.
+ */
+#ifndef CONFIG_CPU_XSC3
+#define cpu_is_xsc3() 0
+#else
+static inline int cpu_is_xsc3(void)
+{
+ if ((read_cpuid_id() & 0xffffe000) == 0x69056000)
+ return 1;
+
+ return 0;
+}
+#endif
+
+#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#define cpu_is_xscale() 0
+#else
+#define cpu_is_xscale() 1
+#endif
+
+#endif
* Dummy noncoherent implementation. We don't provide a dma_cache_sync
* function so drivers using this API are highlighted with build warnings.
*/
-static inline void *
-dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
+static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
+ dma_addr_t *handle, gfp_t gfp)
{
return NULL;
}
-static inline void
-dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
- dma_addr_t handle)
+static inline void dma_free_noncoherent(struct device *dev, size_t size,
+ void *cpu_addr, dma_addr_t handle)
{
}
* return the CPU-viewed address, and sets @handle to be the
* device-viewed address.
*/
-extern void *
-dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
+extern void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
/**
* dma_free_coherent - free memory allocated by dma_alloc_coherent
* References to memory and mappings associated with cpu_addr/handle
* during and after this call executing are illegal.
*/
-extern void
-dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
- dma_addr_t handle);
+extern void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
/**
* dma_mmap_coherent - map a coherent DMA allocation into user space
* into user space. The coherent DMA buffer must not be freed by the
* driver until the user space mapping has been released.
*/
-int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
- void *cpu_addr, dma_addr_t handle, size_t size);
+int dma_mmap_coherent(struct device *, struct vm_area_struct *,
+ void *, dma_addr_t, size_t);
/**
* return the CPU-viewed address, and sets @handle to be the
* device-viewed address.
*/
-extern void *
-dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
+extern void *dma_alloc_writecombine(struct device *, size_t, dma_addr_t *,
+ gfp_t);
#define dma_free_writecombine(dev,size,cpu_addr,handle) \
dma_free_coherent(dev,size,cpu_addr,handle)
-int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
- void *cpu_addr, dma_addr_t handle, size_t size);
+int dma_mmap_writecombine(struct device *, struct vm_area_struct *,
+ void *, dma_addr_t, size_t);
+
+
+#ifdef CONFIG_DMABOUNCE
+/*
+ * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
+ * and utilize bounce buffers as needed to work around limited DMA windows.
+ *
+ * On the SA-1111, a bug limits DMA to only certain regions of RAM.
+ * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
+ * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
+ *
+ * The following are helper functions used by the dmabounce subystem
+ *
+ */
+
+/**
+ * dmabounce_register_dev
+ *
+ * @dev: valid struct device pointer
+ * @small_buf_size: size of buffers to use with small buffer pool
+ * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
+ *
+ * This function should be called by low-level platform code to register
+ * a device as requireing DMA buffer bouncing. The function will allocate
+ * appropriate DMA pools for the device.
+ *
+ */
+extern int dmabounce_register_dev(struct device *, unsigned long,
+ unsigned long);
+
+/**
+ * dmabounce_unregister_dev
+ *
+ * @dev: valid struct device pointer
+ *
+ * This function should be called by low-level platform code when device
+ * that was previously registered with dmabounce_register_dev is removed
+ * from the system.
+ *
+ */
+extern void dmabounce_unregister_dev(struct device *);
+
+/**
+ * dma_needs_bounce
+ *
+ * @dev: valid struct device pointer
+ * @dma_handle: dma_handle of unbounced buffer
+ * @size: size of region being mapped
+ *
+ * Platforms that utilize the dmabounce mechanism must implement
+ * this function.
+ *
+ * The dmabounce routines call this function whenever a dma-mapping
+ * is requested to determine whether a given buffer needs to be bounced
+ * or not. The function must return 0 if the buffer is OK for
+ * DMA access and 1 if the buffer needs to be bounced.
+ *
+ */
+extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
+
+/*
+ * The DMA API, implemented by dmabounce.c. See below for descriptions.
+ */
+extern dma_addr_t dma_map_single(struct device *, void *, size_t,
+ enum dma_data_direction);
+extern dma_addr_t dma_map_page(struct device *, struct page *,
+ unsigned long, size_t, enum dma_data_direction);
+extern void dma_unmap_single(struct device *, dma_addr_t, size_t,
+ enum dma_data_direction);
+
+/*
+ * Private functions
+ */
+int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long,
+ size_t, enum dma_data_direction);
+int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long,
+ size_t, enum dma_data_direction);
+#else
+#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1)
+#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1)
/**
* can regain ownership by calling dma_unmap_single() or
* dma_sync_single_for_cpu().
*/
-#ifndef CONFIG_DMABOUNCE
-static inline dma_addr_t
-dma_map_single(struct device *dev, void *cpu_addr, size_t size,
- enum dma_data_direction dir)
+static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
+ size_t size, enum dma_data_direction dir)
{
+ BUG_ON(!valid_dma_direction(dir));
+
if (!arch_is_coherent())
dma_cache_maint(cpu_addr, size, dir);
return virt_to_dma(dev, cpu_addr);
}
-#else
-extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
-#endif
/**
* dma_map_page - map a portion of a page for streaming DMA
* or written back.
*
* The device owns this memory once this call has completed. The CPU
- * can regain ownership by calling dma_unmap_page() or
- * dma_sync_single_for_cpu().
+ * can regain ownership by calling dma_unmap_page().
*/
-static inline dma_addr_t
-dma_map_page(struct device *dev, struct page *page,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
+static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
+ unsigned long offset, size_t size, enum dma_data_direction dir)
{
- return dma_map_single(dev, page_address(page) + offset, size, dir);
+ BUG_ON(!valid_dma_direction(dir));
+
+ if (!arch_is_coherent())
+ dma_cache_maint(page_address(page) + offset, size, dir);
+
+ return page_to_dma(dev, page) + offset;
}
/**
* dma_unmap_single - unmap a single buffer previously mapped
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
* @handle: DMA address of buffer
- * @size: size of buffer to map
- * @dir: DMA transfer direction
+ * @size: size of buffer (same as passed to dma_map_single)
+ * @dir: DMA transfer direction (same as passed to dma_map_single)
*
* Unmap a single streaming mode DMA translation. The handle and size
* must match what was provided in the previous dma_map_single() call.
* After this call, reads by the CPU to the buffer are guaranteed to see
* whatever the device wrote there.
*/
-#ifndef CONFIG_DMABOUNCE
-static inline void
-dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
- enum dma_data_direction dir)
+static inline void dma_unmap_single(struct device *dev, dma_addr_t handle,
+ size_t size, enum dma_data_direction dir)
{
/* nothing to do */
}
-#else
-extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
-#endif
+#endif /* CONFIG_DMABOUNCE */
/**
* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
* @handle: DMA address of buffer
- * @size: size of buffer to map
- * @dir: DMA transfer direction
+ * @size: size of buffer (same as passed to dma_map_page)
+ * @dir: DMA transfer direction (same as passed to dma_map_page)
*
- * Unmap a single streaming mode DMA translation. The handle and size
- * must match what was provided in the previous dma_map_single() call.
+ * Unmap a page streaming mode DMA translation. The handle and size
+ * must match what was provided in the previous dma_map_page() call.
* All other usages are undefined.
*
* After this call, reads by the CPU to the buffer are guaranteed to see
* whatever the device wrote there.
*/
-static inline void
-dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
- enum dma_data_direction dir)
+static inline void dma_unmap_page(struct device *dev, dma_addr_t handle,
+ size_t size, enum dma_data_direction dir)
{
dma_unmap_single(dev, handle, size, dir);
}
/**
- * dma_map_sg - map a set of SG buffers for streaming mode DMA
- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
- * @sg: list of buffers
- * @nents: number of buffers to map
- * @dir: DMA transfer direction
- *
- * Map a set of buffers described by scatterlist in streaming
- * mode for DMA. This is the scatter-gather version of the
- * above dma_map_single interface. Here the scatter gather list
- * elements are each tagged with the appropriate dma address
- * and length. They are obtained via sg_dma_{address,length}(SG).
- *
- * NOTE: An implementation may be able to use a smaller number of
- * DMA address/length pairs than there are SG table elements.
- * (for example via virtual mapping capabilities)
- * The routine returns the number of addr/length pairs actually
- * used, at most nents.
- *
- * Device ownership issues as mentioned above for dma_map_single are
- * the same here.
- */
-#ifndef CONFIG_DMABOUNCE
-static inline int
-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
-
- for (i = 0; i < nents; i++, sg++) {
- char *virt;
-
- sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset;
- virt = sg_virt(sg);
-
- if (!arch_is_coherent())
- dma_cache_maint(virt, sg->length, dir);
- }
-
- return nents;
-}
-#else
-extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
-#endif
-
-/**
- * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
- * @sg: list of buffers
- * @nents: number of buffers to map
- * @dir: DMA transfer direction
- *
- * Unmap a set of streaming mode DMA translations.
- * Again, CPU read rules concerning calls here are the same as for
- * dma_unmap_single() above.
- */
-#ifndef CONFIG_DMABOUNCE
-static inline void
-dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
-
- /* nothing to do */
-}
-#else
-extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
-#endif
-
-
-/**
* dma_sync_single_range_for_cpu
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
* @handle: DMA address of buffer
* must first the perform a dma_sync_for_device, and then the
* device again owns the buffer.
*/
-#ifndef CONFIG_DMABOUNCE
-static inline void
-dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t handle,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
+static inline void dma_sync_single_range_for_cpu(struct device *dev,
+ dma_addr_t handle, unsigned long offset, size_t size,
+ enum dma_data_direction dir)
{
- if (!arch_is_coherent())
- dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
+ BUG_ON(!valid_dma_direction(dir));
+
+ dmabounce_sync_for_cpu(dev, handle, offset, size, dir);
}
-static inline void
-dma_sync_single_range_for_device(struct device *dev, dma_addr_t handle,
- unsigned long offset, size_t size,
- enum dma_data_direction dir)
+static inline void dma_sync_single_range_for_device(struct device *dev,
+ dma_addr_t handle, unsigned long offset, size_t size,
+ enum dma_data_direction dir)
{
+ BUG_ON(!valid_dma_direction(dir));
+
+ if (!dmabounce_sync_for_device(dev, handle, offset, size, dir))
+ return;
+
if (!arch_is_coherent())
dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir);
}
-#else
-extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction);
-extern void dma_sync_single_range_for_device(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction);
-#endif
-static inline void
-dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
- enum dma_data_direction dir)
+static inline void dma_sync_single_for_cpu(struct device *dev,
+ dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
dma_sync_single_range_for_cpu(dev, handle, 0, size, dir);
}
-static inline void
-dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
- enum dma_data_direction dir)
+static inline void dma_sync_single_for_device(struct device *dev,
+ dma_addr_t handle, size_t size, enum dma_data_direction dir)
{
dma_sync_single_range_for_device(dev, handle, 0, size, dir);
}
-
-/**
- * dma_sync_sg_for_cpu
- * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
- * @sg: list of buffers
- * @nents: number of buffers to map
- * @dir: DMA transfer direction
- *
- * Make physical memory consistent for a set of streaming
- * mode DMA translations after a transfer.
- *
- * The same as dma_sync_single_for_* but for a scatter-gather list,
- * same rules and usage.
- */
-#ifndef CONFIG_DMABOUNCE
-static inline void
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
-
- for (i = 0; i < nents; i++, sg++) {
- char *virt = sg_virt(sg);
- if (!arch_is_coherent())
- dma_cache_maint(virt, sg->length, dir);
- }
-}
-
-static inline void
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
- enum dma_data_direction dir)
-{
- int i;
-
- for (i = 0; i < nents; i++, sg++) {
- char *virt = sg_virt(sg);
- if (!arch_is_coherent())
- dma_cache_maint(virt, sg->length, dir);
- }
-}
-#else
-extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
-extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
-#endif
-
-#ifdef CONFIG_DMABOUNCE
/*
- * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
- * and utilize bounce buffers as needed to work around limited DMA windows.
- *
- * On the SA-1111, a bug limits DMA to only certain regions of RAM.
- * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
- * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
- *
- * The following are helper functions used by the dmabounce subystem
- *
- */
-
-/**
- * dmabounce_register_dev
- *
- * @dev: valid struct device pointer
- * @small_buf_size: size of buffers to use with small buffer pool
- * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
- *
- * This function should be called by low-level platform code to register
- * a device as requireing DMA buffer bouncing. The function will allocate
- * appropriate DMA pools for the device.
- *
- */
-extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
-
-/**
- * dmabounce_unregister_dev
- *
- * @dev: valid struct device pointer
- *
- * This function should be called by low-level platform code when device
- * that was previously registered with dmabounce_register_dev is removed
- * from the system.
- *
+ * The scatter list versions of the above methods.
*/
-extern void dmabounce_unregister_dev(struct device *);
+extern int dma_map_sg(struct device *, struct scatterlist *, int,
+ enum dma_data_direction);
+extern void dma_unmap_sg(struct device *, struct scatterlist *, int,
+ enum dma_data_direction);
+extern void dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
+ enum dma_data_direction);
+extern void dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
+ enum dma_data_direction);
-/**
- * dma_needs_bounce
- *
- * @dev: valid struct device pointer
- * @dma_handle: dma_handle of unbounced buffer
- * @size: size of region being mapped
- *
- * Platforms that utilize the dmabounce mechanism must implement
- * this function.
- *
- * The dmabounce routines call this function whenever a dma-mapping
- * is requested to determine whether a given buffer needs to be bounced
- * or not. The function must return 0 if the buffer is OK for
- * DMA access and 1 if the buffer needs to be bounced.
- *
- */
-extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
-#endif /* CONFIG_DMABOUNCE */
#endif /* __KERNEL__ */
#endif
#include <asm/hwcap.h>
-#ifndef __ASSEMBLY__
/*
* ELF register definitions..
*/
typedef elf_greg_t elf_gregset_t[ELF_NGREG];
typedef struct user_fp elf_fpregset_t;
-#endif
#define EM_ARM 40
-#define EF_ARM_APCS26 0x08
-#define EF_ARM_SOFT_FLOAT 0x200
-#define EF_ARM_EABI_MASK 0xFF000000
+
+#define EF_ARM_EABI_MASK 0xff000000
+#define EF_ARM_EABI_UNKNOWN 0x00000000
+#define EF_ARM_EABI_VER1 0x01000000
+#define EF_ARM_EABI_VER2 0x02000000
+#define EF_ARM_EABI_VER3 0x03000000
+#define EF_ARM_EABI_VER4 0x04000000
+#define EF_ARM_EABI_VER5 0x05000000
+
+#define EF_ARM_BE8 0x00800000 /* ABI 4,5 */
+#define EF_ARM_LE8 0x00400000 /* ABI 4,5 */
+#define EF_ARM_MAVERICK_FLOAT 0x00000800 /* ABI 0 */
+#define EF_ARM_VFP_FLOAT 0x00000400 /* ABI 0 */
+#define EF_ARM_SOFT_FLOAT 0x00000200 /* ABI 0 */
+#define EF_ARM_OLD_ABI 0x00000100 /* ABI 0 */
+#define EF_ARM_NEW_ABI 0x00000080 /* ABI 0 */
+#define EF_ARM_ALIGN8 0x00000040 /* ABI 0 */
+#define EF_ARM_PIC 0x00000020 /* ABI 0 */
+#define EF_ARM_MAPSYMSFIRST 0x00000010 /* ABI 2 */
+#define EF_ARM_APCS_FLOAT 0x00000010 /* ABI 0, floats in fp regs */
+#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008 /* ABI 2 */
+#define EF_ARM_APCS_26 0x00000008 /* ABI 0 */
+#define EF_ARM_SYMSARESORTED 0x00000004 /* ABI 1,2 */
+#define EF_ARM_INTERWORK 0x00000004 /* ABI 0 */
+#define EF_ARM_HASENTRY 0x00000002 /* All */
+#define EF_ARM_RELEXEC 0x00000001 /* All */
#define R_ARM_NONE 0
#define R_ARM_PC24 1
#endif
#define ELF_ARCH EM_ARM
-#ifndef __ASSEMBLY__
/*
* This yields a string that ld.so will use to load implementation
* specific libraries for optimization. This is more specific in
#define ELF_PLATFORM (elf_platform)
extern char elf_platform[];
-#endif
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x))
+struct elf32_hdr;
/*
- * 32-bit code is always OK. Some cpus can do 26-bit, some can't.
+ * This is used to ensure we don't load something for the wrong architecture.
*/
-#define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x))
-
-#define ELF_THUMB_OK(x) \
- ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \
- ((x)->e_entry & 3) == 0)
+extern int elf_check_arch(const struct elf32_hdr *);
+#define elf_check_arch elf_check_arch
-#define ELF_26BIT_OK(x) \
- ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \
- ((x)->e_flags & EF_ARM_APCS26) == 0)
+extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int);
+#define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk)
#define USE_ELF_CORE_DUMP
#define ELF_EXEC_PAGESIZE 4096
have no such handler. */
#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
-/*
- * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0
- * and CP1, we only enable access to the iWMMXt coprocessor if the
- * binary is EABI or softfloat (and thus, guaranteed not to use
- * FPA instructions.)
- */
-#define SET_PERSONALITY(ex, ibcs2) \
- do { \
- if ((ex).e_flags & EF_ARM_APCS26) { \
- set_personality(PER_LINUX); \
- } else { \
- set_personality(PER_LINUX_32BIT); \
- if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \
- set_thread_flag(TIF_USING_IWMMXT); \
- else \
- clear_thread_flag(TIF_USING_IWMMXT); \
- } \
- } while (0)
+extern void elf_set_personality(const struct elf32_hdr *);
+#define SET_PERSONALITY(ex, ibcs2) elf_set_personality(&(ex))
#endif
-#ifndef _ASM_FUTEX_H
-#define _ASM_FUTEX_H
+#ifndef _ASM_ARM_FUTEX_H
+#define _ASM_ARM_FUTEX_H
+
+#ifdef __KERNEL__
+
+#ifdef CONFIG_SMP
#include <asm-generic/futex.h>
-#endif
+#else /* !SMP, we can work around lack of atomic ops by disabling preemption */
+
+#include <linux/futex.h>
+#include <linux/preempt.h>
+#include <linux/uaccess.h>
+#include <asm/errno.h>
+
+#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
+ __asm__ __volatile__( \
+ "1: ldrt %1, [%2]\n" \
+ " " insn "\n" \
+ "2: strt %0, [%2]\n" \
+ " mov %0, #0\n" \
+ "3:\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .align 3\n" \
+ " .long 1b, 4f, 2b, 4f\n" \
+ " .previous\n" \
+ " .section .fixup,\"ax\"\n" \
+ "4: mov %0, %4\n" \
+ " b 3b\n" \
+ " .previous" \
+ : "=&r" (ret), "=&r" (oldval) \
+ : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
+ : "cc", "memory")
+
+static inline int
+futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
+{
+ int op = (encoded_op >> 28) & 7;
+ int cmp = (encoded_op >> 24) & 15;
+ int oparg = (encoded_op << 8) >> 20;
+ int cmparg = (encoded_op << 20) >> 20;
+ int oldval = 0, ret;
+
+ if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
+ oparg = 1 << oparg;
+
+ if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+ return -EFAULT;
+
+ pagefault_disable(); /* implies preempt_disable() */
+
+ switch (op) {
+ case FUTEX_OP_SET:
+ __futex_atomic_op("mov %0, %3", ret, oldval, uaddr, oparg);
+ break;
+ case FUTEX_OP_ADD:
+ __futex_atomic_op("add %0, %1, %3", ret, oldval, uaddr, oparg);
+ break;
+ case FUTEX_OP_OR:
+ __futex_atomic_op("orr %0, %1, %3", ret, oldval, uaddr, oparg);
+ break;
+ case FUTEX_OP_ANDN:
+ __futex_atomic_op("and %0, %1, %3", ret, oldval, uaddr, ~oparg);
+ break;
+ case FUTEX_OP_XOR:
+ __futex_atomic_op("eor %0, %1, %3", ret, oldval, uaddr, oparg);
+ break;
+ default:
+ ret = -ENOSYS;
+ }
+
+ pagefault_enable(); /* subsumes preempt_enable() */
+
+ if (!ret) {
+ switch (cmp) {
+ case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
+ case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
+ case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
+ case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
+ case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
+ case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
+ default: ret = -ENOSYS;
+ }
+ }
+ return ret;
+}
+
+static inline int
+futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+{
+ int val;
+
+ if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+ return -EFAULT;
+
+ pagefault_disable(); /* implies preempt_disable() */
+
+ __asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
+ "1: ldrt %0, [%3]\n"
+ " teq %0, %1\n"
+ "2: streqt %2, [%3]\n"
+ "3:\n"
+ " .section __ex_table,\"a\"\n"
+ " .align 3\n"
+ " .long 1b, 4f, 2b, 4f\n"
+ " .previous\n"
+ " .section .fixup,\"ax\"\n"
+ "4: mov %0, %4\n"
+ " b 3b\n"
+ " .previous"
+ : "=&r" (val)
+ : "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
+ : "cc", "memory");
+
+ pagefault_enable(); /* subsumes preempt_enable() */
+
+ return val;
+}
+
+#endif /* !SMP */
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_ARM_FUTEX_H */
#define MT_DEVICE 0
#define MT_DEVICE_NONSHARED 1
#define MT_DEVICE_CACHED 2
-#define MT_DEVICE_IXP2000 3
-#define MT_DEVICE_WC 4
+#define MT_DEVICE_WC 3
/*
- * types 5 onwards can be found in asm/mach/map.h and are undefined
+ * types 4 onwards can be found in asm/mach/map.h and are undefined
* for ioremap
*/
#ifndef __ASSEMBLY__
struct irqaction;
extern void migrate_irqs(void);
+
+extern void asm_do_IRQ(unsigned int, struct pt_regs *);
+void init_IRQ(void);
+
#endif
#endif
void arch_remove_kprobe(struct kprobe *);
void kretprobe_trampoline(void);
-int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr);
int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
int kprobe_exceptions_notify(struct notifier_block *self,
unsigned long val, void *data);
unsigned int type;
};
-/* types 0-4 are defined in asm/io.h */
-#define MT_CACHECLEAN 5
-#define MT_MINICLEAN 6
-#define MT_LOW_VECTORS 7
-#define MT_HIGH_VECTORS 8
-#define MT_MEMORY 9
-#define MT_ROM 10
-
-#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED
-#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000
+/* types 0-3 are defined in asm/io.h */
+#define MT_CACHECLEAN 4
+#define MT_MINICLEAN 5
+#define MT_LOW_VECTORS 6
+#define MT_HIGH_VECTORS 7
+#define MT_MEMORY 8
+#define MT_ROM 9
#ifdef CONFIG_MMU
extern void iotable_init(struct map_desc *, int);
#ifndef _ASM_MC146818RTC_H
#define _ASM_MC146818RTC_H
+#include <linux/io.h>
#include <mach/irqs.h>
-#include <asm/io.h>
#ifndef RTC_PORT
#define RTC_PORT(x) (0x70 + (x))
#ifndef __ASM_ARM_MEMORY_H
#define __ASM_ARM_MEMORY_H
+#include <linux/compiler.h>
+#include <linux/const.h>
+#include <mach/memory.h>
+#include <asm/sizes.h>
+
/*
* Allow for constants defined here to be used from assembly code
* by prepending the UL suffix only with actual C code compilation.
*/
-#ifndef __ASSEMBLY__
-#define UL(x) (x##UL)
-#else
-#define UL(x) (x)
-#endif
-
-#include <linux/compiler.h>
-#include <mach/memory.h>
-#include <asm/sizes.h>
+#define UL(x) _AC(x, UL)
#ifdef CONFIG_MMU
-#ifndef TASK_SIZE
/*
+ * PAGE_OFFSET - the virtual address of the start of the kernel image
* TASK_SIZE - the maximum size of a user space task.
* TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
*/
-#define TASK_SIZE UL(0xbf000000)
-#define TASK_UNMAPPED_BASE UL(0x40000000)
-#endif
+#define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
+#define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(0x01000000))
+#define TASK_UNMAPPED_BASE (UL(CONFIG_PAGE_OFFSET) / 3)
/*
* The maximum size of a 26-bit user space task.
#define TASK_SIZE_26 UL(0x04000000)
/*
- * Page offset: 3GB
- */
-#ifndef PAGE_OFFSET
-#define PAGE_OFFSET UL(0xc0000000)
-#endif
-
-/*
* The module space lives between the addresses given by TASK_SIZE
* and PAGE_OFFSET - it must be within 32MB of the kernel text.
*/
#ifndef arch_adjust_zones
#define arch_adjust_zones(node,size,holes) do { } while (0)
+#elif !defined(CONFIG_ZONE_DMA)
+#error "custom arch_adjust_zones() requires CONFIG_ZONE_DMA"
#endif
/*
- * Amount of memory reserved for the vmalloc() area, and minimum
- * address for vmalloc mappings.
- */
-extern unsigned long vmalloc_reserve;
-
-#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
-
-/*
* PFNs are used to describe any physical page; this means
* PFN 0 == physical address 0.
*
#include <linux/compiler.h>
#include <asm/cacheflush.h>
+#include <asm/cachetype.h>
#include <asm/proc-fns.h>
#include <asm-generic/mm_hooks.h>
#endif /* !__ASSEMBLY__ */
-#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
- VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+#define VM_DATA_DEFAULT_FLAGS \
+ (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
+ VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
/*
* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
#define L_PTE_PRESENT (1 << 0)
#define L_PTE_FILE (1 << 1) /* only when !PRESENT */
#define L_PTE_YOUNG (1 << 1)
-#define L_PTE_BUFFERABLE (1 << 2) /* matches PTE */
-#define L_PTE_CACHEABLE (1 << 3) /* matches PTE */
-#define L_PTE_USER (1 << 4)
-#define L_PTE_WRITE (1 << 5)
-#define L_PTE_EXEC (1 << 6)
-#define L_PTE_DIRTY (1 << 7)
+#define L_PTE_BUFFERABLE (1 << 2) /* obsolete, matches PTE */
+#define L_PTE_CACHEABLE (1 << 3) /* obsolete, matches PTE */
+#define L_PTE_DIRTY (1 << 6)
+#define L_PTE_WRITE (1 << 7)
+#define L_PTE_USER (1 << 8)
+#define L_PTE_EXEC (1 << 9)
#define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */
+/*
+ * These are the memory types, defined to be compatible with
+ * pre-ARMv6 CPUs cacheable and bufferable bits: XXCB
+ */
+#define L_PTE_MT_UNCACHED (0x00 << 2) /* 0000 */
+#define L_PTE_MT_BUFFERABLE (0x01 << 2) /* 0001 */
+#define L_PTE_MT_WRITETHROUGH (0x02 << 2) /* 0010 */
+#define L_PTE_MT_WRITEBACK (0x03 << 2) /* 0011 */
+#define L_PTE_MT_MINICACHE (0x06 << 2) /* 0110 (sa1100, xscale) */
+#define L_PTE_MT_WRITEALLOC (0x07 << 2) /* 0111 */
+#define L_PTE_MT_DEV_SHARED (0x04 << 2) /* 0100 */
+#define L_PTE_MT_DEV_NONSHARED (0x0c << 2) /* 1100 */
+#define L_PTE_MT_DEV_WC (0x09 << 2) /* 1001 */
+#define L_PTE_MT_DEV_CACHED (0x0b << 2) /* 1011 */
+#define L_PTE_MT_MASK (0x0f << 2)
+
#ifndef __ASSEMBLY__
/*
* as well as any architecture dependent bits like global/ASID and SMP
* shared mapping bits.
*/
-#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE
-#define _L_PTE_READ L_PTE_USER | L_PTE_EXEC
+#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG
extern pgprot_t pgprot_user;
extern pgprot_t pgprot_kernel;
-#define PAGE_NONE pgprot_user
-#define PAGE_COPY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)
-#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \
- L_PTE_WRITE)
-#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)
-#define PAGE_KERNEL pgprot_kernel
-
-#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT)
-#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
-#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)
-#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
+#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
+
+#define PAGE_NONE pgprot_user
+#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE)
+#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC)
+#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER)
+#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC)
+#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER)
+#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_EXEC)
+#define PAGE_KERNEL pgprot_kernel
+#define PAGE_KERNEL_EXEC _MOD_PROT(pgprot_kernel, L_PTE_EXEC)
+
+#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT)
+#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE)
+#define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_WRITE | L_PTE_EXEC)
+#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
+#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC)
+#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
+#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_EXEC)
#endif /* __ASSEMBLY__ */
#define __P001 __PAGE_READONLY
#define __P010 __PAGE_COPY
#define __P011 __PAGE_COPY
-#define __P100 __PAGE_READONLY
-#define __P101 __PAGE_READONLY
-#define __P110 __PAGE_COPY
-#define __P111 __PAGE_COPY
+#define __P100 __PAGE_READONLY_EXEC
+#define __P101 __PAGE_READONLY_EXEC
+#define __P110 __PAGE_COPY_EXEC
+#define __P111 __PAGE_COPY_EXEC
#define __S000 __PAGE_NONE
#define __S001 __PAGE_READONLY
#define __S010 __PAGE_SHARED
#define __S011 __PAGE_SHARED
-#define __S100 __PAGE_READONLY
-#define __S101 __PAGE_READONLY
-#define __S110 __PAGE_SHARED
-#define __S111 __PAGE_SHARED
+#define __S100 __PAGE_READONLY_EXEC
+#define __S101 __PAGE_READONLY_EXEC
+#define __S110 __PAGE_SHARED_EXEC
+#define __S111 __PAGE_SHARED_EXEC
#ifndef __ASSEMBLY__
/*
/*
* Mark the prot value as uncacheable and unbufferable.
*/
-#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE))
-#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~L_PTE_CACHEABLE)
+#define pgprot_noncached(prot) \
+ __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_UNCACHED)
+#define pgprot_writecombine(prot) \
+ __pgprot((pgprot_val(prot) & ~L_PTE_MT_MASK) | L_PTE_MT_BUFFERABLE)
#define pmd_none(pmd) (!pmd_val(pmd))
#define pmd_present(pmd) (pmd_val(pmd))
#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
/*
- * Permanent address of a page. We never have highmem, so this is trivial.
- */
-#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
-
-/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
*/
#define PSR_C_BIT 0x20000000
#define PSR_Z_BIT 0x40000000
#define PSR_N_BIT 0x80000000
-#define PCMASK 0
/*
* Groups of PSR bits
return 0;
}
-#define pc_pointer(v) \
- ((v) & ~PCMASK)
-
-#define instruction_pointer(regs) \
- (pc_pointer((regs)->ARM_pc))
+#define instruction_pointer(regs) (regs)->ARM_pc
#ifdef CONFIG_SMP
extern unsigned long profile_pc(struct pt_regs *regs);
struct membank bank[NR_BANKS];
};
+#define for_each_nodebank(iter,mi,no) \
+ for (iter = 0; iter < mi->nr_banks; iter++) \
+ if (mi->bank[iter].node == no)
+
+#define bank_pfn_start(bank) __phys_to_pfn((bank)->start)
+#define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size)
+#define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT)
+#define bank_phys_start(bank) (bank)->start
+#define bank_phys_end(bank) ((bank)->start + (bank)->size)
+#define bank_phys_size(bank) (bank)->size
+
/*
* Early command line parameters.
*/
#include <asm/memory.h>
-#define MAX_PHYSADDR_BITS 32
-#define MAX_PHYSMEM_BITS 32
-#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS
+/*
+ * Two definitions are required for sparsemem:
+ *
+ * MAX_PHYSMEM_BITS: The number of physical address bits required
+ * to address the last byte of memory.
+ *
+ * SECTION_SIZE_BITS: The number of physical address bits to cover
+ * the maximum amount of memory in a section.
+ *
+ * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
+ * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26.
+ *
+ * Define these in your mach/memory.h.
+ */
+#if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS)
+#error Sparsemem is not supported on this platform
+#endif
#endif
#define CR_XP (1 << 23) /* Extended page tables */
#define CR_VE (1 << 24) /* Vectored interrupts */
-#define CPUID_ID 0
-#define CPUID_CACHETYPE 1
-#define CPUID_TCM 2
-#define CPUID_TLBTYPE 3
-
/*
* This is used to ensure the compiler did actually allocate the register we
* asked it for some inline assembly sequences. Apparently we can't trust
#ifndef __ASSEMBLY__
#include <linux/linkage.h>
-#include <linux/stringify.h>
#include <linux/irqflags.h>
-#ifdef CONFIG_CPU_CP15
-#define read_cpuid(reg) \
- ({ \
- unsigned int __val; \
- asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
- : "=r" (__val) \
- : \
- : "cc"); \
- __val; \
- })
-#else
-extern unsigned int processor_id;
-#define read_cpuid(reg) (processor_id)
-#endif
-
-/*
- * The CPU ID never changes at run time, so we might as well tell the
- * compiler that it's constant. Use this function to read the CPU ID
- * rather than directly reading processor_id or read_cpuid() directly.
- */
-static inline unsigned int read_cpuid_id(void) __attribute_const__;
-
-static inline unsigned int read_cpuid_id(void)
-{
- return read_cpuid(CPUID_ID);
-}
-
#define __exception __attribute__((section(".exception.text")))
struct thread_info;
void arm_machine_restart(char mode);
extern void (*arm_pm_restart)(char str);
-/*
- * Intel's XScale3 core supports some v6 features (supersections, L2)
- * but advertises itself as v5 as it does not support the v6 ISA. For
- * this reason, we need a way to explicitly test for this type of CPU.
- */
-#ifndef CONFIG_CPU_XSC3
-#define cpu_is_xsc3() 0
-#else
-static inline int cpu_is_xsc3(void)
-{
- extern unsigned int processor_id;
-
- if ((processor_id & 0xffffe000) == 0x69056000)
- return 1;
-
- return 0;
-}
-#endif
-
-#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
-#define cpu_is_xscale() 0
-#else
-#define cpu_is_xscale() 1
-#endif
-
#define UDBG_UNDEFINED (1 << 0)
#define UDBG_SYSCALL (1 << 1)
#define UDBG_BADABORT (1 << 2)
}
#define thread_saved_pc(tsk) \
- ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc)))
+ ((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
#define thread_saved_fp(tsk) \
((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
#define __get_user_asm_byte(x,addr,err) \
__asm__ __volatile__( \
- "1: ldrbt %1,[%2],#0\n" \
+ "1: ldrbt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .align 2\n" \
#define __get_user_asm_word(x,addr,err) \
__asm__ __volatile__( \
- "1: ldrt %1,[%2],#0\n" \
+ "1: ldrt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .align 2\n" \
#define __put_user_asm_byte(x,__pu_addr,err) \
__asm__ __volatile__( \
- "1: strbt %1,[%2],#0\n" \
+ "1: strbt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .align 2\n" \
#define __put_user_asm_word(x,__pu_addr,err) \
__asm__ __volatile__( \
- "1: strt %1,[%2],#0\n" \
+ "1: strt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .align 2\n" \
#define __put_user_asm_dword(x,__pu_addr,err) \
__asm__ __volatile__( \
"1: strt " __reg_oper1 ", [%1], #4\n" \
- "2: strt " __reg_oper0 ", [%1], #0\n" \
+ "2: strt " __reg_oper0 ", [%1]\n" \
"3:\n" \
" .section .fixup,\"ax\"\n" \
" .align 2\n" \
#ifndef ASMARM_VGA_H
#define ASMARM_VGA_H
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x))
# Object file lists.
-obj-y := compat.o entry-armv.o entry-common.o irq.o \
+obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \
process.o ptrace.o setup.o signal.o \
sys_arm.o stacktrace.o time.o traps.o
#include <linux/delay.h>
#include <linux/in6.h>
#include <linux/syscalls.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
#include <asm/checksum.h>
-#include <asm/io.h>
#include <asm/system.h>
-#include <asm/uaccess.h>
#include <asm/ftrace.h>
/*
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/init.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/mach/pci.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/ep93xx-regs.h>
#include <asm/thread_notify.h>
-#include <asm/io.h>
struct crunch_state *crunch_owner;
ENTRY(printhex8)
mov r1, #8
b printhex
+ENDPROC(printhex8)
ENTRY(printhex4)
mov r1, #4
b printhex
+ENDPROC(printhex4)
ENTRY(printhex2)
mov r1, #2
bne 1b
mov r0, r2
b printascii
+ENDPROC(printhex2)
.ltorg
teqne r1, #0
bne 1b
mov pc, lr
+ENDPROC(printascii)
ENTRY(printch)
addruart r3
mov r1, r0
mov r0, #0
b 1b
+ENDPROC(printch)
hexbuf: .space 16
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
+#include <linux/io.h>
#include <asm/dma.h>
-#include <asm/io.h>
-
#include <asm/mach/dma.h>
#define ISA_DMA_MODE_READ 0x44
--- /dev/null
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/personality.h>
+#include <linux/binfmts.h>
+#include <linux/elf.h>
+
+int elf_check_arch(const struct elf32_hdr *x)
+{
+ unsigned int eflags;
+
+ /* Make sure it's an ARM executable */
+ if (x->e_machine != EM_ARM)
+ return 0;
+
+ /* Make sure the entry address is reasonable */
+ if (x->e_entry & 1) {
+ if (!(elf_hwcap & HWCAP_THUMB))
+ return 0;
+ } else if (x->e_entry & 3)
+ return 0;
+
+ eflags = x->e_flags;
+ if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
+ /* APCS26 is only allowed if the CPU supports it */
+ if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT))
+ return 0;
+
+ /* VFP requires the supporting code */
+ if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP))
+ return 0;
+ }
+ return 1;
+}
+EXPORT_SYMBOL(elf_check_arch);
+
+void elf_set_personality(const struct elf32_hdr *x)
+{
+ unsigned int eflags = x->e_flags;
+ unsigned int personality = PER_LINUX_32BIT;
+
+ /*
+ * APCS-26 is only valid for OABI executables
+ */
+ if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) {
+ if (eflags & EF_ARM_APCS_26)
+ personality = PER_LINUX;
+ }
+
+ set_personality(personality);
+
+ /*
+ * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0
+ * and CP1, we only enable access to the iWMMXt coprocessor if the
+ * binary is EABI or softfloat (and thus, guaranteed not to use
+ * FPA instructions.)
+ */
+ if (elf_hwcap & HWCAP_IWMMXT &&
+ eflags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) {
+ set_thread_flag(TIF_USING_IWMMXT);
+ } else {
+ clear_thread_flag(TIF_USING_IWMMXT);
+ }
+}
+EXPORT_SYMBOL(elf_set_personality);
+
+/*
+ * Set READ_IMPLIES_EXEC if:
+ * - the binary requires an executable stack
+ * - we're running on a CPU which doesn't support NX.
+ */
+int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
+{
+ if (executable_stack != EXSTACK_ENABLE_X)
+ return 1;
+ if (cpu_architecture() <= CPU_ARCH_ARMv6)
+ return 1;
+ return 0;
+}
+EXPORT_SYMBOL(arm_elf_read_implies_exec);
__pabt_invalid:
inv_entry BAD_PREFETCH
b common_invalid
+ENDPROC(__pabt_invalid)
__dabt_invalid:
inv_entry BAD_DATA
b common_invalid
+ENDPROC(__dabt_invalid)
__irq_invalid:
inv_entry BAD_IRQ
b common_invalid
+ENDPROC(__irq_invalid)
__und_invalid:
inv_entry BAD_UNDEFINSTR
mov r0, sp
b bad_mode
+ENDPROC(__und_invalid)
/*
* SVC mode handlers
ldr r0, [sp, #S_PSR]
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
+ENDPROC(__dabt_svc)
.align 5
__irq_svc:
bleq trace_hardirqs_on
#endif
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
+ENDPROC(__irq_svc)
.ltorg
ldr lr, [sp, #S_PSR] @ Get SVC cpsr
msr spsr_cxsf, lr
ldmia sp, {r0 - pc}^ @ Restore SVC registers
+ENDPROC(__und_svc)
.align 5
__pabt_svc:
ldr r0, [sp, #S_PSR]
msr spsr_cxsf, r0
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
+ENDPROC(__pabt_svc)
.align 5
.LCcralign:
mov r2, sp
adr lr, ret_from_exception
b do_DataAbort
+ENDPROC(__dabt_usr)
.align 5
__irq_usr:
mov why, #0
b ret_to_user
+ENDPROC(__irq_usr)
.ltorg
#else
b __und_usr_unknown
#endif
+ENDPROC(__und_usr)
@
@ fallthrough to call_fpe
mov r0, sp
adr lr, ret_from_exception
b do_undefinstr
+ENDPROC(__und_usr_unknown)
.align 5
__pabt_usr:
get_thread_info tsk
mov why, #0
b ret_to_user
+ENDPROC(__pabt_usr)
+ENDPROC(ret_from_exception)
/*
* Register switch for ARMv3 and ARMv4 processors
bl atomic_notifier_call_chain
mov r0, r5
ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously
+ENDPROC(__switch_to)
__INIT
mov r0, sp
ldr lr, [pc, lr, lsl #2]
movs pc, lr @ branch to handler in SVC mode
+ENDPROC(vector_\name)
.endm
.globl __stubs_start
mov r0, r0
add sp, sp, #S_FRAME_SIZE - S_PC
movs pc, lr @ return & move spsr_svc into cpsr
+ENDPROC(ret_to_user)
/*
* This is how we return from a fork.
mov r0, #1 @ trace exit [IP = 1]
bl syscall_trace
b ret_slow_syscall
-
+ENDPROC(ret_from_fork)
.equ NR_syscalls,0
#define CALL(x) .equ NR_syscalls,NR_syscalls+1
eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
bcs arm_syscall
b sys_ni_syscall @ not private func
+ENDPROC(vector_swi)
/*
* This is the really slow path. We're going to be doing
*/
@ r0 = syscall number
@ r8 = syscall table
- .type sys_syscall, #function
sys_syscall:
bic scno, r0, #__NR_OABI_SYSCALL_BASE
cmp scno, #__NR_syscall - __NR_SYSCALL_BASE
movlo r3, r4
ldrlo pc, [tbl, scno, lsl #2]
b sys_ni_syscall
+ENDPROC(sys_syscall)
sys_fork_wrapper:
add r0, sp, #S_OFF
b sys_fork
+ENDPROC(sys_fork_wrapper)
sys_vfork_wrapper:
add r0, sp, #S_OFF
b sys_vfork
+ENDPROC(sys_vfork_wrapper)
sys_execve_wrapper:
add r3, sp, #S_OFF
b sys_execve
+ENDPROC(sys_execve_wrapper)
sys_clone_wrapper:
add ip, sp, #S_OFF
str ip, [sp, #4]
b sys_clone
+ENDPROC(sys_clone_wrapper)
sys_sigsuspend_wrapper:
add r3, sp, #S_OFF
b sys_sigsuspend
+ENDPROC(sys_sigsuspend_wrapper)
sys_rt_sigsuspend_wrapper:
add r2, sp, #S_OFF
b sys_rt_sigsuspend
+ENDPROC(sys_rt_sigsuspend_wrapper)
sys_sigreturn_wrapper:
add r0, sp, #S_OFF
b sys_sigreturn
+ENDPROC(sys_sigreturn_wrapper)
sys_rt_sigreturn_wrapper:
add r0, sp, #S_OFF
b sys_rt_sigreturn
+ENDPROC(sys_rt_sigreturn_wrapper)
sys_sigaltstack_wrapper:
ldr r2, [sp, #S_OFF + S_SP]
b do_sigaltstack
+ENDPROC(sys_sigaltstack_wrapper)
sys_statfs64_wrapper:
teq r1, #88
moveq r1, #84
b sys_statfs64
+ENDPROC(sys_statfs64_wrapper)
sys_fstatfs64_wrapper:
teq r1, #88
moveq r1, #84
b sys_fstatfs64
+ENDPROC(sys_fstatfs64_wrapper)
/*
* Note: off_4k (r5) is always units of 4K. If we can't do the requested
str r5, [sp, #4]
b do_mmap2
#endif
+ENDPROC(sys_mmap2)
ENTRY(pabort_ifar)
mrc p15, 0, r0, cr6, cr0, 2
ENTRY(pabort_noifar)
mov pc, lr
+ENDPROC(pabort_ifar)
+ENDPROC(pabort_noifar)
#ifdef CONFIG_OABI_COMPAT
sys_oabi_pread64:
stmia sp, {r3, r4}
b sys_pread64
+ENDPROC(sys_oabi_pread64)
sys_oabi_pwrite64:
stmia sp, {r3, r4}
b sys_pwrite64
+ENDPROC(sys_oabi_pwrite64)
sys_oabi_truncate64:
mov r3, r2
mov r2, r1
b sys_truncate64
+ENDPROC(sys_oabi_truncate64)
sys_oabi_ftruncate64:
mov r3, r2
mov r2, r1
b sys_ftruncate64
+ENDPROC(sys_oabi_ftruncate64)
sys_oabi_readahead:
str r3, [sp]
mov r3, r2
mov r2, r1
b sys_readahead
+ENDPROC(sys_oabi_readahead)
/*
* Let's declare a second syscall table for old ABI binaries
#include <asm/fiq.h>
#include <asm/irq.h>
#include <asm/system.h>
-#include <asm/uaccess.h>
static unsigned long no_fiq_insn;
* r2 = atags pointer
* r9 = processor ID
*/
- .type __mmap_switched, %function
__mmap_switched:
adr r3, __switch_data + 4
bic r4, r0, #CR_A @ Clear 'A' bit
stmia r7, {r0, r4} @ Save control register values
b start_kernel
+ENDPROC(__mmap_switched)
/*
* Exception handling. Something went wrong and we can't proceed. We
* and hope for the best (useful if bootloader fails to pass a proper
* machine ID for example).
*/
-
- .type __error_p, %function
__error_p:
#ifdef CONFIG_DEBUG_LL
adr r0, str_p1
str_p2: .asciz ").\n"
.align
#endif
+ENDPROC(__error_p)
- .type __error_a, %function
__error_a:
#ifdef CONFIG_DEBUG_LL
mov r4, r1 @ preserve machine ID
adr r0, str_a3
bl printascii
b __error
+ENDPROC(__error_a)
+
str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
.align
#endif
- .type __error, %function
__error:
#ifdef CONFIG_ARCH_RPC
/*
#endif
1: mov r0, r0
b 1b
+ENDPROC(__error)
/*
* r5 = proc_info pointer in physical address space
* r9 = cpuid (preserved)
*/
- .type __lookup_processor_type, %function
__lookup_processor_type:
adr r3, 3f
ldmda r3, {r5 - r7}
blo 1b
mov r5, #0 @ unknown processor
2: mov pc, lr
+ENDPROC(__lookup_processor_type)
/*
* This provides a C-API version of the above function.
bl __lookup_processor_type
mov r0, r5
ldmfd sp!, {r4 - r7, r9, pc}
+ENDPROC(lookup_processor_type)
/*
* Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for
* r3, r4, r6 corrupted
* r5 = mach_info pointer in physical address space
*/
- .type __lookup_machine_type, %function
__lookup_machine_type:
adr r3, 3b
ldmia r3, {r4, r5, r6}
blo 1b
mov r5, #0 @ unknown machine
2: mov pc, lr
+ENDPROC(__lookup_machine_type)
/*
* This provides a C-API version of the above function.
bl __lookup_machine_type
mov r0, r5
ldmfd sp!, {r4 - r6, pc}
+ENDPROC(lookup_machine_type)
/* Determine validity of the r2 atags pointer. The heuristic requires
* that the pointer be aligned, in the first 16k of physical RAM and
* r2 either valid atags pointer, or zero
* r5, r6 corrupted
*/
-
- .type __vet_atags, %function
__vet_atags:
tst r2, #0x3 @ aligned?
bne 1f
1: mov r2, #0
mov pc, lr
+ENDPROC(__vet_atags)
*
*/
.section ".text.head", "ax"
- .type stext, %function
ENTRY(stext)
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
@ and irqs disabled
@ the initialization is done
adr lr, __after_proc_init @ return (PIC) address
add pc, r10, #PROCINFO_INITFUNC
+ENDPROC(stext)
/*
* Set the Control Register and Read the process ID.
*/
- .type __after_proc_init, %function
__after_proc_init:
#ifdef CONFIG_CPU_CP15
mrc p15, 0, r0, c1, c0, 0 @ read control reg
mov pc, r13 @ clear the BSS and jump
@ to start_kernel
+ENDPROC(__after_proc_init)
.ltorg
#include "head-common.S"
* circumstances, zImage) is for.
*/
.section ".text.head", "ax"
- .type stext, %function
ENTRY(stext)
msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
@ and irqs disabled
@ mmu has been enabled
adr lr, __enable_mmu @ return (PIC) address
add pc, r10, #PROCINFO_INITFUNC
+ENDPROC(stext)
#if defined(CONFIG_SMP)
- .type secondary_startup, #function
ENTRY(secondary_startup)
/*
* Common entry point for secondary CPUs.
adr lr, __enable_mmu @ return address
add pc, r10, #PROCINFO_INITFUNC @ initialise processor
@ (return control reg)
+ENDPROC(secondary_startup)
/*
* r6 = &secondary_data
ldr sp, [r7, #4] @ get secondary_data.stack
mov fp, #0
b secondary_start_kernel
+ENDPROC(__secondary_switched)
.type __secondary_data, %object
__secondary_data:
* this is just loading the page table pointer and domain access
* registers.
*/
- .type __enable_mmu, %function
__enable_mmu:
#ifdef CONFIG_ALIGNMENT_TRAP
orr r0, r0, #CR_A
mcr p15, 0, r5, c3, c0, 0 @ load domain access register
mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
b __turn_mmu_on
+ENDPROC(__enable_mmu)
/*
* Enable the MMU. This completely changes the structure of the visible
* other registers depend on the function called upon completion
*/
.align 5
- .type __turn_mmu_on, %function
__turn_mmu_on:
mov r0, r0
mcr p15, 0, r0, c1, c0, 0 @ write control reg
mov r3, r3
mov r3, r3
mov pc, r13
-
+ENDPROC(__turn_mmu_on)
/*
* r0, r3, r6, r7 corrupted
* r4 = physical page table address
*/
- .type __create_page_tables, %function
__create_page_tables:
pgtbl r4 @ page table address
#endif
#endif
mov pc, lr
+ENDPROC(__create_page_tables)
.ltorg
#include "head-common.S"
#include <linux/init.h>
#include <linux/init_task.h>
#include <linux/mqueue.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/pgtable.h>
static struct fs_struct init_fs = INIT_FS;
#include <linux/module.h>
#include <linux/types.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
/*
* Copy data from IO memory space to "real" memory space.
if (!ubit)
addr -= reg_count;
- addr += (!pbit ^ !ubit);
+ addr += (!pbit == !ubit);
reg_bit_vector = insn & 0xffff;
while (reg_bit_vector) {
if (wbit) {
if (!ubit)
addr -= reg_count;
- addr -= (!pbit ^ !ubit);
+ addr -= (!pbit == !ubit);
regs->uregs[rn] = (long)addr;
}
}
}
}
-int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
+static int __kprobes kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
{
+ unsigned long flags;
+ local_irq_save(flags);
kprobe_handler(regs);
+ local_irq_restore(flags);
return 0;
}
#include <linux/kexec.h>
#include <linux/delay.h>
#include <linux/reboot.h>
+#include <linux/io.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/mmu_context.h>
-#include <asm/io.h>
#include <asm/cacheflush.h>
#include <asm/mach-types.h>
if (!area)
return NULL;
- return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL);
+ return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL_EXEC);
}
#else /* CONFIG_MMU */
void *module_alloc(unsigned long size)
#include <linux/pm.h>
#include <linux/tick.h>
#include <linux/utsname.h>
+#include <linux/uaccess.h>
#include <asm/leds.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/thread_notify.h>
-#include <asm/uaccess.h>
#include <asm/mach/time.h>
static const char *processor_modes[] = {
__backtrace();
}
-void show_fpregs(struct user_fp *regs)
-{
- int i;
-
- for (i = 0; i < 8; i++) {
- unsigned long *p;
- char type;
-
- p = (unsigned long *)(regs->fpregs + i);
-
- switch (regs->ftype[i]) {
- case 1: type = 'f'; break;
- case 2: type = 'd'; break;
- case 3: type = 'e'; break;
- default: type = '?'; break;
- }
- if (regs->init_flag)
- type = '?';
-
- printk(" f%d(%c): %08lx %08lx %08lx%c",
- i, type, p[0], p[1], p[2], i & 1 ? '\n' : ' ');
- }
-
-
- printk("FPSR: %08lx FPCR: %08lx\n",
- (unsigned long)regs->fpsr,
- (unsigned long)regs->fpcr);
-}
-
/*
* Free current thread data structures etc..
*/
do {
if (fp < stack_start || fp > stack_end)
return 0;
- lr = pc_pointer (((unsigned long *)fp)[-1]);
+ lr = ((unsigned long *)fp)[-1];
if (!in_sched_functions(lr))
return lr;
fp = *(unsigned long *) (fp - 12);
#include <linux/security.h>
#include <linux/init.h>
#include <linux/signal.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/traps.h>
val = get_user_reg(child, reg);
if (reg == 15)
- val = pc_pointer(val + 8);
+ val += 8;
return val;
}
else
base -= aluop2;
}
- if (read_u32(child, base, &alt) == 0)
- alt = pc_pointer(alt);
+ read_u32(child, base, &alt);
}
break;
base = ptrace_getrn(child, insn);
- if (read_u32(child, base + nr_regs, &alt) == 0)
- alt = pc_pointer(alt);
+ read_u32(child, base + nr_regs, &alt);
break;
}
break;
#include <linux/fs.h>
#include <asm/cpu.h>
+#include <asm/cputype.h>
#include <asm/elf.h>
#include <asm/procinfo.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/cacheflush.h>
+#include <asm/cachetype.h>
#include <asm/tlbflush.h>
#include <asm/mach/arch.h>
extern void paging_init(struct meminfo *, struct machine_desc *desc);
extern void reboot_setup(char *str);
-extern int root_mountflags;
-extern void _stext, _text, _etext, __data_start, _edata, _end;
+extern void _text, _etext, __data_start, _edata, _end;
unsigned int processor_id;
EXPORT_SYMBOL(processor_id);
unsigned int __machine_arch_type;
EXPORT_SYMBOL(__machine_arch_type);
+unsigned int cacheid;
+EXPORT_SYMBOL(cacheid);
unsigned int __atags_pointer __initdata;
unsigned int elf_hwcap;
EXPORT_SYMBOL(elf_hwcap);
-unsigned long __initdata vmalloc_reserve = 128 << 20;
-
#ifdef MULTI_CPU
struct processor processor;
char elf_platform[ELF_PLATFORM_SIZE];
EXPORT_SYMBOL(elf_platform);
-unsigned long phys_initrd_start __initdata = 0;
-unsigned long phys_initrd_size __initdata = 0;
-
static struct meminfo meminfo __initdata = { 0, };
static const char *cpu_name;
static const char *machine_name;
#define lp1 io_res[1]
#define lp2 io_res[2]
-static const char *cache_types[16] = {
- "write-through",
- "write-back",
- "write-back",
- "undefined 3",
- "undefined 4",
- "undefined 5",
- "write-back",
- "write-back",
- "undefined 8",
- "undefined 9",
- "undefined 10",
- "undefined 11",
- "undefined 12",
- "undefined 13",
- "write-back",
- "undefined 15",
-};
-
-static const char *cache_clean[16] = {
- "not required",
- "read-block",
- "cp15 c7 ops",
- "undefined 3",
- "undefined 4",
- "undefined 5",
- "cp15 c7 ops",
- "cp15 c7 ops",
- "undefined 8",
- "undefined 9",
- "undefined 10",
- "undefined 11",
- "undefined 12",
- "undefined 13",
- "cp15 c7 ops",
- "undefined 15",
-};
-
-static const char *cache_lockdown[16] = {
- "not supported",
- "not supported",
- "not supported",
- "undefined 3",
- "undefined 4",
- "undefined 5",
- "format A",
- "format B",
- "undefined 8",
- "undefined 9",
- "undefined 10",
- "undefined 11",
- "undefined 12",
- "undefined 13",
- "format C",
- "undefined 15",
-};
-
static const char *proc_arch[] = {
"undefined/unknown",
"3",
"?(17)",
};
-#define CACHE_TYPE(x) (((x) >> 25) & 15)
-#define CACHE_S(x) ((x) & (1 << 24))
-#define CACHE_DSIZE(x) (((x) >> 12) & 4095) /* only if S=1 */
-#define CACHE_ISIZE(x) ((x) & 4095)
-
-#define CACHE_SIZE(y) (((y) >> 6) & 7)
-#define CACHE_ASSOC(y) (((y) >> 3) & 7)
-#define CACHE_M(y) ((y) & (1 << 2))
-#define CACHE_LINE(y) ((y) & 3)
-
-static inline void dump_cache(const char *prefix, int cpu, unsigned int cache)
-{
- unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0);
-
- printk("CPU%u: %s: %d bytes, associativity %d, %d byte lines, %d sets\n",
- cpu, prefix,
- mult << (8 + CACHE_SIZE(cache)),
- (mult << CACHE_ASSOC(cache)) >> 1,
- 8 << CACHE_LINE(cache),
- 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) -
- CACHE_LINE(cache)));
-}
-
-static void __init dump_cpu_info(int cpu)
-{
- unsigned int info = read_cpuid(CPUID_CACHETYPE);
-
- if (info != processor_id) {
- printk("CPU%u: D %s %s cache\n", cpu, cache_is_vivt() ? "VIVT" : "VIPT",
- cache_types[CACHE_TYPE(info)]);
- if (CACHE_S(info)) {
- dump_cache("I cache", cpu, CACHE_ISIZE(info));
- dump_cache("D cache", cpu, CACHE_DSIZE(info));
- } else {
- dump_cache("cache", cpu, CACHE_ISIZE(info));
- }
- }
-
- if (arch_is_coherent())
- printk("Cache coherency enabled\n");
-}
-
int cpu_architecture(void)
{
int cpu_arch;
- if ((processor_id & 0x0008f000) == 0) {
+ if ((read_cpuid_id() & 0x0008f000) == 0) {
cpu_arch = CPU_ARCH_UNKNOWN;
- } else if ((processor_id & 0x0008f000) == 0x00007000) {
- cpu_arch = (processor_id & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
- } else if ((processor_id & 0x00080000) == 0x00000000) {
- cpu_arch = (processor_id >> 16) & 7;
+ } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
+ cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
+ } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
+ cpu_arch = (read_cpuid_id() >> 16) & 7;
if (cpu_arch)
cpu_arch += CPU_ARCH_ARMv3;
- } else if ((processor_id & 0x000f0000) == 0x000f0000) {
+ } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
unsigned int mmfr0;
/* Revised CPUID format. Read the Memory Model Feature
return cpu_arch;
}
+static void __init cacheid_init(void)
+{
+ unsigned int cachetype = read_cpuid_cachetype();
+ unsigned int arch = cpu_architecture();
+
+ if (arch >= CPU_ARCH_ARMv7) {
+ cacheid = CACHEID_VIPT_NONALIASING;
+ if ((cachetype & (3 << 14)) == 1 << 14)
+ cacheid |= CACHEID_ASID_TAGGED;
+ } else if (arch >= CPU_ARCH_ARMv6) {
+ if (cachetype & (1 << 23))
+ cacheid = CACHEID_VIPT_ALIASING;
+ else
+ cacheid = CACHEID_VIPT_NONALIASING;
+ } else {
+ cacheid = CACHEID_VIVT;
+ }
+
+ printk("CPU: %s data cache, %s instruction cache\n",
+ cache_is_vivt() ? "VIVT" :
+ cache_is_vipt_aliasing() ? "VIPT aliasing" :
+ cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
+ cache_is_vivt() ? "VIVT" :
+ icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
+ cache_is_vipt_aliasing() ? "VIPT aliasing" :
+ cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
+}
+
/*
* These functions re-use the assembly code in head.S, which
* already provide the required functionality.
* types. The linker builds this table for us from the
* entries in arch/arm/mm/proc-*.S
*/
- list = lookup_processor_type(processor_id);
+ list = lookup_processor_type(read_cpuid_id());
if (!list) {
printk("CPU configuration botched (ID %08x), unable "
- "to continue.\n", processor_id);
+ "to continue.\n", read_cpuid_id());
while (1);
}
#endif
printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
- cpu_name, processor_id, (int)processor_id & 15,
+ cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
proc_arch[cpu_architecture()], cr_alignment);
sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
elf_hwcap &= ~HWCAP_THUMB;
#endif
+ cacheid_init();
cpu_proc_init();
}
/*
* cpu_init - initialise one CPU.
*
- * cpu_init dumps the cache information, initialises SMP specific
- * information, and sets up the per-CPU stacks.
+ * cpu_init sets up the per-CPU stacks.
*/
void cpu_init(void)
{
BUG();
}
- if (system_state == SYSTEM_BOOTING)
- dump_cpu_info(cpu);
-
/*
* setup stacks for re-entrant exception handlers
*/
return list;
}
-static void __init early_initrd(char **p)
-{
- unsigned long start, size;
-
- start = memparse(*p, p);
- if (**p == ',') {
- size = memparse((*p) + 1, p);
-
- phys_initrd_start = start;
- phys_initrd_size = size;
- }
-}
-__early_param("initrd=", early_initrd);
-
static void __init arm_add_memory(unsigned long start, unsigned long size)
{
struct membank *bank;
__early_param("mem=", early_mem);
/*
- * vmalloc=size forces the vmalloc area to be exactly 'size'
- * bytes. This can be used to increase (or decrease) the vmalloc
- * area - the default is 128m.
- */
-static void __init early_vmalloc(char **arg)
-{
- vmalloc_reserve = memparse(*arg, arg);
-}
-__early_param("vmalloc=", early_vmalloc);
-
-/*
* Initial parsing of the command line.
*/
static void __init parse_cmdline(char **cmdline_p, char *from)
struct early_params *p;
for (p = &__early_begin; p < &__early_end; p++) {
- int len = strlen(p->arg);
+ int arglen = strlen(p->arg);
- if (memcmp(from, p->arg, len) == 0) {
+ if (memcmp(from, p->arg, arglen) == 0) {
if (to != command_line)
to -= 1;
- from += len;
+ from += arglen;
p->fn(&from);
while (*from != ' ' && *from != '\0')
kernel_data.end = virt_to_phys(&_end - 1);
for (i = 0; i < mi->nr_banks; i++) {
- unsigned long virt_start, virt_end;
-
if (mi->bank[i].size == 0)
continue;
- virt_start = __phys_to_virt(mi->bank[i].start);
- virt_end = virt_start + mi->bank[i].size - 1;
-
res = alloc_bootmem_low(sizeof(*res));
res->name = "System RAM";
- res->start = __virt_to_phys(virt_start);
- res->end = __virt_to_phys(virt_end);
+ res->start = mi->bank[i].start;
+ res->end = mi->bank[i].start + mi->bank[i].size - 1;
res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
request_resource(&iomem_resource, res);
__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
-static int __init parse_tag_initrd(const struct tag *tag)
-{
- printk(KERN_WARNING "ATAG_INITRD is deprecated; "
- "please update your bootloader.\n");
- phys_initrd_start = __virt_to_phys(tag->u.initrd.start);
- phys_initrd_size = tag->u.initrd.size;
- return 0;
-}
-
-__tagtable(ATAG_INITRD, parse_tag_initrd);
-
-static int __init parse_tag_initrd2(const struct tag *tag)
-{
- phys_initrd_start = tag->u.initrd.start;
- phys_initrd_size = tag->u.initrd.size;
- return 0;
-}
-
-__tagtable(ATAG_INITRD2, parse_tag_initrd2);
-
static int __init parse_tag_serialnr(const struct tag *tag)
{
system_serial_low = tag->u.serialnr.low;
NULL
};
-static void
-c_show_cache(struct seq_file *m, const char *type, unsigned int cache)
-{
- unsigned int mult = 2 + (CACHE_M(cache) ? 1 : 0);
-
- seq_printf(m, "%s size\t\t: %d\n"
- "%s assoc\t\t: %d\n"
- "%s line length\t: %d\n"
- "%s sets\t\t: %d\n",
- type, mult << (8 + CACHE_SIZE(cache)),
- type, (mult << CACHE_ASSOC(cache)) >> 1,
- type, 8 << CACHE_LINE(cache),
- type, 1 << (6 + CACHE_SIZE(cache) - CACHE_ASSOC(cache) -
- CACHE_LINE(cache)));
-}
-
static int c_show(struct seq_file *m, void *v)
{
int i;
seq_printf(m, "Processor\t: %s rev %d (%s)\n",
- cpu_name, (int)processor_id & 15, elf_platform);
+ cpu_name, read_cpuid_id() & 15, elf_platform);
#if defined(CONFIG_SMP)
for_each_online_cpu(i) {
if (elf_hwcap & (1 << i))
seq_printf(m, "%s ", hwcap_str[i]);
- seq_printf(m, "\nCPU implementer\t: 0x%02x\n", processor_id >> 24);
+ seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
- if ((processor_id & 0x0008f000) == 0x00000000) {
+ if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
/* pre-ARM7 */
- seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4);
+ seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
} else {
- if ((processor_id & 0x0008f000) == 0x00007000) {
+ if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
/* ARM7 */
seq_printf(m, "CPU variant\t: 0x%02x\n",
- (processor_id >> 16) & 127);
+ (read_cpuid_id() >> 16) & 127);
} else {
/* post-ARM7 */
seq_printf(m, "CPU variant\t: 0x%x\n",
- (processor_id >> 20) & 15);
+ (read_cpuid_id() >> 20) & 15);
}
seq_printf(m, "CPU part\t: 0x%03x\n",
- (processor_id >> 4) & 0xfff);
- }
- seq_printf(m, "CPU revision\t: %d\n", processor_id & 15);
-
- {
- unsigned int cache_info = read_cpuid(CPUID_CACHETYPE);
- if (cache_info != processor_id) {
- seq_printf(m, "Cache type\t: %s\n"
- "Cache clean\t: %s\n"
- "Cache lockdown\t: %s\n"
- "Cache format\t: %s\n",
- cache_types[CACHE_TYPE(cache_info)],
- cache_clean[CACHE_TYPE(cache_info)],
- cache_lockdown[CACHE_TYPE(cache_info)],
- CACHE_S(cache_info) ? "Harvard" : "Unified");
-
- if (CACHE_S(cache_info)) {
- c_show_cache(m, "I", CACHE_ISIZE(cache_info));
- c_show_cache(m, "D", CACHE_DSIZE(cache_info));
- } else {
- c_show_cache(m, "Cache", CACHE_ISIZE(cache_info));
- }
- }
+ (read_cpuid_id() >> 4) & 0xfff);
}
+ seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
seq_puts(m, "\n");
#include <linux/signal.h>
#include <linux/personality.h>
#include <linux/freezer.h>
+#include <linux/uaccess.h>
#include <asm/elf.h>
#include <asm/cacheflush.h>
#include <asm/ucontext.h>
-#include <asm/uaccess.h>
#include <asm/unistd.h>
#include "ptrace.h"
#include <linux/file.h>
#include <linux/utsname.h>
#include <linux/ipc.h>
-
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
extern unsigned long do_mremap(unsigned long addr, unsigned long old_len,
unsigned long new_len, unsigned long flags,
#include <linux/socket.h>
#include <linux/net.h>
#include <linux/ipc.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
struct oldabi_stat64 {
unsigned long long st_dev;
if (in_lock_functions(pc)) {
fp = regs->ARM_fp;
- pc = pc_pointer(((unsigned long *)fp)[-1]);
+ pc = ((unsigned long *)fp)[-1];
}
return pc;
#include <linux/kallsyms.h>
#include <linux/delay.h>
#include <linux/init.h>
-#include <linux/kprobes.h>
+#include <linux/uaccess.h>
#include <asm/atomic.h>
#include <asm/cacheflush.h>
#include <asm/system.h>
-#include <asm/uaccess.h>
#include <asm/unistd.h>
#include <asm/traps.h>
-#include <asm/io.h>
#include "ptrace.h"
#include "signal.h"
*/
static int verify_stack(unsigned long sp)
{
- if (sp < PAGE_OFFSET || (sp > (unsigned long)high_memory && high_memory != 0))
+ if (sp < PAGE_OFFSET ||
+ (sp > (unsigned long)high_memory && high_memory != NULL))
return -EFAULT;
return 0;
get_user(instr, (u32 __user *)pc);
}
-#ifdef CONFIG_KPROBES
- /*
- * It is possible to have recursive kprobes, so we can't call
- * the kprobe trap handler with the undef_lock held.
- */
- if (instr == KPROBE_BREAKPOINT_INSTRUCTION && !user_mode(regs)) {
- kprobe_trap_handler(regs, instr);
- return;
- }
-#endif
-
if (call_undef_hook(regs, instr) == 0)
return;
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/thread_notify.h>
-#include <asm/io.h>
static inline void dsp_save_state(u32 *state)
{
mov al, al, lsl r2
mov pc, lr
+ENDPROC(__ashldi3)
+ENDPROC(__aeabi_llsl)
mov ah, ah, asr r2
mov pc, lr
+ENDPROC(__ashrdi3)
+ENDPROC(__aeabi_lasr)
#if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK)
mov pc, lr
+ENDPROC(__backtrace)
+ENDPROC(c_backtrace)
#else
stmfd sp!, {r4 - r8, lr} @ Save an extra register so we have a location...
movs frame, r0 @ if frame pointer is zero
mov r1, frame
bl printk
no_frame: ldmfd sp!, {r4 - r8, pc}
+ENDPROC(__backtrace)
+ENDPROC(c_backtrace)
.section __ex_table,"a"
.align 3
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_change_bit_le)
bitop eor
+ENDPROC(_change_bit_be)
+ENDPROC(_change_bit_le)
USER( strnebt r2, [r0], #1)
USER( strnebt r2, [r0], #1)
tst r1, #1 @ x1 x0 x1 x0 x1 x0 x1
-USER( strnebt r2, [r0], #1)
+USER( strnebt r2, [r0])
mov r0, #0
ldmfd sp!, {r1, pc}
+ENDPROC(__clear_user)
.section .fixup,"ax"
.align 0
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_clear_bit_le)
bitop bic
+ENDPROC(_clear_bit_be)
+ENDPROC(_clear_bit_le)
#include "copy_template.S"
+ENDPROC(__copy_from_user)
+
.section .fixup,"ax"
.align 0
copy_abort_preamble
PLD( ldmeqia r1!, {r3, r4, ip, lr} )
PLD( beq 2b )
ldmfd sp!, {r4, pc} @ 3
+ENDPROC(copy_page)
#include "copy_template.S"
+ENDPROC(__copy_to_user)
+
.section .fixup,"ax"
.align 0
copy_abort_preamble
adcs r0, r0, r2
adcs r0, r0, #0
ldmfd sp!, {pc}
+ENDPROC(__csum_ipv6_magic)
tst len, #0x1c
bne 4b
b .Lless4
+ENDPROC(csum_partial)
*/
.macro save_regs
- mov ip, sp
- stmfd sp!, {r1, r4 - r8, fp, ip, lr, pc}
- sub fp, ip, #4
+ stmfd sp!, {r1, r4 - r8, lr}
.endm
.macro load_regs
- ldmfd sp, {r1, r4 - r8, fp, sp, pc}
+ ldmfd sp!, {r1, r4 - r8, pc}
.endm
.macro load1b, reg1
.endm
#define FN_ENTRY ENTRY(csum_partial_copy_nocheck)
+#define FN_EXIT ENDPROC(csum_partial_copy_nocheck)
#include "csumpartialcopygeneric.S"
adcs sum, sum, r4, push #24
mov r5, r4, get_byte_1
b .Lexit
+FN_EXIT
.text
.macro save_regs
- mov ip, sp
- stmfd sp!, {r1 - r2, r4 - r8, fp, ip, lr, pc}
- sub fp, ip, #4
+ stmfd sp!, {r1, r2, r4 - r8, lr}
.endm
.macro load_regs
- ldmfd sp, {r1, r2, r4-r8, fp, sp, pc}
+ ldmfd sp!, {r1, r2, r4 - r8, pc}
.endm
.macro load1b, reg1
*/
#define FN_ENTRY ENTRY(csum_partial_copy_from_user)
+#define FN_EXIT ENDPROC(csum_partial_copy_from_user)
#include "csumpartialcopygeneric.S"
#endif
bhi __delay
mov pc, lr
+ENDPROC(__udelay)
+ENDPROC(__const_udelay)
+ENDPROC(__delay)
mov xh, #0
ldr pc, [sp], #8
+ENDPROC(__do_div64)
blo 1b
3: mov r0, r1 @ no free bits
mov pc, lr
+ENDPROC(_find_first_zero_bit_le)
/*
* Purpose : Find next 'zero' bit
orr r2, r2, #7 @ if zero, then no bits here
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
+ENDPROC(_find_next_zero_bit_le)
/*
* Purpose : Find a 'one' bit
blo 1b
3: mov r0, r1 @ no free bits
mov pc, lr
+ENDPROC(_find_first_bit_le)
/*
* Purpose : Find next 'one' bit
orr r2, r2, #7 @ if zero, then no bits here
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
+ENDPROC(_find_next_bit_le)
#ifdef __ARMEB__
blo 1b
3: mov r0, r1 @ no free bits
mov pc, lr
+ENDPROC(_find_first_zero_bit_be)
ENTRY(_find_next_zero_bit_be)
teq r1, #0
orr r2, r2, #7 @ if zero, then no bits here
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
+ENDPROC(_find_next_zero_bit_be)
ENTRY(_find_first_bit_be)
teq r1, #0
blo 1b
3: mov r0, r1 @ no free bits
mov pc, lr
+ENDPROC(_find_first_bit_be)
ENTRY(_find_next_bit_be)
teq r1, #0
orr r2, r2, #7 @ if zero, then no bits here
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
+ENDPROC(_find_next_bit_be)
#endif
* Note that ADDR_LIMIT is either 0 or 0xc0000000.
* Note also that it is intended that __get_user_bad is not global.
*/
+#include <linux/linkage.h>
#include <asm/errno.h>
- .global __get_user_1
-__get_user_1:
+ENTRY(__get_user_1)
1: ldrbt r2, [r0]
mov r0, #0
mov pc, lr
+ENDPROC(__get_user_1)
- .global __get_user_2
-__get_user_2:
+ENTRY(__get_user_2)
2: ldrbt r2, [r0], #1
3: ldrbt r3, [r0]
#ifndef __ARMEB__
#endif
mov r0, #0
mov pc, lr
+ENDPROC(__get_user_2)
- .global __get_user_4
-__get_user_4:
+ENTRY(__get_user_4)
4: ldrt r2, [r0]
mov r0, #0
mov pc, lr
+ENDPROC(__get_user_4)
__get_user_bad:
mov r2, #0
mov r0, #-EFAULT
mov pc, lr
+ENDPROC(__get_user_bad)
.section __ex_table, "a"
.long 1b, __get_user_bad
strgtb r3, [r1]
ldmfd sp!, {r4 - r6, pc}
+ENDPROC(__raw_readsb)
8: mov r3, ip, get_byte_0
strb r3, [r1, #0]
mov pc, lr
+ENDPROC(__raw_readsl)
_BE_ONLY_( movne ip, ip, lsr #24 )
strneb ip, [r1]
ldmfd sp!, {r4, pc}
+ENDPROC(__raw_readsw)
strgtb r3, [r0]
ldmfd sp!, {r4, r5, pc}
+ENDPROC(__raw_writesb)
str ip, [r0]
bne 6b
mov pc, lr
+ENDPROC(__raw_writesl)
3: movne ip, r3, lsr #8
strneh ip, [r0]
mov pc, lr
+ENDPROC(__raw_writesw)
mov r0, r0, lsr r2
mov pc, lr
+ENDPROC(__udivsi3)
+ENDPROC(__aeabi_uidiv)
ENTRY(__umodsi3)
mov pc, lr
+ENDPROC(__umodsi3)
ENTRY(__divsi3)
ENTRY(__aeabi_idiv)
rsbmi r0, r0, #0
mov pc, lr
+ENDPROC(__divsi3)
+ENDPROC(__aeabi_idiv)
ENTRY(__modsi3)
rsbmi r0, r0, #0
mov pc, lr
+ENDPROC(__modsi3)
+
#ifdef CONFIG_AEABI
ENTRY(__aeabi_uidivmod)
sub r1, r1, r3
mov pc, lr
+ENDPROC(__aeabi_uidivmod)
+
ENTRY(__aeabi_idivmod)
stmfd sp!, {r0, r1, ip, lr}
sub r1, r1, r3
mov pc, lr
+ENDPROC(__aeabi_idivmod)
+
#endif
Ldiv0:
mov ah, ah, lsr r2
mov pc, lr
+ENDPROC(__lshrdi3)
+ENDPROC(__aeabi_llsr)
sub r0, r0, #1
2: movne r0, #0
mov pc, lr
+ENDPROC(memchr)
#include "copy_template.S"
+ENDPROC(memcpy)
18: backward_copy_shift push=24 pull=8
+ENDPROC(memmove)
tst r2, #1
strneb r1, [r0], #1
mov pc, lr
+ENDPROC(memset)
tst r1, #1 @ 1 a byte left over
strneb r2, [r0], #1 @ 1
mov pc, lr @ 1
+ENDPROC(__memzero)
adc xh, xh, ip, lsr #16
mov pc, lr
+ENDPROC(__muldi3)
+ENDPROC(__aeabi_lmul)
* Note that ADDR_LIMIT is either 0 or 0xc0000000
* Note also that it is intended that __put_user_bad is not global.
*/
+#include <linux/linkage.h>
#include <asm/errno.h>
- .global __put_user_1
-__put_user_1:
+ENTRY(__put_user_1)
1: strbt r2, [r0]
mov r0, #0
mov pc, lr
+ENDPROC(__put_user_1)
- .global __put_user_2
-__put_user_2:
+ENTRY(__put_user_2)
mov ip, r2, lsr #8
#ifndef __ARMEB__
2: strbt r2, [r0], #1
#endif
mov r0, #0
mov pc, lr
+ENDPROC(__put_user_2)
- .global __put_user_4
-__put_user_4:
+ENTRY(__put_user_4)
4: strt r2, [r0]
mov r0, #0
mov pc, lr
+ENDPROC(__put_user_4)
- .global __put_user_8
-__put_user_8:
+ENTRY(__put_user_8)
5: strt r2, [r0], #4
6: strt r3, [r0]
mov r0, #0
mov pc, lr
+ENDPROC(__put_user_8)
__put_user_bad:
mov r0, #-EFAULT
mov pc, lr
+ENDPROC(__put_user_bad)
.section __ex_table, "a"
.long 1b, __put_user_bad
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_set_bit_le)
bitop orr
+ENDPROC(_set_bit_be)
+ENDPROC(_set_bit_le)
ldmfd sp!, {r4 - r8, pc}
+ENDPROC(sha_transform)
+
.L_sha_K:
.word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
stmia r0, {r1, r2, r3, ip, lr}
ldr pc, [sp], #4
+ENDPROC(sha_init)
movne r0, #0
subeq r0, r0, #1
mov pc, lr
+ENDPROC(strchr)
sub r1, r1, #1 @ take NUL character out of count
2: sub r0, r1, ip
mov pc, lr
+ENDPROC(__strncpy_from_user)
.section .fixup,"ax"
.align 0
add r0, r0, #1
2: sub r0, r0, r2
mov pc, lr
+ENDPROC(__strnlen_user)
.section .fixup,"ax"
.align 0
bne 1b
mov r0, r3
mov pc, lr
+ENDPROC(strrchr)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_test_and_change_bit_le)
testop eor, strb
+ENDPROC(_test_and_change_bit_be)
+ENDPROC(_test_and_change_bit_le)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_test_and_clear_bit_le)
testop bicne, strneb
+ENDPROC(_test_and_clear_bit_be)
+ENDPROC(_test_and_clear_bit_le)
eor r0, r0, #0x18 @ big endian byte ordering
ENTRY(_test_and_set_bit_le)
testop orreq, streqb
+ENDPROC(_test_and_set_bit_be)
+ENDPROC(_test_and_set_bit_le)
ldrgtb r3, [r1], #0
USER( strgtbt r3, [r0], #1) @ May fault
b .Lc2u_finished
+ENDPROC(__copy_to_user)
.section .fixup,"ax"
.align 0
USER( ldrgtbt r3, [r1], #1) @ May fault
strgtb r3, [r0], #1
b .Lcfu_finished
+ENDPROC(__copy_from_user)
.section .fixup,"ax"
.align 0
movhi r0, #2
mov pc, lr
+ENDPROC(__ucmpdi2)
+
#ifdef CONFIG_AEABI
ENTRY(__aeabi_ulcmp)
movhi r0, #1
mov pc, lr
+ENDPROC(__aeabi_ulcmp)
+
#endif
Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
<http://www.olimex.com/dev/sam9-L9260.html>
+config MACH_AFEB9260
+ bool "Custom afeb9260 board v1"
+ depends on ARCH_AT91SAM9260
+ help
+ Select this if you are using custom afeb9260 board based on
+ open hardware design. Select this for revision 1 of the board.
+ <svn://194.85.238.22/home/users/george/svn/arm9eb>
+ <http://groups.google.com/group/arm9fpga-evolution-board>
+
config MACH_USB_A9260
bool "CALAO USB-A9260"
depends on ARCH_AT91SAM9260
Select this if you need to program one or more of the PCK0..PCK3
programmable clock outputs.
+config AT91_SLOW_CLOCK
+ bool "Suspend-to-RAM disables main oscillator"
+ depends on SUSPEND
+ help
+ Select this if you want Suspend-to-RAM to save the most power
+ possible (without powering off the CPU) by disabling the PLLs
+ and main oscillator so that only the 32 KiHz clock is available.
+
+ When only that slow-clock is available, some peripherals lose
+ functionality. Many can't issue wakeup events unless faster
+ clocks are available. Some lose their operating state and
+ need to be completely re-initialized.
+
config AT91_TIMER_HZ
int "Kernel HZ (jiffies per second)"
range 32 1024
obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o
obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
+obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
# AT91SAM9261 board-specific support
obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
# Power Management
obj-$(CONFIG_PM) += pm.o
+obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
ifeq ($(CONFIG_PM_DEBUG),y)
CFLAGS_pm.o += -DDEBUG
.pmc_mask = 1 << AT91CAP9_ID_TCB,
.type = CLK_TYPE_PERIPHERAL,
};
-static struct clk pwmc_clk = {
- .name = "pwmc_clk",
+static struct clk pwm_clk = {
+ .name = "pwm_clk",
.pmc_mask = 1 << AT91CAP9_ID_PWMC,
.type = CLK_TYPE_PERIPHERAL,
};
&ssc1_clk,
&ac97_clk,
&tcb_clk,
- &pwmc_clk,
+ &pwm_clk,
&macb_clk,
&aestdes_clk,
&adc_clk,
/* --------------------------------------------------------------------
+ * PWM
+ * --------------------------------------------------------------------*/
+
+#if defined(CONFIG_ATMEL_PWM)
+static u32 pwm_mask;
+
+static struct resource pwm_resources[] = {
+ [0] = {
+ .start = AT91CAP9_BASE_PWMC,
+ .end = AT91CAP9_BASE_PWMC + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91CAP9_ID_PWMC,
+ .end = AT91CAP9_ID_PWMC,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91cap9_pwm0_device = {
+ .name = "atmel_pwm",
+ .id = -1,
+ .dev = {
+ .platform_data = &pwm_mask,
+ },
+ .resource = pwm_resources,
+ .num_resources = ARRAY_SIZE(pwm_resources),
+};
+
+void __init at91_add_device_pwm(u32 mask)
+{
+ if (mask & (1 << AT91_PWM0))
+ at91_set_A_periph(AT91_PIN_PB19, 1); /* enable PWM0 */
+
+ if (mask & (1 << AT91_PWM1))
+ at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
+
+ if (mask & (1 << AT91_PWM2))
+ at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
+
+ if (mask & (1 << AT91_PWM3))
+ at91_set_B_periph(AT91_PIN_PA11, 1); /* enable PWM3 */
+
+ pwm_mask = mask;
+
+ platform_device_register(&at91cap9_pwm0_device);
+}
+#else
+void __init at91_add_device_pwm(u32 mask) {}
+#endif
+
+
+
+/* --------------------------------------------------------------------
* AC97
* -------------------------------------------------------------------- */
.pmc_mask = 1 << AT91SAM9263_ID_TCB,
.type = CLK_TYPE_PERIPHERAL,
};
-static struct clk pwmc_clk = {
- .name = "pwmc_clk",
+static struct clk pwm_clk = {
+ .name = "pwm_clk",
.pmc_mask = 1 << AT91SAM9263_ID_PWMC,
.type = CLK_TYPE_PERIPHERAL,
};
&ssc1_clk,
&ac97_clk,
&tcb_clk,
- &pwmc_clk,
+ &pwm_clk,
&macb_clk,
&twodge_clk,
&udc_clk,
/* --------------------------------------------------------------------
+ * PWM
+ * --------------------------------------------------------------------*/
+
+#if defined(CONFIG_ATMEL_PWM)
+static u32 pwm_mask;
+
+static struct resource pwm_resources[] = {
+ [0] = {
+ .start = AT91SAM9263_BASE_PWMC,
+ .end = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9263_ID_PWMC,
+ .end = AT91SAM9263_ID_PWMC,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9263_pwm0_device = {
+ .name = "atmel_pwm",
+ .id = -1,
+ .dev = {
+ .platform_data = &pwm_mask,
+ },
+ .resource = pwm_resources,
+ .num_resources = ARRAY_SIZE(pwm_resources),
+};
+
+void __init at91_add_device_pwm(u32 mask)
+{
+ if (mask & (1 << AT91_PWM0))
+ at91_set_B_periph(AT91_PIN_PB7, 1); /* enable PWM0 */
+
+ if (mask & (1 << AT91_PWM1))
+ at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM1 */
+
+ if (mask & (1 << AT91_PWM2))
+ at91_set_B_periph(AT91_PIN_PC29, 1); /* enable PWM2 */
+
+ if (mask & (1 << AT91_PWM3))
+ at91_set_B_periph(AT91_PIN_PB29, 1); /* enable PWM3 */
+
+ pwm_mask = mask;
+
+ platform_device_register(&at91sam9263_pwm0_device);
+}
+#else
+void __init at91_add_device_pwm(u32 mask) {}
+#endif
+
+
+/* --------------------------------------------------------------------
* SSC -- Synchronous Serial Controller
* -------------------------------------------------------------------- */
.pmc_mask = 1 << AT91SAM9RL_ID_TC2,
.type = CLK_TYPE_PERIPHERAL,
};
-static struct clk pwmc_clk = {
- .name = "pwmc_clk",
+static struct clk pwm_clk = {
+ .name = "pwm_clk",
.pmc_mask = 1 << AT91SAM9RL_ID_PWMC,
.type = CLK_TYPE_PERIPHERAL,
};
&tc0_clk,
&tc1_clk,
&tc2_clk,
- &pwmc_clk,
+ &pwm_clk,
&tsc_clk,
&dma_clk,
&udphs_clk,
/* --------------------------------------------------------------------
+ * Touchscreen
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
+static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
+
+static struct resource tsadcc_resources[] = {
+ [0] = {
+ .start = AT91SAM9RL_BASE_TSC,
+ .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9RL_ID_TSC,
+ .end = AT91SAM9RL_ID_TSC,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+static struct platform_device at91sam9rl_tsadcc_device = {
+ .name = "atmel_tsadcc",
+ .id = -1,
+ .dev = {
+ .dma_mask = &tsadcc_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .resource = tsadcc_resources,
+ .num_resources = ARRAY_SIZE(tsadcc_resources),
+};
+
+void __init at91_add_device_tsadcc(void)
+{
+ at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */
+ at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */
+ at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */
+ at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */
+
+ platform_device_register(&at91sam9rl_tsadcc_device);
+}
+#else
+void __init at91_add_device_tsadcc(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
* RTC
* -------------------------------------------------------------------- */
/* --------------------------------------------------------------------
+ * PWM
+ * --------------------------------------------------------------------*/
+
+#if defined(CONFIG_ATMEL_PWM)
+static u32 pwm_mask;
+
+static struct resource pwm_resources[] = {
+ [0] = {
+ .start = AT91SAM9RL_BASE_PWMC,
+ .end = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AT91SAM9RL_ID_PWMC,
+ .end = AT91SAM9RL_ID_PWMC,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device at91sam9rl_pwm0_device = {
+ .name = "atmel_pwm",
+ .id = -1,
+ .dev = {
+ .platform_data = &pwm_mask,
+ },
+ .resource = pwm_resources,
+ .num_resources = ARRAY_SIZE(pwm_resources),
+};
+
+void __init at91_add_device_pwm(u32 mask)
+{
+ if (mask & (1 << AT91_PWM0))
+ at91_set_B_periph(AT91_PIN_PB8, 1); /* enable PWM0 */
+
+ if (mask & (1 << AT91_PWM1))
+ at91_set_B_periph(AT91_PIN_PB9, 1); /* enable PWM1 */
+
+ if (mask & (1 << AT91_PWM2))
+ at91_set_B_periph(AT91_PIN_PD5, 1); /* enable PWM2 */
+
+ if (mask & (1 << AT91_PWM3))
+ at91_set_B_periph(AT91_PIN_PD8, 1); /* enable PWM3 */
+
+ pwm_mask = mask;
+
+ platform_device_register(&at91sam9rl_pwm0_device);
+}
+#else
+void __init at91_add_device_pwm(u32 mask) {}
+#endif
+
+
+/* --------------------------------------------------------------------
* SSC -- Synchronous Serial Controller
* -------------------------------------------------------------------- */
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/time.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/time.h>
#include <mach/at91_tc.h>
--- /dev/null
+/*
+ * linux/arch/arm/mach-at91/board-afeb-9260v1.c
+ *
+ * Copyright (C) 2005 SAN People
+ * Copyright (C) 2006 Atmel
+ * Copyright (C) 2008 Sergey Lapin
+ *
+ * A custom board designed as open hardware; PCBs and various information
+ * is available at http://groups.google.com/group/arm9fpga-evolution-board/
+ * Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <mach/board.h>
+#include <mach/gpio.h>
+
+#include "generic.h"
+
+
+static void __init afeb9260_map_io(void)
+{
+ /* Initialize processor: 18.432 MHz crystal */
+ at91sam9260_initialize(18432000);
+
+ /* DGBU on ttyS0. (Rx & Tx only) */
+ at91_register_uart(0, 0, 0);
+
+ /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+ at91_register_uart(AT91SAM9260_ID_US0, 1,
+ ATMEL_UART_CTS | ATMEL_UART_RTS
+ | ATMEL_UART_DTR | ATMEL_UART_DSR
+ | ATMEL_UART_DCD | ATMEL_UART_RI);
+
+ /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
+ at91_register_uart(AT91SAM9260_ID_US1, 2,
+ ATMEL_UART_CTS | ATMEL_UART_RTS);
+
+ /* set serial console to ttyS0 (ie, DBGU) */
+ at91_set_serial_console(0);
+}
+
+static void __init afeb9260_init_irq(void)
+{
+ at91sam9260_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata afeb9260_usbh_data = {
+ .ports = 1,
+};
+
+/*
+ * USB Device port
+ */
+static struct at91_udc_data __initdata afeb9260_udc_data = {
+ .vbus_pin = AT91_PIN_PC5,
+ .pullup_pin = 0, /* pull-up driven by UDC */
+};
+
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info afeb9260_spi_devices[] = {
+ { /* DataFlash chip */
+ .modalias = "mtd_dataflash",
+ .chip_select = 1,
+ .max_speed_hz = 15 * 1000 * 1000,
+ .bus_num = 0,
+ },
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata afeb9260_macb_data = {
+ .phy_irq_pin = AT91_PIN_PA9,
+ .is_rmii = 0,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata afeb9260_nand_partition[] = {
+ {
+ .name = "bootloader",
+ .offset = 0,
+ .size = (640 * SZ_1K),
+ },
+ {
+ .name = "kernel",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = SZ_2M,
+ },
+ {
+ .name = "rootfs",
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+ *num_partitions = ARRAY_SIZE(afeb9260_nand_partition);
+ return afeb9260_nand_partition;
+}
+
+static struct atmel_nand_data __initdata afeb9260_nand_data = {
+ .ale = 21,
+ .cle = 22,
+ .rdy_pin = AT91_PIN_PC13,
+ .enable_pin = AT91_PIN_PC14,
+ .partition_info = nand_partitions,
+ .bus_width_16 = 0,
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct at91_mmc_data __initdata afeb9260_mmc_data = {
+ .slot_b = 1,
+ .wire4 = 1,
+};
+
+
+
+static struct i2c_board_info __initdata afeb9260_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("fm3130", 0x68),
+ I2C_BOARD_INFO("24c64", 0x50),
+ },
+};
+
+static void __init afeb9260_board_init(void)
+{
+ /* Serial */
+ at91_add_device_serial();
+ /* USB Host */
+ at91_add_device_usbh(&afeb9260_usbh_data);
+ /* USB Device */
+ at91_add_device_udc(&afeb9260_udc_data);
+ /* SPI */
+ at91_add_device_spi(afeb9260_spi_devices,
+ ARRAY_SIZE(afeb9260_spi_devices));
+ /* NAND */
+ at91_add_device_nand(&afeb9260_nand_data);
+ /* Ethernet */
+ at91_add_device_eth(&afeb9260_macb_data);
+
+ /* Standard function's pin assignments are not
+ * appropriate for us and generic code provide
+ * no API to configure these pins any other way */
+ at91_set_B_periph(AT91_PIN_PA10, 0); /* ETX2 */
+ at91_set_B_periph(AT91_PIN_PA11, 0); /* ETX3 */
+ /* MMC */
+ at91_add_device_mmc(0, &afeb9260_mmc_data);
+ /* I2C */
+ at91_add_device_i2c(afeb9260_i2c_devices,
+ ARRAY_SIZE(afeb9260_i2c_devices));
+}
+
+MACHINE_START(AFEB9260, "Custom afeb9260 board")
+ /* Maintainer: Sergey Lapin <slapin@ossfans.org> */
+ .phys_io = AT91_BASE_SYS,
+ .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+ .boot_params = AT91_SDRAM_BASE + 0x100,
+ .timer = &at91sam926x_timer,
+ .map_io = afeb9260_map_io,
+ .init_irq = afeb9260_init_irq,
+ .init_machine = afeb9260_board_init,
+MACHINE_END
+
};
#define NOR_BASE AT91_CHIPSELECT_0
-#define NOR_SIZE 0x800000
+#define NOR_SIZE SZ_8M
static struct resource nor_flash_resources[] = {
{
#include <linux/module.h>
#include <linux/platform_device.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
},
};
+static struct gpio_led carmeva_leds[] = {
+ { /* "user led 1", LED9 */
+ .name = "led9",
+ .gpio = AT91_PIN_PA21,
+ .active_low = 1,
+ .default_trigger = "heartbeat",
+ },
+ { /* "user led 2", LED10 */
+ .name = "led10",
+ .gpio = AT91_PIN_PA25,
+ .active_low = 1,
+ },
+ { /* "user led 3", LED11 */
+ .name = "led11",
+ .gpio = AT91_PIN_PA26,
+ .active_low = 1,
+ },
+ { /* "user led 4", LED12 */
+ .name = "led12",
+ .gpio = AT91_PIN_PA18,
+ .active_low = 1,
+ }
+};
+
static void __init carmeva_board_init(void)
{
/* Serial */
// at91_add_device_cf(&carmeva_cf_data);
/* MMC */
at91_add_device_mmc(0, &carmeva_mmc_data);
+ /* LEDs */
+ at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds));
}
MACHINE_START(CARMEVA, "Carmeva")
#include <linux/input.h>
#include <linux/gpio_keys.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
};
#define CSB_FLASH_BASE AT91_CHIPSELECT_0
-#define CSB_FLASH_SIZE 0x800000
+#define CSB_FLASH_SIZE SZ_8M
static struct mtd_partition csb_flash_partitions[] = {
{
static void __init csb300_add_device_buttons(void)
{
- at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */
+ at91_set_gpio_input(AT91_PIN_PB29, 1); /* sw0 */
at91_set_deglitch(AT91_PIN_PB29, 1);
- at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */
+ at91_set_gpio_input(AT91_PIN_PB28, 1); /* sw1 */
at91_set_deglitch(AT91_PIN_PB28, 1);
- at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */
+ at91_set_gpio_input(AT91_PIN_PA21, 1); /* sw2 */
at91_set_deglitch(AT91_PIN_PA21, 1);
platform_device_register(&csb300_button_device);
.gpio = AT91_PIN_PB0,
.active_low = 1,
.default_trigger = "ide-disk",
- },
+ }
};
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
};
#define CSB_FLASH_BASE AT91_CHIPSELECT_0
-#define CSB_FLASH_SIZE 0x1000000
+#define CSB_FLASH_SIZE SZ_16M
static struct mtd_partition csb_flash_partitions[] = {
{
#include <linux/spi/spi.h>
#include <linux/mtd/physmap.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91rm9200_mc.h>
};
#define DK_FLASH_BASE AT91_CHIPSELECT_0
-#define DK_FLASH_SIZE 0x200000
+#define DK_FLASH_SIZE SZ_2M
static struct physmap_flash_data dk_flash_data = {
.width = 2,
{ /* 0x8400 */
.name = "Darrell-loader",
.offset = 0,
- .size = 12* 1056,
+ .size = 12 * 1056,
},
{
.name = "U-boot",
#include <linux/spi/spi.h>
#include <linux/mtd/physmap.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91rm9200_mc.h>
};
#define EK_FLASH_BASE AT91_CHIPSELECT_0
-#define EK_FLASH_SIZE 0x200000
+#define EK_FLASH_SIZE SZ_2M
static struct physmap_flash_data ek_flash_data = {
.width = 2,
// };
#define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0
-#define PICOTUX200_FLASH_SIZE 0x400000
+#define PICOTUX200_FLASH_SIZE SZ_4M
static struct physmap_flash_data picotux200_flash_data = {
.width = 2,
#include <linux/input.h>
#include <linux/clk.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91_shdwc.h>
static struct mtd_partition __initdata ek_nand_partition[] = {
{
.name = "Uboot & Kernel",
- .offset = 0x00000000,
- .size = 16 * 1024 * 1024,
+ .offset = 0,
+ .size = SZ_16M,
},
{
.name = "Root FS",
- .offset = 0x01000000,
- .size = 120 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 120 * SZ_1M,
},
{
.name = "FS",
- .offset = 0x08800000,
- .size = 120 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 120 * SZ_1M,
},
};
{
.name = "Bootloader Area",
.offset = 0,
- .size = 10 * 1024 * 1024,
+ .size = 10 * SZ_1M,
},
{
.name = "User Area",
- .offset = 10 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};
#include <linux/spi/spi.h>
#include <linux/spi/at73c213.h>
#include <linux/clk.h>
+#include <linux/i2c/at24.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
{
.name = "Partition 1",
.offset = 0,
- .size = 256 * 1024,
+ .size = SZ_256K,
},
{
.name = "Partition 2",
- .offset = 256 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};
}
};
+/*
+ * I2C devices
+ */
+static struct at24_platform_data at24c512 = {
+ .byte_len = SZ_512K / 8,
+ .page_size = 128,
+ .flags = AT24_FLAG_ADDR16,
+};
+
+static struct i2c_board_info __initdata ek_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("24c512", 0x50),
+ .platform_data = &at24c512,
+ },
+ /* more devices can be added using expansion connectors */
+};
+
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button ek_buttons[] = {
+ {
+ .gpio = AT91_PIN_PA30,
+ .code = BTN_3,
+ .desc = "Button 3",
+ .active_low = 1,
+ .wakeup = 1,
+ },
+ {
+ .gpio = AT91_PIN_PA31,
+ .code = BTN_4,
+ .desc = "Button 4",
+ .active_low = 1,
+ .wakeup = 1,
+ }
+};
+
+static struct gpio_keys_platform_data ek_button_data = {
+ .buttons = ek_buttons,
+ .nbuttons = ARRAY_SIZE(ek_buttons),
+};
+
+static struct platform_device ek_button_device = {
+ .name = "gpio-keys",
+ .id = -1,
+ .num_resources = 0,
+ .dev = {
+ .platform_data = &ek_button_data,
+ }
+};
+
+static void __init ek_add_device_buttons(void)
+{
+ at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
+ at91_set_deglitch(AT91_PIN_PA30, 1);
+ at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
+ at91_set_deglitch(AT91_PIN_PA31, 1);
+
+ platform_device_register(&ek_button_device);
+}
+#else
+static void __init ek_add_device_buttons(void) {}
+#endif
+
+
static void __init ek_board_init(void)
{
/* Serial */
/* MMC */
at91_add_device_mmc(0, &ek_mmc_data);
/* I2C */
- at91_add_device_i2c(NULL, 0);
+ at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
/* SSC (to AT73C213) */
at73c213_set_clk(&at73c213_data);
at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+ /* Push Buttons */
+ ek_add_device_buttons();
}
MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
#include <video/atmel_lcdc.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91sam9_smc.h>
{
.name = "Partition 1",
.offset = 0,
- .size = 256 * 1024,
+ .size = SZ_256K,
},
{
.name = "Partition 2",
- .offset = 256 * 1024 ,
+ .offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};
.code = BTN_0,
.desc = "Button 0",
.active_low = 1,
+ .wakeup = 1,
},
{
.gpio = AT91_PIN_PA26,
.code = BTN_1,
.desc = "Button 1",
.active_low = 1,
+ .wakeup = 1,
},
{
.gpio = AT91_PIN_PA25,
.code = BTN_2,
.desc = "Button 2",
.active_low = 1,
+ .wakeup = 1,
},
{
.gpio = AT91_PIN_PA24,
.code = BTN_3,
.desc = "Button 3",
.active_low = 1,
+ .wakeup = 1,
}
};
static void __init ek_add_device_buttons(void)
{
- at91_set_gpio_input(AT91_PIN_PA27, 0); /* btn0 */
+ at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */
at91_set_deglitch(AT91_PIN_PA27, 1);
- at91_set_gpio_input(AT91_PIN_PA26, 0); /* btn1 */
+ at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */
at91_set_deglitch(AT91_PIN_PA26, 1);
- at91_set_gpio_input(AT91_PIN_PA25, 0); /* btn2 */
+ at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */
at91_set_deglitch(AT91_PIN_PA25, 1);
- at91_set_gpio_input(AT91_PIN_PA24, 0); /* btn3 */
+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */
at91_set_deglitch(AT91_PIN_PA24, 1);
platform_device_register(&ek_button_device);
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
+#include <linux/i2c/at24.h>
#include <linux/fb.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
+#include <linux/leds.h>
#include <video/atmel_lcdc.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91sam9_smc.h>
{
.name = "Partition 1",
.offset = 0,
- .size = 64 * 1024 * 1024,
+ .size = SZ_64M,
},
{
.name = "Partition 2",
- .offset = 64 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};
/*
+ * I2C devices
+ */
+static struct at24_platform_data at24c512 = {
+ .byte_len = SZ_512K / 8,
+ .page_size = 128,
+ .flags = AT24_FLAG_ADDR16,
+};
+
+
+static struct i2c_board_info __initdata ek_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO("24c512", 0x50),
+ .platform_data = &at24c512,
+ },
+ /* more devices can be added using expansion connectors */
+};
+
+/*
* LCD Controller
*/
#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
static struct fb_videomode at91_tft_vga_modes[] = {
{
- .name = "TX09D50VM1CCA @ 60",
+ .name = "TX09D50VM1CCA @ 60",
.refresh = 60,
.xres = 240, .yres = 320,
.pixclock = KHZ2PICOS(4965),
static struct fb_monspecs at91fb_default_monspecs = {
.manufacturer = "HIT",
- .monitor = "TX09D70VM1CCA",
+ .monitor = "TX09D70VM1CCA",
.modedb = at91_tft_vga_modes,
.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
};
#define AT91SAM9263_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
- | ATMEL_LCDC_DISTYPE_TFT \
+ | ATMEL_LCDC_DISTYPE_TFT \
| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
static void at91_lcdc_power_control(int on)
.active_low = 1,
.desc = "right_click",
.wakeup = 1,
- },
+ }
};
static struct gpio_keys_platform_data ek_button_data = {
static void __init ek_add_device_buttons(void)
{
- at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */
+ at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
at91_set_deglitch(AT91_PIN_PC5, 1);
- at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */
+ at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
at91_set_deglitch(AT91_PIN_PC4, 1);
platform_device_register(&ek_button_device);
* LEDs ... these could all be PWM-driven, for variable brightness
*/
static struct gpio_led ek_leds[] = {
- { /* "left" led, green, userled1, pwm1 */
- .name = "ds1",
- .gpio = AT91_PIN_PB8,
- .active_low = 1,
- .default_trigger = "mmc0",
- },
- { /* "right" led, green, userled2, pwm2 */
+ { /* "right" led, green, userled2 (could be driven by pwm2) */
.name = "ds2",
.gpio = AT91_PIN_PC29,
.active_low = 1,
.default_trigger = "nand-disk",
},
- { /* "power" led, yellow, pwm0 */
+ { /* "power" led, yellow (could be driven by pwm0) */
.name = "ds3",
.gpio = AT91_PIN_PB7,
.default_trigger = "heartbeat",
}
};
+/*
+ * PWM Leds
+ */
+static struct gpio_led ek_pwm_led[] = {
+ /* For now only DS1 is PWM-driven (by pwm1) */
+ {
+ .name = "ds1",
+ .gpio = 1, /* is PWM channel number */
+ .active_low = 1,
+ .default_trigger = "none",
+ }
+};
+
static void __init ek_board_init(void)
{
/* NAND */
at91_add_device_nand(&ek_nand_data);
/* I2C */
- at91_add_device_i2c(NULL, 0);
+ at91_add_device_i2c(ek_i2c_devices, ARRAY_SIZE(ek_i2c_devices));
/* LCD Controller */
at91_add_device_lcdc(&ek_lcdc_data);
/* Push Buttons */
at91_add_device_ac97(&ek_ac97_data);
/* LEDs */
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+ at91_pwm_leds(ek_pwm_led, ARRAY_SIZE(ek_pwm_led));
}
MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
{
.name = "Bootstrap",
.offset = 0,
- .size = 4 * 1024 * 1024,
+ .size = 4 * SZ_1M,
},
{
.name = "Partition 1",
- .offset = 4 * 1024 * 1024,
- .size = 60 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 60 * SZ_1M,
},
{
.name = "Partition 2",
- .offset = 64 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};
#include <video/atmel_lcdc.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91sam9_smc.h>
{
.name = "Partition 1",
.offset = 0,
- .size = 256 * 1024,
+ .size = SZ_256K,
},
{
.name = "Partition 2",
- .offset = 256 * 1024 ,
+ .offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
},
};
at91_add_device_mmc(0, &ek_mmc_data);
/* LCD Controller */
at91_add_device_lcdc(&ek_lcdc_data);
+ /* Touch Screen Controller */
+ at91_add_device_tsadcc();
}
MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
#include <linux/input.h>
#include <linux/clk.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91_shdwc.h>
static struct mtd_partition __initdata ek_nand_partition[] = {
{
.name = "Uboot & Kernel",
- .offset = 0x00000000,
- .size = 16 * 1024 * 1024,
+ .offset = 0,
+ .size = SZ_16M,
},
{
.name = "Root FS",
- .offset = 0x01000000,
- .size = 120 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 120 * SZ_1M,
},
{
.name = "FS",
- .offset = 0x08800000,
- .size = 120 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 120 * SZ_1M,
}
};
#include <linux/gpio_keys.h>
#include <linux/input.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91_shdwc.h>
static struct mtd_partition __initdata ek_nand_partition[] = {
{
.name = "Linux Kernel",
- .offset = 0x00000000,
- .size = 16 * 1024 * 1024,
+ .offset = 0,
+ .size = SZ_16M,
},
{
.name = "Root FS",
- .offset = 0x01000000,
- .size = 120 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 120 * SZ_1M,
},
{
.name = "FS",
- .offset = 0x08800000,
- .size = 120 * 1024 * 1024,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = 120 * SZ_1M,
}
};
#include <linux/gpio_keys.h>
#include <linux/input.h>
-#include <mach/hardware.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
+#include <mach/hardware.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/at91rm9200_mc.h>
{
.name = "AT91 NAND partition 1, boot",
.offset = 0,
- .size = 1 * SZ_256K
+ .size = SZ_256K
},
{
.name = "AT91 NAND partition 2, kernel",
- .offset = 1 * SZ_256K,
- .size = 2 * SZ_1M - 1 * SZ_256K
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = (2 * SZ_1M) - SZ_256K
},
{
.name = "AT91 NAND partition 3, filesystem",
- .offset = 2 * SZ_1M,
+ .offset = MTDPART_OFS_NXTBLK,
.size = 14 * SZ_1M
},
{
.name = "AT91 NAND partition 4, storage",
- .offset = 16 * SZ_1M,
- .size = 16 * SZ_1M
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = SZ_16M
},
{
.name = "AT91 NAND partition 5, ext-fs",
- .offset = 32 * SZ_1M,
- .size = 32 * SZ_1M
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = SZ_32M
}
};
* NOR Flash
*/
#define YL9200_FLASH_BASE AT91_CHIPSELECT_0
-#define YL9200_FLASH_SIZE 0x1000000
+#define YL9200_FLASH_SIZE SZ_16M
static struct mtd_partition yl9200_flash_partitions[] = {
{
.name = "Bootloader",
- .size = 0x00040000,
.offset = 0,
+ .size = SZ_256K,
.mask_flags = MTD_WRITEABLE, /* force read-only */
},
{
.name = "Kernel",
- .size = 0x001C0000,
- .offset = 0x00040000,
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = (2 * SZ_1M) - SZ_256K
},
{
.name = "Filesystem",
- .size = MTDPART_SIZ_FULL,
- .offset = 0x00200000
+ .offset = MTDPART_OFS_NXTBLK,
+ .size = MTDPART_SIZ_FULL
}
};
#if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE)
#include <video/s1d13xxxfb.h>
-#define AT91_FB_REG_BASE 0x80000000L
-#define AT91_FB_REG_SIZE 0x200
-#define AT91_FB_VMEM_BASE 0x80200000L
-#define AT91_FB_VMEM_SIZE 0x200000L
static void __init yl9200_init_video(void)
{
{S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/
};
-static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
-
static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = {
.initregs = yl9200_s1dfb_initregs,
.initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs),
.platform_init_video = yl9200_init_video,
};
+#define YL9200_FB_REG_BASE AT91_CHIPSELECT_7
+#define YL9200_FB_VMEM_BASE YL9200_FB_REG_BASE + SZ_2M
+#define YL9200_FB_VMEM_SIZE SZ_2M
+
static struct resource yl9200_s1dfb_resource[] = {
[0] = { /* video mem */
.name = "s1d13xxxfb memory",
- .start = AT91_FB_VMEM_BASE,
- .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
+ .start = YL9200_FB_VMEM_BASE,
+ .end = YL9200_FB_VMEM_BASE + YL9200_FB_VMEM_SIZE -1,
.flags = IORESOURCE_MEM,
},
[1] = { /* video registers */
.name = "s1d13xxxfb registers",
- .start = AT91_FB_REG_BASE,
- .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
+ .start = YL9200_FB_REG_BASE,
+ .end = YL9200_FB_REG_BASE + SZ_512 -1,
.flags = IORESOURCE_MEM,
},
};
+static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
+
static struct platform_device yl9200_s1dfb_device = {
.name = "s1d13806fb",
.id = -1,
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/clk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/at91_pmc.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <mach/at91_pio.h>
#include <mach/gpio.h>
/*
* arch/arm/mach-at91/include/mach/at91_pit.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Periodic Interval Timer (PIT) - System peripherals regsters.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91_rstc.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Reset Controller (RSTC) - System peripherals regsters.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91_rtt.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Real-time Timer (RTT) - System peripherals regsters.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91_shdwc.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Shutdown Controller (SHDWC) - System peripherals regsters.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91_wdt.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Watchdog Timer (WDT) - System peripherals regsters.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
*
+ * (C) 2008 Andrew Victor
+ *
* DDR/SDR Controller (DDRSDRC) - System peripherals registers.
* Based on AT91CAP9 datasheet revision B.
*
/*
* arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
*
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Memory Controllers (MATRIX, EBI) - System peripherals registers.
* Based on AT91SAM9260 datasheet revision B.
*
/*
* arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
*
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Memory Controllers (MATRIX, EBI) - System peripherals registers.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* SDRAM Controllers (SDRAMC) - System peripherals registers.
* Based on AT91SAM9261 datasheet revision D.
*
/*
* arch/arm/mach-at91/include/mach/at91sam9_smc.h
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* Static Memory Controllers (SMC) - System peripherals registers.
* Based on AT91SAM9261 datasheet revision D.
*
extern void __init at91_add_device_serial(void);
/*
+ * PWM
+ */
+#define AT91_PWM0 0
+#define AT91_PWM1 1
+#define AT91_PWM2 2
+#define AT91_PWM3 3
+
+extern void __init at91_add_device_pwm(u32 mask);
+
+/*
* SSC -- accessed through ssc_request(id). Drivers don't bind to SSC
* platform devices. Their SSC ID is part of their configuration data,
* along with information about which SSC signals they should use.
/* ISI */
extern void __init at91_add_device_isi(void);
+ /* Touchscreen Controller */
+extern void __init at91_add_device_tsadcc(void);
+
/* LEDs */
extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
+extern void __init at91_pwm_leds(struct gpio_led *leds, int nr);
/* FIXME: this needs a better location, but gets stuff building again */
extern int at91_suspend_entering_slow_clock(void);
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/at91_aic.h>
#define NR_AIC_IRQS 32
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
-#include <asm/io.h>
+#include <linux/io.h>
#include <linux/atmel_serial.h>
#if defined(CONFIG_AT91_EARLY_DBGU)
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
+#include <linux/platform_device.h>
#include <mach/board.h>
#include <mach/gpio.h>
#if defined(CONFIG_NEW_LEDS)
-#include <linux/platform_device.h>
-
/*
* New cross-platform LED support.
*/
static struct gpio_led_platform_data led_data;
-static struct platform_device at91_leds = {
+static struct platform_device at91_gpio_leds_device = {
.name = "leds-gpio",
.id = -1,
.dev.platform_data = &led_data,
led_data.leds = leds;
led_data.num_leds = nr;
- platform_device_register(&at91_leds);
+ platform_device_register(&at91_gpio_leds_device);
}
#else
/* ------------------------------------------------------------------------- */
+#if defined (CONFIG_LEDS_ATMEL_PWM)
+
+/*
+ * PWM Leds
+ */
+
+static struct gpio_led_platform_data pwm_led_data;
+
+static struct platform_device at91_pwm_leds_device = {
+ .name = "leds-atmel-pwm",
+ .id = -1,
+ .dev.platform_data = &pwm_led_data,
+};
+
+void __init at91_pwm_leds(struct gpio_led *leds, int nr)
+{
+ int i;
+ u32 pwm_mask = 0;
+
+ if (!nr)
+ return;
+
+ for (i = 0; i < nr; i++)
+ pwm_mask |= (1 << leds[i].gpio);
+
+ pwm_led_data.leds = leds;
+ pwm_led_data.num_leds = nr;
+
+ at91_add_device_pwm(pwm_mask);
+ platform_device_register(&at91_pwm_leds_device);
+}
+#else
+void __init at91_pwm_leds(struct gpio_led *leds, int nr){}
+#endif
+
+
+/* ------------------------------------------------------------------------- */
+
#if defined(CONFIG_LEDS)
#include <asm/leds.h>
#include <linux/sysfs.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/mach/time.h>
--- /dev/null
+/*
+ * arch/arm/mach-at91/pm_slow_clock.S
+ *
+ * Copyright (C) 2006 Savin Zlobec
+ *
+ * AT91SAM9 support:
+ * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/linkage.h>
+#include <mach/hardware.h>
+#include <mach/at91_pmc.h>
+
+#ifdef CONFIG_ARCH_AT91RM9200
+#include <mach/at91rm9200_mc.h>
+#elif defined(CONFIG_ARCH_AT91CAP9)
+#include <mach/at91cap9_ddrsdr.h>
+#else
+#include <mach/at91sam9_sdramc.h>
+#endif
+
+
+#ifdef CONFIG_ARCH_AT91SAM9263
+/*
+ * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
+ * handle those cases both here and in the Suspend-To-RAM support.
+ */
+#define AT91_SDRAMC AT91_SDRAMC0
+#warning Assuming EB1 SDRAM controller is *NOT* used
+#endif
+
+/*
+ * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
+ * clock during suspend by adjusting its prescalar and divisor.
+ * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there
+ * are errata regarding adjusting the prescalar and divisor.
+ */
+#undef SLOWDOWN_MASTER_CLOCK
+
+#define MCKRDY_TIMEOUT 1000
+#define MOSCRDY_TIMEOUT 1000
+#define PLLALOCK_TIMEOUT 1000
+#define PLLBLOCK_TIMEOUT 1000
+
+
+/*
+ * Wait until master clock is ready (after switching master clock source)
+ */
+ .macro wait_mckrdy
+ mov r4, #MCKRDY_TIMEOUT
+1: sub r4, r4, #1
+ cmp r4, #0
+ beq 2f
+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+ tst r3, #AT91_PMC_MCKRDY
+ beq 1b
+2:
+ .endm
+
+/*
+ * Wait until master oscillator has stabilized.
+ */
+ .macro wait_moscrdy
+ mov r4, #MOSCRDY_TIMEOUT
+1: sub r4, r4, #1
+ cmp r4, #0
+ beq 2f
+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+ tst r3, #AT91_PMC_MOSCS
+ beq 1b
+2:
+ .endm
+
+/*
+ * Wait until PLLA has locked.
+ */
+ .macro wait_pllalock
+ mov r4, #PLLALOCK_TIMEOUT
+1: sub r4, r4, #1
+ cmp r4, #0
+ beq 2f
+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+ tst r3, #AT91_PMC_LOCKA
+ beq 1b
+2:
+ .endm
+
+/*
+ * Wait until PLLB has locked.
+ */
+ .macro wait_pllblock
+ mov r4, #PLLBLOCK_TIMEOUT
+1: sub r4, r4, #1
+ cmp r4, #0
+ beq 2f
+ ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
+ tst r3, #AT91_PMC_LOCKB
+ beq 1b
+2:
+ .endm
+
+ .text
+
+ENTRY(at91_slow_clock)
+ /* Save registers on stack */
+ stmfd sp!, {r0 - r12, lr}
+
+ /*
+ * Register usage:
+ * R1 = Base address of AT91_PMC
+ * R2 = Base address of AT91_SDRAMC (or AT91_SYS on AT91RM9200)
+ * R3 = temporary register
+ * R4 = temporary register
+ */
+ ldr r1, .at91_va_base_pmc
+ ldr r2, .at91_va_base_sdramc
+
+ /* Drain write buffer */
+ mcr p15, 0, r0, c7, c10, 4
+
+#ifdef CONFIG_ARCH_AT91RM9200
+ /* Put SDRAM in self-refresh mode */
+ mov r3, #1
+ str r3, [r2, #AT91_SDRAMC_SRR]
+#elif defined(CONFIG_ARCH_AT91CAP9)
+ /* Enable SDRAM self-refresh mode */
+ ldr r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
+ str r3, .saved_sam9_lpr
+
+ mov r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+ str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
+#else
+ /* Enable SDRAM self-refresh mode */
+ ldr r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
+ str r3, .saved_sam9_lpr
+
+ mov r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
+ str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
+#endif
+
+ /* Save Master clock setting */
+ ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+ str r3, .saved_mckr
+
+ /*
+ * Set the Master clock source to slow clock
+ */
+ bic r3, r3, #AT91_PMC_CSS
+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+
+ wait_mckrdy
+
+#ifdef SLOWDOWN_MASTER_CLOCK
+ /*
+ * Set the Master Clock PRES and MDIV fields.
+ *
+ * See AT91RM9200 errata #27 and #28 for details.
+ */
+ mov r3, #0
+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+
+ wait_mckrdy
+#endif
+
+ /* Save PLLA setting and disable it */
+ ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+ str r3, .saved_pllar
+
+ mov r3, #AT91_PMC_PLLCOUNT
+ orr r3, r3, #(1 << 29) /* bit 29 always set */
+ str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+
+ wait_pllalock
+
+ /* Save PLLB setting and disable it */
+ ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+ str r3, .saved_pllbr
+
+ mov r3, #AT91_PMC_PLLCOUNT
+ str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+
+ wait_pllblock
+
+ /* Turn off the main oscillator */
+ ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+ bic r3, r3, #AT91_PMC_MOSCEN
+ str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+
+ /* Wait for interrupt */
+ mcr p15, 0, r0, c7, c0, 4
+
+ /* Turn on the main oscillator */
+ ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+ orr r3, r3, #AT91_PMC_MOSCEN
+ str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
+
+ wait_moscrdy
+
+ /* Restore PLLB setting */
+ ldr r3, .saved_pllbr
+ str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
+
+ wait_pllblock
+
+ /* Restore PLLA setting */
+ ldr r3, .saved_pllar
+ str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
+
+ wait_pllalock
+
+#ifdef SLOWDOWN_MASTER_CLOCK
+ /*
+ * First set PRES if it was not 0,
+ * than set CSS and MDIV fields.
+ *
+ * See AT91RM9200 errata #27 and #28 for details.
+ */
+ ldr r3, .saved_mckr
+ tst r3, #AT91_PMC_PRES
+ beq 2f
+ and r3, r3, #AT91_PMC_PRES
+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+
+ wait_mckrdy
+#endif
+
+ /*
+ * Restore master clock setting
+ */
+2: ldr r3, .saved_mckr
+ str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
+
+ wait_mckrdy
+
+#ifdef CONFIG_ARCH_AT91RM9200
+ /* Do nothing - self-refresh is automatically disabled. */
+#elif defined(CONFIG_ARCH_AT91CAP9)
+ /* Restore LPR on AT91CAP9 */
+ ldr r3, .saved_sam9_lpr
+ str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
+#else
+ /* Restore LPR on AT91SAM9 */
+ ldr r3, .saved_sam9_lpr
+ str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
+#endif
+
+ /* Restore registers, and return */
+ ldmfd sp!, {r0 - r12, pc}
+
+
+.saved_mckr:
+ .word 0
+
+.saved_pllar:
+ .word 0
+
+.saved_pllbr:
+ .word 0
+
+.saved_sam9_lpr:
+ .word 0
+
+.at91_va_base_pmc:
+ .word AT91_VA_BASE_SYS + AT91_PMC
+
+#ifdef CONFIG_ARCH_AT91RM9200
+.at91_va_base_sdramc:
+ .word AT91_VA_BASE_SYS
+#elif defined(CONFIG_ARCH_AT91CAP9)
+.at91_va_base_sdramc:
+ .word AT91_VA_BASE_SYS + AT91_DDRSDRC
+#else
+.at91_va_base_sdramc:
+ .word AT91_VA_BASE_SYS + AT91_SDRAMC
+#endif
+
+ENTRY(at91_slow_clock_sz)
+ .word .-at91_slow_clock
#include <linux/types.h>
#include <linux/string.h>
#include <linux/mm.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/sizes.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/mm.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/setup.h>
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/hardware/clps7111.h>
-#include <asm/io.h>
static inline void arch_idle(void)
{
*/
#include <linux/init.h>
#include <linux/list.h>
+#include <linux/io.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hardware/clps7111.h>
*/
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/system.h>
#include <asm/mach-types.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/mm.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/sched.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/leds.h>
-#include <asm/io.h>
#include <asm/hardware/clps7111.h>
#include <asm/mach/time.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/serial_8250.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <asm/hardware/iomd.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
* 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
*/
+#include <linux/io.h>
#include <asm/hardware/iomd.h>
-#include <asm/io.h>
static inline int fixup_irq(unsigned int irq)
{
#define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000
+/*
+ * Sparsemem support. Each section is a maximum of 64MB. The sections
+ * are offset by 128MB and can cover 128MB, so that gives us a maximum
+ * of 29 physmem bits.
+ */
+#define MAX_PHYSMEM_BITS 29
+#define SECTION_SIZE_BITS 26
+
#endif
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
+#include <linux/io.h>
#include <asm/hardware/iomd.h>
-#include <asm/io.h>
static inline void arch_idle(void)
{
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
+#include <linux/io.h>
#include <asm/setup.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/psc.h>
#include "clock.h"
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#define JTAG_ID_BASE 0x01c40028
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
extern void davinci_watchdog_reset(void);
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/tlb.h>
-#include <asm/io.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#define IRQ_BIT(irq) ((irq) & 0x1f)
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <mach/psc.h>
#include <mach/mux.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/serial.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <linux/interrupt.h>
#include <linux/serial_8250.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/page.h>
static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr)
Say 'Y' here if you want your kernel to support the
Technologic Systems TS-72xx board.
+choice
+ prompt "Select a UART for early kernel messages"
+
+config EP93XX_EARLY_UART1
+ bool "UART1"
+
+config EP93XX_EARLY_UART2
+ bool "UART2"
+
+config EP93XX_EARLY_UART3
+ bool "UART3"
+
+endchoice
+
endmenu
endif
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.phy_id = 1,
};
-static struct resource adssphere_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device adssphere_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &adssphere_eth_data,
- },
- .num_resources = 2,
- .resource = adssphere_eth_resource,
-};
-
static void __init adssphere_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&adssphere_flash);
- memcpy(adssphere_eth_data.dev_addr,
- (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
- platform_device_register(&adssphere_eth_device);
+ ep93xx_register_eth(&adssphere_eth_data, 1);
}
MACHINE_START(ADSSPHERE, "ADS Sphere board")
#include <linux/err.h>
#include <linux/module.h>
#include <linux/string.h>
+#include <linux/io.h>
#include <asm/div64.h>
#include <mach/hardware.h>
-#include <asm/io.h>
struct clk {
char *name;
#include <linux/termios.h>
#include <linux/amba/bus.h>
#include <linux/amba/serial.h>
+#include <linux/io.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/system.h>
#include <asm/tlbflush.h>
#include <asm/pgtable.h>
-#include <asm/io.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c };
static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 };
static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 };
-static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c };
+static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 };
void ep93xx_gpio_update_int_params(unsigned port)
{
.resource = ep93xx_ohci_resources,
};
+static struct ep93xx_eth_data ep93xx_eth_data;
+
+static struct resource ep93xx_eth_resource[] = {
+ {
+ .start = EP93XX_ETHERNET_PHYS_BASE,
+ .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = IRQ_EP93XX_ETHERNET,
+ .end = IRQ_EP93XX_ETHERNET,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+static struct platform_device ep93xx_eth_device = {
+ .name = "ep93xx-eth",
+ .id = -1,
+ .dev = {
+ .platform_data = &ep93xx_eth_data,
+ },
+ .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
+ .resource = ep93xx_eth_resource,
+};
+
+void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
+{
+ if (copy_addr) {
+ memcpy(data->dev_addr,
+ (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
+ }
+
+ ep93xx_eth_data = *data;
+ platform_device_register(&ep93xx_eth_device);
+}
+
extern void ep93xx_gpio_init(void);
void __init ep93xx_init_devices(void)
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.resource = &edb9302_flash_resource,
};
+static struct ep93xx_eth_data edb9302_eth_data = {
+ .phy_id = 1,
+};
+
static void __init edb9302_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9302_flash);
+
+ ep93xx_register_eth(&edb9302_eth_data, 1);
}
MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.phy_id = 1,
};
-static struct resource edb9302a_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device edb9302a_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &edb9302a_eth_data,
- },
- .num_resources = 2,
- .resource = edb9302a_eth_resource,
-};
-
static void __init edb9302a_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9302a_flash);
- memcpy(edb9302a_eth_data.dev_addr,
- (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
- platform_device_register(&edb9302a_eth_device);
+ ep93xx_register_eth(&edb9302a_eth_data, 1);
}
MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.phy_id = 1,
};
-static struct resource edb9307_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device edb9307_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &edb9307_eth_data,
- },
- .num_resources = 2,
- .resource = edb9307_eth_resource,
-};
-
static void __init edb9307_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9307_flash);
- memcpy(edb9307_eth_data.dev_addr,
- (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
- platform_device_register(&edb9307_eth_device);
+ ep93xx_register_eth(&edb9307_eth_data, 1);
}
MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.resource = &edb9312_flash_resource,
};
+static struct ep93xx_eth_data edb9312_eth_data = {
+ .phy_id = 1,
+};
+
static void __init edb9312_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9312_flash);
+
+ ep93xx_register_eth(&edb9312_eth_data, 1);
}
MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.resource = &edb9315_flash_resource,
};
+static struct ep93xx_eth_data edb9315_eth_data = {
+ .phy_id = 1,
+};
+
static void __init edb9315_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9315_flash);
+
+ ep93xx_register_eth(&edb9315_eth_data, 1);
}
MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.phy_id = 1,
};
-static struct resource edb9315a_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device edb9315a_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &edb9315a_eth_data,
- },
- .num_resources = 2,
- .resource = edb9315a_eth_resource,
-};
-
static void __init edb9315a_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&edb9315a_flash);
- memcpy(edb9315a_eth_data.dev_addr,
- (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
- platform_device_register(&edb9315a_eth_device);
+ ep93xx_register_eth(&edb9315a_eth_data, 1);
}
MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
#include <linux/ioport.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
};
static struct ep93xx_eth_data gesbc9312_eth_data = {
- .phy_id = 1,
-};
-
-static struct resource gesbc9312_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device gesbc9312_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &gesbc9312_eth_data,
- },
- .num_resources = 2,
- .resource = gesbc9312_eth_resource,
+ .phy_id = 1,
};
static void __init gesbc9312_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&gesbc9312_flash);
- platform_device_register(&gesbc9312_eth_device);
+
+ ep93xx_register_eth(&gesbc9312_eth_data, 0);
}
MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
#include <linux/init.h>
#include <linux/module.h>
#include <linux/seq_file.h>
+#include <linux/io.h>
#include <mach/ep93xx-regs.h>
-#include <asm/io.h>
#include <asm/gpio.h>
struct ep93xx_gpio_chip {
static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = {
EP93XX_GPIO_BANK("A", 0x00, 0x10, 0),
EP93XX_GPIO_BANK("B", 0x04, 0x14, 8),
- EP93XX_GPIO_BANK("C", 0x30, 0x34, 40),
+ EP93XX_GPIO_BANK("C", 0x08, 0x18, 40),
EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24),
EP93XX_GPIO_BANK("E", 0x20, 0x24, 32),
- EP93XX_GPIO_BANK("F", 0x08, 0x18, 16),
+ EP93XX_GPIO_BANK("F", 0x30, 0x34, 16),
EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48),
EP93XX_GPIO_BANK("H", 0x40, 0x44, 56),
};
#define __ASM_ARCH_EP93XX_REGS_H
/*
+ * EP93xx Physical Memory Map:
+ *
+ * The ASDO pin is sampled at system reset to select a synchronous or
+ * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up)
+ * the synchronous boot mode is selected. When ASDO is "0" (i.e
+ * pulled-down) the asynchronous boot mode is selected.
+ *
+ * In synchronous boot mode nSDCE3 is decoded starting at physical address
+ * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
+ * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
+ * decoded at 0xf0000000.
+ *
+ * There is known errata for the EP93xx dealing with External Memory
+ * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design
+ * Guidelines" for more information. This document can be found at:
+ *
+ * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
+ */
+
+#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
+#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
+#define EP93XX_CS1_PHYS_BASE 0x10000000
+#define EP93XX_CS2_PHYS_BASE 0x20000000
+#define EP93XX_CS3_PHYS_BASE 0x30000000
+#define EP93XX_PCMCIA_PHYS_BASE 0x40000000
+#define EP93XX_CS6_PHYS_BASE 0x60000000
+#define EP93XX_CS7_PHYS_BASE 0x70000000
+#define EP93XX_SDCE0_PHYS_BASE 0xc0000000
+#define EP93XX_SDCE1_PHYS_BASE 0xd0000000
+#define EP93XX_SDCE2_PHYS_BASE 0xe0000000
+#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */
+#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */
+
+/*
* EP93xx linux memory map:
*
* virt phys size
#ifndef __ASSEMBLY__
-void ep93xx_map_io(void);
-void ep93xx_init_irq(void);
-void ep93xx_init_time(unsigned long);
-void ep93xx_init_devices(void);
-extern struct sys_timer ep93xx_timer;
-
struct ep93xx_eth_data
{
unsigned char dev_addr[6];
unsigned char phy_id;
};
+void ep93xx_map_io(void);
+void ep93xx_init_irq(void);
+void ep93xx_init_time(unsigned long);
+void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
+void ep93xx_init_devices(void);
+extern struct sys_timer ep93xx_timer;
#endif
#ifndef __ASSEMBLY__
-#include <asm/io.h>
+#include <linux/io.h>
static inline int board_is_ts7200(void)
{
*((volatile unsigned int *)ptr) = value;
}
-
-#define PHYS_UART1_DATA 0x808c0000
-#define PHYS_UART1_FLAG 0x808c0018
-#define UART1_FLAG_TXFF 0x20
+#if defined(CONFIG_EP93XX_EARLY_UART1)
+#define UART_BASE EP93XX_UART1_PHYS_BASE
+#elif defined(CONFIG_EP93XX_EARLY_UART2)
+#define UART_BASE EP93XX_UART2_PHYS_BASE
+#elif defined(CONFIG_EP93XX_EARLY_UART3)
+#define UART_BASE EP93XX_UART3_PHYS_BASE
+#else
+#define UART_BASE EP93XX_UART1_PHYS_BASE
+#endif
+
+#define PHYS_UART_DATA (UART_BASE + 0x00)
+#define PHYS_UART_FLAG (UART_BASE + 0x18)
+#define UART_FLAG_TXFF 0x20
static inline void putc(int c)
{
for (i = 0; i < 1000; i++) {
/* Transmit fifo not full? */
- if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
+ if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
break;
}
- __raw_writeb(c, PHYS_UART1_DATA);
+ __raw_writeb(c, PHYS_UART_DATA);
}
static inline void flush(void)
#include <linux/mm.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
-
+#include <linux/io.h>
#include <linux/mtd/physmap.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/mach/arch.h>
.phy_id = 0x1f,
};
-static struct resource micro9_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device micro9_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = µ9_eth_data,
- },
- .num_resources = ARRAY_SIZE(micro9_eth_resource),
- .resource = micro9_eth_resource,
-};
-
-static void __init micro9_eth_init(void)
-{
- memcpy(micro9_eth_data.dev_addr,
- (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
- platform_device_register(µ9_eth_device);
-}
-
static void __init micro9_init(void)
{
- micro9_eth_init();
+ ep93xx_register_eth(µ9_eth_data, 1);
}
/*
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/m48t86.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.phy_id = 1,
};
-static struct resource ts72xx_eth_resource[] = {
- {
- .start = EP93XX_ETHERNET_PHYS_BASE,
- .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
- .flags = IORESOURCE_MEM,
- }, {
- .start = IRQ_EP93XX_ETHERNET,
- .end = IRQ_EP93XX_ETHERNET,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device ts72xx_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &ts72xx_eth_data,
- },
- .num_resources = 2,
- .resource = ts72xx_eth_resource,
-};
-
static void __init ts72xx_init_machine(void)
{
ep93xx_init_devices();
platform_device_register(&ts72xx_flash);
platform_device_register(&ts72xx_rtc_device);
- memcpy(ts72xx_eth_data.dev_addr,
- (void *)(EP93XX_ETHERNET_BASE + 0x50), 6);
- platform_device_register(&ts72xx_eth_device);
+ ep93xx_register_eth(&ts72xx_eth_data, 1);
}
MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/screen_info.h>
+#include <linux/io.h>
#include <asm/hardware/dec21285.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <linux/ioport.h>
#include <linux/list.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <asm/hardware/dec21285.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/irq.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/mach/pci.h>
* ISA DMA controllers.
*/
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/dma.h>
-#include <asm/io.h>
#include <asm/scatterlist.h>
#include <asm/mach/dma.h>
#endif
-/* Task size and page offset at 3GB */
-#define TASK_SIZE UL(0xbf000000)
-#define PAGE_OFFSET UL(0xc0000000)
-
/*
* Cache flushing area.
*/
*/
#define PHYS_OFFSET UL(0x00000000)
-/*
- * This decides where the kernel will search for a free chunk of vm
- * space during mmap's.
- */
-#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
-
#define FLUSH_BASE_PHYS 0x50000000
#endif
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <linux/io.h>
#include <asm/hardware/dec21285.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#include <asm/hardware/dec21285.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
static void isa_mask_pic_lo_irq(unsigned int irq)
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/time.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/hardware/dec21285.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <linux/sched.h>
#include <linux/mc146818rtc.h>
#include <linux/bcd.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/time.h>
#include "common.h"
#include <linux/mman.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/dma.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <linux/list.h>
#include <linux/math64.h>
#include <linux/err.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/imx-regs.h>
/*
#include <linux/init.h>
#include <linux/list.h>
#include <linux/timer.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/system.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include "leds.h"
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/mach/time.h>
#include <linux/termios.h>
#include <linux/amba/bus.h>
#include <linux/amba/serial.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/hardware/arm_timer.h>
#include <mach/cm.h>
#include <asm/system.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/hardware/icst525.h>
#include <linux/mm.h>
#include <linux/amba/bus.h>
#include <linux/amba/clcd.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/hardware/icst525.h>
#include <mach/lm.h>
#include <mach/impd1.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
#include <linux/amba/kmi.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/param.h> /* HZ */
#include <linux/amba/bus.h>
#include <linux/amba/kmi.h>
#include <linux/amba/clcd.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/system.h>
#include <asm/mach-types.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/mach/pci.h>
* Physical DRAM offset.
*/
#define PHYS_OFFSET UL(0x00000000)
-#define TASK_SIZE UL(0x3f000000)
-#define PAGE_OFFSET UL(0x40000000)
-#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
#ifndef __ASSEMBLY__
/* RAM has 1:1 mapping on the PCIe/x Busses */
#define __virt_to_bus(x) (__virt_to_phys(x))
-#define __bus_to_virt(x) (__phys_to_virt(x))
+#define __bus_to_virt(x) (__phys_to_virt(x))
-#define virt_to_lbus(x) \
-(( ((void*)(x) >= (void*)IOP13XX_PMMR_V_START) && \
-((void*)(x) < (void*)IOP13XX_PMMR_V_END) ) ? \
-((x) - IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_PHYS_MEM_BASE) : \
-((x) - PAGE_OFFSET + PHYS_OFFSET))
+static inline dma_addr_t __virt_to_lbus(unsigned long x)
+{
+ return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
+}
-#define lbus_to_virt(x) \
-(( ((x) >= IOP13XX_PMMR_P_START) && ((x) < IOP13XX_PMMR_P_END) ) ? \
-((x) - IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_VIRT_MEM_BASE ) : \
-((x) - PHYS_OFFSET + PAGE_OFFSET))
+static inline unsigned long __lbus_to_virt(dma_addr_t x)
+{
+ return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE;
+}
+
+#define __is_lbus_dma(a) \
+ ((a) >= IOP13XX_PMMR_P_START && (a) < IOP13XX_PMMR_P_END)
+
+#define __is_lbus_virt(a) \
+ ((a) >= IOP13XX_PMMR_V_START && (a) < IOP13XX_PMMR_V_END)
/* Device is an lbus device if it is on the platform bus of the IOP13XX */
-#define is_lbus_device(dev) (dev &&\
- (strncmp(dev->bus->name, "platform", 8) == 0))
+#define is_lbus_device(dev) \
+ (dev && strncmp(dev->bus->name, "platform", 8) == 0)
-#define __arch_page_to_dma(dev, page) \
-({is_lbus_device(dev) ? (dma_addr_t)virt_to_lbus(page_address(page)) : \
-(dma_addr_t)__virt_to_bus(page_address(page));})
+#define __arch_dma_to_virt(dev, addr) \
+ ({ \
+ unsigned long __virt; \
+ dma_addr_t __dma = addr; \
+ if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \
+ __virt = __lbus_to_virt(__dma); \
+ else \
+ __virt = __bus_to_virt(__dma); \
+ (void *)__virt; \
+ })
-#define __arch_dma_to_virt(dev, addr) \
-({is_lbus_device(dev) ? lbus_to_virt(addr) : __bus_to_virt(addr);})
+#define __arch_virt_to_dma(dev, addr) \
+ ({ \
+ unsigned long __virt = (unsigned long)addr; \
+ dma_addr_t __dma; \
+ if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \
+ __dma = __virt_to_lbus(__virt); \
+ else \
+ __dma = __virt_to_bus(__virt); \
+ __dma; \
+ })
-#define __arch_virt_to_dma(dev, addr) \
-({is_lbus_device(dev) ? virt_to_lbus(addr) : __virt_to_bus(addr);})
+#define __arch_page_to_dma(dev, page) \
+ __arch_virt_to_dma(dev, page_address(page))
#endif /* CONFIG_ARCH_IOP13XX */
#endif /* !ASSEMBLY */
#ifndef _IOP13XX_PCI_H_
#define _IOP13XX_PCI_H_
+#include <linux/io.h>
#include <mach/irqs.h>
-#include <asm/io.h>
struct pci_sys_data;
struct hw_pci;
*/
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
void * __iomem __iop13xx_io(unsigned long io_addr)
{
*/
#include <linux/serial_8250.h>
+#include <linux/io.h>
#ifdef CONFIG_MTD_PHYSMAP
#include <linux/mtd/physmap.h>
#endif
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/hardware/iop_adma.h>
#define IOP13XX_UART_XTAL 33334000
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/serial_8250.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
+#include <asm/cputype.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
static int is_80219(void)
{
- extern int processor_id;
- return !!((processor_id & 0xffffffe0) == 0x69052e20);
+ return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
}
static int is_ep80219(void)
#include <linux/serial_8250.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/serial_8250.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/serial_8250.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/mach/map.h>
.virtual = IXP2000_CAP_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
.length = IXP2000_CAP_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_INTCTL_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
.length = IXP2000_INTCTL_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_PCI_CREG_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
.length = IXP2000_PCI_CREG_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_PCI_CSR_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
.length = IXP2000_PCI_CSR_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_MSF_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
.length = IXP2000_MSF_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_SCRATCH_RING_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
.length = IXP2000_SCRATCH_RING_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_SRAM0_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
.length = IXP2000_SRAM0_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_PCI_IO_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
.length = IXP2000_PCI_IO_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_PCI_CFG0_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
.length = IXP2000_PCI_CFG0_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = IXP2000_PCI_CFG1_VIRT_BASE,
.pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
.length = IXP2000_PCI_CFG1_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}
};
void __init ixp2000_map_io(void)
{
- /*
- * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that
- * XCB=101 (to avoid triggering erratum #66), and given that
- * this mode speeds up I/O accesses and we have write buffer
- * flushes in the right places anyway, it doesn't hurt to use
- * XCB=101 for all IXP2000s.
- */
iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
/* Set slowport to 8-bit mode. */
#include <linux/tty.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
.virtual = ENP2611_CALEB_VIRT_BASE,
.pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE),
.length = ENP2611_CALEB_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = ENP2611_PM3386_0_VIRT_BASE,
.pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE),
.length = ENP2611_PM3386_0_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}, {
.virtual = ENP2611_PM3386_1_VIRT_BASE,
.pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE),
.length = ENP2611_PM3386_1_SIZE,
- .type = MT_DEVICE_IXP2000,
+ .type = MT_DEVICE,
}
};
* Most of the registers are clumped in 4K regions spread throughout
* the 0xc0000000 -> 0xc0100000 address range, but we just map in
* the whole range using a single 1 MB section instead of small
- * 4K pages. This has two advantages for us:
- *
- * 1) We use only one TLB entry for large number of on-chip I/O devices.
- *
- * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
- * as required per erratum #66. We accomplish this by using a
- * new MT_IXP2000_DEVICE memory type with the bits set as required.
+ * 4K pages.
*
* CAP stands for CSR Access Proxy.
*
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/delay.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/delay.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/delay.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/delay.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/delay.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <asm/system.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/device.h>
+#include <linux/io.h>
#include <asm/dma-mapping.h>
-#include <asm/io.h>
+#include <asm/cputype.h>
#include <asm/irq.h>
#include <asm/sizes.h>
#include <asm/system.h>
void __init ixp4xx_pci_preinit(void)
{
- unsigned long processor_id;
-
- asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
+ unsigned long cpuid = read_cpuid_id();
/*
* Determine which PCI read method to use.
* Rev 0 IXP425 requires workaround.
*/
- if (!(processor_id & 0xf) && cpu_is_ixp42x()) {
+ if (!(cpuid & 0xf) && cpu_is_ixp42x()) {
printk("PCI: IXP42x A0 silicon detected - "
"PCI Non-Prefetch Workaround Enabled\n");
ixp4xx_pci_read = ixp4xx_pci_read_errata;
#include <linux/timex.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/io.h>
#include <mach/udc.h>
#include <mach/hardware.h>
#include <asm/uaccess.h>
-#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/irq.h>
#include <linux/reboot.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
+#include <linux/io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
-#include <asm/io.h>
#include <asm/gpio.h>
static struct flash_platform_data fsg_flash_data = {
#ifndef __ASM_ARCH_CPU_H__
#define __ASM_ARCH_CPU_H__
-extern unsigned int processor_id;
+#include <asm/cputype.h>
+
/* Processor id value in CP15 Register 0 */
#define IXP425_PROCESSOR_ID_VALUE 0x690541c0
#define IXP435_PROCESSOR_ID_VALUE 0x69054040
#define IXP465_PROCESSOR_ID_VALUE 0x69054200
#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0
-#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+#define cpu_is_ixp42x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
IXP425_PROCESSOR_ID_VALUE)
-#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+#define cpu_is_ixp43x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
IXP435_PROCESSOR_ID_VALUE)
-#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
+#define cpu_is_ixp46x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \
IXP465_PROCESSOR_ID_VALUE)
static inline u32 ixp4xx_read_feature_bits(void)
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
-#include <asm/delay.h>
static struct flash_platform_data ixdp425_flash_data = {
.map_name = "cfi_probe",
#include <linux/reboot.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
+#include <linux/io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
-#include <asm/io.h>
#include <asm/gpio.h>
static struct flash_platform_data nas100d_flash_data = {
#include <linux/reboot.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
+#include <linux/io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/time.h>
-#include <asm/io.h>
#include <asm/gpio.h>
static struct flash_platform_data nslu2_flash_data = {
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/module.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/mach/irq.h>
/* set pin as input */
x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
- x &= ~IOPM_(pin);
+ x &= ~IOPM(pin);
__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
local_irq_restore(flags);
/* set pin as input */
x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
- x &= ~IOPM_(pin);
+ x &= ~IOPM(pin);
__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
local_irq_restore(flags);
/* set line state */
x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
if (state)
- x |= (1 << pin);
+ x |= IOPD(pin);
else
- x &= ~(1 << pin);
+ x &= ~IOPD(pin);
__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
/* set pin as output */
x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
- x |= IOPM_(pin);
+ x |= IOPM(pin);
__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPM);
local_irq_restore(flags);
/* set output line state */
x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
if (state)
- x |= (1 << pin);
+ x |= IOPD(pin);
else
- x &= ~(1 << pin);
+ x &= ~IOPD(pin);
__raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
local_irq_restore(flags);
return -EINVAL;
x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
- return (x & (1 << pin)) != 0;
+ return (x & IOPD(pin)) != 0;
}
EXPORT_SYMBOL(gpio_get_value);
for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
seq_printf(s, "%i:\t", i);
- seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input");
+ seq_printf(s, "%s\t", (mode & IOPM(i)) ? "Output" : "Input");
if (i <= KS8695_GPIO_3) {
if (ctrl & enable[i]) {
seq_printf(s, "\t");
- seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0);
+ seq_printf(s, "%i\n", (data & IOPD(i)) ? 1 : 0);
}
return 0;
}
/* Platform-bus mapping */
extern struct bus_type platform_bus_type;
#define is_lbus_device(dev) (dev && dev->bus == &platform_bus_type)
-#define __arch_dma_to_virt(dev, x) ({ is_lbus_device(dev) ? \
- __phys_to_virt(x) : __bus_to_virt(x); })
+#define __arch_dma_to_virt(dev, x) ({ (void *) (is_lbus_device(dev) ? \
+ __phys_to_virt(x) : __bus_to_virt(x)); })
#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \
(dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x))
/* Port Mode Register */
-#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */
+#define IOPM(x) (1 << (x)) /* Mode for GPIO Pin x */
/* Port Control Register */
#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */
#define IOPC_TM_EDGE (6) /* Both Edge Detection */
/* Port Data Register */
-#define IOPD_(x) (1 << (x)) /* Signal Level of GPIO Pin x */
+#define IOPD(x) (1 << (x)) /* Signal Level of GPIO Pin x */
#endif
#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */
#define KS8695_LMAL (0x18) /* MAC Station Address Low */
#define KS8695_LMAH (0x1c) /* MAC Station Address High */
-#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
-#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
+#define KS8695_LMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
+#define KS8695_LMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
/* DMA Transmit Control Register */
#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */
#define KS8695_WMAL (0x18) /* MAC Station Address Low */
#define KS8695_WMAH (0x1c) /* MAC Station Address High */
-#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
-#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
+#define KS8695_WMAAL(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */
+#define KS8695_WMAAH(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */
/* DMA Transmit Control Register */
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/regs-timer.h>
static void arch_idle(void)
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/regs-uart.h>
static void putc(char c)
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/delay.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/signal.h>
#include <asm/mach/pci.h>
#include <mach/hardware.h>
.write = ks8695_pci_writeconfig,
};
-static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
+static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
{
return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
}
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/sched.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/mach/time.h>
#include <mach/regs-timer.h>
bool
config LH7A40X_CONTIGMEM
- bool "Disable NUMA Support"
- depends on ARCH_LH7A40X
+ bool "Disable NUMA/SparseMEM Support"
help
Say Y here if your bootloader sets the SROMLL bit(s) in
the SDRAM controller, organizing memory as a contiguous
- array. This option will disable CONFIG_DISCONTIGMEM and
- force the kernel to manage all memory in one node.
+ array. This option will disable sparse memory support
+ and force the kernel to manage all memory in one node.
- Setting this option incorrectly may prevent the kernel from
- booting. It is OK to leave it N.
+ Setting this option incorrectly may prevent the kernel
+ from booting. It is OK to leave it N.
For more information, consult
<file:Documentation/arm/Sharp-LH/SDRAM>.
config LH7A40X_ONE_BANK_PER_NODE
bool "Optimize NUMA Node Tables for Size"
- depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM
+ depends on !LH7A40X_CONTIGMEM
help
Say Y here to produce compact memory node tables. By
default pairs of adjacent physical RAM banks are managed
#endif
+/*
+ * Sparsemem version of the above
+ */
+#define MAX_PHYSMEM_BITS 32
+#define SECTION_SIZE_BITS 24
+
#endif
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/time.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mbus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include "common.h"
/*
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <plat/irq.h>
#include "common.h"
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/delay.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
-#include <asm/io.h>
-#include <asm/delay.h>
-
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/flash.h>
-#include <asm/io.h>
#include <asm/setup.h>
*
*/
-#include <asm/io.h>
+#include <linux/io.h>
#include <linux/interrupt.h>
#include <mach/dma.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/page.h>
#include <mach/msm_iomap.h>
#include <asm/mach/map.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/timer.h>
-
#include <linux/irq.h>
-#include <mach/hardware.h>
+#include <linux/io.h>
-#include <asm/io.h>
+#include <mach/hardware.h>
#include <mach/msm_iomap.h>
#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <asm/mach/time.h>
#include <mach/msm_iomap.h>
-#include <asm/io.h>
-
#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10)
#define MSM_DGT_SHIFT (5)
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mbus.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include "common.h"
/*
.virtual = AVIC_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AVIC_BASE_ADDR),
.length = AVIC_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
},
};
.virtual = AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
.length = AIPS1_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = SPBA0_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
.length = SPBA0_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = AIPS2_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
.length = AIPS2_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(CS4_BASE_ADDR),
.virtual = AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
.length = AIPS1_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = SPBA0_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
.length = SPBA0_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = AIPS2_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
.length = AIPS2_SIZE,
- .type = MT_NONSHARED_DEVICE
+ .type = MT_DEVICE_NONSHARED
}, {
.virtual = CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(CS4_BASE_ADDR),
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach/map.h>
#include <asm/hardware/vic.h>
-#include <asm/io.h>
#include <mach/netx-regs.h>
#include <asm/mach/irq.h>
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include "netx-regs.h"
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mutex.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <mach/netx-regs.h>
#include <mach/pfifo.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/clocksource.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/time.h>
#include <mach/netx-regs.h>
#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/mutex.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <mach/netx-regs.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/module.h>
+#include <linux/bitops.h>
#include <mach/gpio.h>
#include <mach/processor.h>
#include <mach/processor-ns9360.h>
#include <asm/bug.h>
#include <asm/types.h>
-#include <asm/bitops.h>
#include "gpio-ns9360.h"
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
-#include <asm/io.h>
+#include <linux/io.h>
#define __REG(x) ((void __iomem __force *)(x))
*/
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/mach/irq.h>
#include <mach/regs-sys-common.h>
#include <mach/irqs.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/cpu.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/map.h>
#include <mach/tc.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/errno.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#define OMAP_DIE_ID_0 0xfffe1800
#define OMAP_DIE_ID_1 0xfffe1804
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/tlb.h>
#include <asm/mach/map.h>
-#include <asm/io.h>
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <mach/gpio.h>
#include <mach/cpu.h>
-#include <asm/io.h>
-
#define IRQ_BANK(irq) ((irq) >> 5)
#define IRQ_BIT(irq) ((irq) & 0x1f)
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/system.h>
#include <linux/resource.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/mailbox.h>
#include <mach/irqs.h>
-#include <asm/io.h>
#define MAILBOX_ARM2DSP1 0x00
#define MAILBOX_ARM2DSP1b 0x04
*/
#include <linux/module.h>
#include <linux/init.h>
-#include <asm/system.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <linux/spinlock.h>
+#include <asm/system.h>
+
#include <mach/mux.h>
#ifdef CONFIG_OMAP_MUX
#include <linux/interrupt.h>
#include <linux/sysfs.h>
#include <linux/module.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/mach/time.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/board.h>
#include <linux/err.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <linux/clk.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/common.h>
#include <mach/gpmc.h>
-#include <asm/io.h>
-
#define SDP2430_FLASH_CS 0
#define SDP2430_SMC91X_CS 5
#include <linux/input.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/dma.h>
#include <mach/gpmc.h>
-#include <asm/io.h>
-
#define H4_FLASH_CS 0
#define H4_SMC91X_CS 1
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/clk.h>
-#include <asm/bitops.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
#include <mach/clock.h>
#include <mach/sram.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/clk.h>
-
#include <linux/io.h>
#include <linux/cpufreq.h>
+#include <linux/bitops.h>
#include <mach/clock.h>
#include <mach/sram.h>
#include <asm/div64.h>
-#include <asm/bitops.h>
#include "memory.h"
#include "clock.h"
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/limits.h>
+#include <linux/bitops.h>
#include <mach/clock.h>
#include <mach/sram.h>
#include <asm/div64.h>
-#include <asm/bitops.h>
#include "memory.h"
#include "clock.h"
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <linux/clk.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/gpmc.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
-#include <asm/io.h>
+#include <asm/cputype.h>
#include <mach/control.h>
#include <mach/cpu.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/tlb.h>
-#include <asm/io.h>
#include <asm/mach/map.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach/irq.h>
#include <asm/irq.h>
-#include <asm/io.h>
#define INTC_REVISION 0x0000
#define INTC_SYSCONFIG 0x0010
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/mailbox.h>
#include <mach/irqs.h>
-#include <asm/io.h>
#define MAILBOX_REVISION 0x00
#define MAILBOX_SYSCONFIG 0x10
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/clk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/common.h>
#include <mach/clock.h>
*/
#include <linux/module.h>
#include <linux/init.h>
-#include <asm/system.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <linux/spinlock.h>
+#include <asm/system.h>
+
#include <mach/control.h>
#include <mach/mux.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/mach/time.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/common.h>
#include <mach/board.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mbus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include "common.h"
/*
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/bitops.h>
+#include <linux/io.h>
#include <asm/gpio.h>
-#include <asm/io.h>
#include <mach/orion5x.h>
#include "common.h"
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <asm/gpio.h>
-#include <asm/io.h>
#include <mach/orion5x.h>
#include <plat/irq.h>
#include "common.h"
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mbus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include "common.h"
#include "mpp.h"
#include <linux/device.h>
#include <linux/err.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/clock.h>
#include "clock.h"
#include <linux/serial_8250.h>
#include <linux/device.h>
#include <linux/spi/spi.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <linux/err.h>
#include <linux/dma-mapping.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <asm/dma.h>
#include <asm/dma-mapping.h>
-#include <asm/io.h>
#include <asm/mach/dma.h>
#include <mach/clock.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/module.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/platform.h>
#include <mach/gpio.h>
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/platform.h>
static void arch_idle(void)
#ifndef __PNX4008_TIMEX_H
#define __PNX4008_TIMEX_H
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#define CLOCK_TICK_RATE 1000000
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <linux/suspend.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/cacheflush.h>
#include <mach/pm.h>
#include <mach/clock.h>
#include <linux/kernel.h>
#include <linux/types.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/platform.h>
#include <mach/hardware.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/mach/time.h>
#include <asm/errno.h>
bool "CompuLab CM-X255/CM-X270 modules"
select PXA27x
select IWMMXT
+ select ZONE_DMA if PCI
select PXA25x
select PXA_SSP
#include <linux/pm.h>
#include <linux/gpio.h>
#include <linux/backlight.h>
+#include <linux/io.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/system.h>
#include <asm/mach/arch.h>
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <asm/gpio.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/pxa-regs.h>
#include <mach/pxa2xx-gpio.h>
#ifndef __ASSEMBLY__
+#include <asm/cputype.h>
+
/*
* CPU Stepping CPU_ID JTAG_ID
*
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/gpio.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/proc-fns.h>
#include <mach/pxa-regs.h>
#include <linux/mmc/host.h>
#include <linux/pm.h>
#include <linux/backlight.h>
+#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/spi/spi.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/system.h>
#include <asm/mach/arch.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/ssp.h>
#include <linux/amba/clcd.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/hardware/arm_timer.h>
#define __ASM_ARCH_REALVIEW_H
#include <linux/amba/bus.h>
+#include <linux/io.h>
#include <asm/leds.h>
-#include <asm/io.h>
#define AMBA_DEVICE(name,busid,base,plat) \
static struct amba_device name##_device = { \
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/platform.h>
static inline void arch_idle(void)
#include <linux/percpu.h>
#include <linux/clockchips.h>
#include <linux/irq.h>
+#include <linux/io.h>
#include <asm/hardware/arm_twd.h>
#include <asm/hardware/gic.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
static DEFINE_PER_CPU(struct clock_event_device, local_clockevent);
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/smp.h>
+#include <linux/io.h>
#include <asm/cacheflush.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/board-eb.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
+#include <linux/io.h>
#include <asm/page.h>
#include <asm/dma.h>
#include <asm/fiq.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/uaccess.h>
#define FLUSH_BASE_PHYS 0x00000000
#define FLUSH_BASE 0xdf000000
+/*
+ * Sparsemem support. Each section is a maximum of 64MB. The sections
+ * are offset by 128MB and can cover 128MB, so that gives us a maximum
+ * of 29 physmem bits.
+ */
+#define MAX_PHYSMEM_BITS 29
+#define SECTION_SIZE_BITS 26
+
#endif
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/hardware/iomd.h>
-#include <asm/io.h>
static inline void arch_idle(void)
{
*/
#define VIDMEM ((char *)SCREEN_START)
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <linux/init.h>
#include <linux/list.h>
+#include <linux/io.h>
#include <asm/mach/irq.h>
#include <asm/hardware/iomd.h>
#include <asm/irq.h>
-#include <asm/io.h>
static void iomd_ack_irq_a(unsigned int irq)
{
#include <linux/device.h>
#include <linux/serial_8250.h>
#include <linux/ata_platform.h>
+#include <linux/io.h>
#include <asm/elf.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/page.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-gpio.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/plat-s3c/regs-serial.h>
#include <mach/regs-clock.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-gpio.h>
*/
#include <mach/hardware.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/plat-s3c/regs-watchdog.h>
#include <mach/regs-clock.h>
* published by the Free Software Foundation.
*/
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/map.h>
#include <mach/idle.h>
#include <linux/platform_device.h>
#include <linux/proc_fs.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <mach/fb.h>
#include <linux/dm9000.h>
#include <linux/ata_platform.h>
#include <linux/i2c.h>
+#include <linux/io.h>
#include <net/ax88796.h>
#include <mach/bast-cpld.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/platform_device.h>
#include <linux/serial_core.h>
#include <linux/timer.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/otom-map.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/serial_core.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
-
+#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/vr1000-cpld.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/errno.h>
#include <linux/time.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/regs-clock.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/regs-gpio.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/plat-s3c24xx/devs.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/plat-s3c/regs-serial.h>
#include <mach/regs-clock.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include <mach/dma.h>
-#include <asm/io.h>
#include <asm/plat-s3c24xx/dma.h>
#include <asm/plat-s3c24xx/cpu.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <asm/hardware/iomd.h>
#include <asm/setup.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
-
+#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <mach/hardware.h>
#include <asm/setup.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/regs-power.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <asm/proc-fns.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/reset.h>
#include <linux/ioport.h>
#include <linux/mutex.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/atomic.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-clock.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/module.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/regs-gpio.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/i2c.h>
-
+#include <linux/io.h>
#include <linux/sm501.h>
#include <linux/sm501-regs.h>
#include <mach/anubis-cpld.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/string.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <linux/mtd/map.h>
#include <asm/setup.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/serial_core.h>
#include <linux/clk.h>
#include <linux/i2c.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/osiris-cpld.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/platform_device.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
-
+#include <linux/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/serial_core.h>
#include <linux/sysdev.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/plat-s3c24xx/s3c2440.h>
#include <linux/ioport.h>
#include <linux/mutex.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/atomic.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-clock.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/regs-s3c2443-clock.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/dma.h>
#include <mach/dma.h>
-#include <asm/io.h>
#include <asm/plat-s3c24xx/dma.h>
#include <asm/plat-s3c24xx/cpu.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/serial_core.h>
#include <linux/sysdev.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/regs-s3c2443-clock.h>
* One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
*/
static struct mtd_partition badge4_partitions[] = {
- {
- .name = "BLOB boot loader",
- .offset = 0,
- .size = 0x0000A000
- }, {
- .name = "params",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00006000
- }, {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL
- }
+ {
+ .name = "BLOB boot loader",
+ .offset = 0,
+ .size = 0x0000A000
+ }, {
+ .name = "params",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x00006000
+ }, {
+ .name = "root",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL
+ }
};
static struct flash_platform_data badge4_flash_data = {
static int __init five_v_on_setup(char *ignore)
{
- five_v_on = 1;
+ five_v_on = 1;
return 1;
}
__setup("five_v_on", five_v_on_setup);
GPCR = BADGE4_GPIO_TESTPT_J7;
GPDR |= BADGE4_GPIO_TESTPT_J7;
- /* 5V supply rail. */
- GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
- GPDR |= BADGE4_GPIO_PCMEN5V;
+ /* 5V supply rail. */
+ GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
+ GPDR |= BADGE4_GPIO_PCMEN5V;
/* CPLD sdram type inputs; set up by blob */
//GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
- !!(GPLR & BADGE4_GPIO_SDTYP1),
- !!(GPLR & BADGE4_GPIO_SDTYP0));
+ !!(GPLR & BADGE4_GPIO_SDTYP1),
+ !!(GPLR & BADGE4_GPIO_SDTYP0));
/* SA1111 reset pin; set up by blob */
//GPSR = BADGE4_GPIO_SA1111_NRST;
ret = badge4_sa1111_init();
if (ret < 0)
printk(KERN_ERR
- "%s: SA-1111 initialization failed (%d)\n",
- __func__, ret);
+ "%s: SA-1111 initialization failed (%d)\n",
+ __func__, ret);
/* maybe turn on 5v0 from the start */
static struct map_desc badge4_io_desc[] __initdata = {
- { /* SRAM bank 1 */
+ { /* SRAM bank 1 */
.virtual = 0xf1000000,
.pfn = __phys_to_pfn(0x08000000),
.length = 0x00100000,
#include <linux/init.h>
#include <linux/cpufreq.h>
+#include <asm/cputype.h>
+
#include <mach/hardware.h>
#include "generic.h"
static int __init sa1100_dram_init(void)
{
- if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID)
+ if (cpu_is_sa1100())
return cpufreq_register_driver(&sa1100_driver);
else
return -ENODEV;
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
+#include <asm/cputype.h>
#include <asm/mach-types.h>
-#include <asm/io.h>
#include <asm/system.h>
#include "generic.h"
static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
590, /* 59.0 MHz */
737, /* 73.7 MHz */
- 885, /* 88.5 MHz */
+ 885, /* 88.5 MHz */
1032, /* 103.2 MHz */
1180, /* 118.0 MHz */
1327, /* 132.7 MHz */
1917, /* 191.7 MHz */
2064, /* 206.4 MHz */
2212, /* 221.2 MHz */
- 2359, /* 235.9 MHz */
- 2507, /* 250.7 MHz */
- 2654, /* 265.4 MHz */
- 2802 /* 280.2 MHz */
+ 2359, /* 235.9 MHz */
+ 2507, /* 250.7 MHz */
+ 2654, /* 265.4 MHz */
+ 2802 /* 280.2 MHz */
};
#if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
#else
/*
* We still need to provide this so building without cpufreq works.
- */
+ */
unsigned int cpufreq_get(unsigned int cpu)
{
return cclk_frequency_100khz[PPCR & 0xf] * 100;
*/
static struct map_desc standard_io_desc[] __initdata = {
- { /* PCM */
+ { /* PCM */
.virtual = 0xf8000000,
.pfn = __phys_to_pfn(0x80000000),
.length = 0x00100000,
/* active display mode) */
#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */
#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */
-
-#ifndef __ASSEMBLY__
-extern unsigned int processor_id;
-#endif
-
-#define CPU_REVISION (processor_id & 15)
-#define CPU_SA1110_A0 (0)
-#define CPU_SA1110_B0 (4)
-#define CPU_SA1110_B1 (5)
-#define CPU_SA1110_B2 (6)
-#define CPU_SA1110_B4 (8)
-
-#define CPU_SA1100_ID (0x4401a110)
-#define CPU_SA1100_MASK (0xfffffff0)
-#define CPU_SA1110_ID (0x6901b110)
-#define CPU_SA1110_MASK (0xfffffff0)
#define io_v2p( x ) \
( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
+#define CPU_SA1110_A0 (0)
+#define CPU_SA1110_B0 (4)
+#define CPU_SA1110_B1 (5)
+#define CPU_SA1110_B2 (6)
+#define CPU_SA1110_B4 (8)
+
+#define CPU_SA1100_ID (0x4401a110)
+#define CPU_SA1100_MASK (0xfffffff0)
+#define CPU_SA1110_ID (0x6901b110)
+#define CPU_SA1110_MASK (0xfffffff0)
+
#ifndef __ASSEMBLY__
+#include <asm/cputype.h>
+
+#define CPU_REVISION (read_cpuid_id() & 15)
+
+#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID)
+#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID)
+
# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
# define __PREG(x) (io_v2p((unsigned long)&(x)))
#define __bus_to_virt(x) __phys_to_virt(x)
/*
- * Because of the wide memory address space between physical RAM banks on the
- * SA1100, it's much convenient to use Linux's NUMA support to implement our
- * memory map representation. Assuming all memory nodes have equal access
+ * Because of the wide memory address space between physical RAM banks on the
+ * SA1100, it's much convenient to use Linux's SparseMEM support to implement
+ * our memory map representation. Assuming all memory nodes have equal access
* characteristics, we then have generic discontiguous memory support.
*
- * Of course, all this isn't mandatory for SA1100 implementations with only
- * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
- *
- * The nodes are matched with the physical memory bank addresses which are
- * incidentally the same as virtual addresses.
+ * The sparsemem banks are matched with the physical memory bank addresses
+ * which are incidentally the same as virtual addresses.
*
* node 0: 0xc0000000 - 0xc7ffffff
* node 1: 0xc8000000 - 0xcfffffff
* node 2: 0xd0000000 - 0xd7ffffff
* node 3: 0xd8000000 - 0xdfffffff
*/
-#define NODE_MEM_SIZE_BITS 27
+#define MAX_PHYSMEM_BITS 32
+#define SECTION_SIZE_BITS 27
/*
* Cache flushing area - SA1100 zero bank
#include <linux/ioport.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
-
+#include <linux/io.h>
#include <linux/mtd/partitions.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
static struct resource smc91x_resources[] = {
[0] = {
- .start = PLEB_ETH0_P,
- .end = PLEB_ETH0_P | 0x03ffffff,
+ .start = PLEB_ETH0_P,
+ .end = PLEB_ETH0_P | 0x03ffffff,
.flags = IORESOURCE_MEM,
},
#if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
static struct mtd_partition pleb_partitions[] = {
{
.name = "blob",
- .offset = 0,
+ .offset = 0,
.size = 0x00020000,
}, {
.name = "kernel",
- .offset = MTDPART_OFS_APPEND,
+ .offset = MTDPART_OFS_APPEND,
.size = 0x000e0000,
}, {
.name = "rootfs",
- .offset = MTDPART_OFS_APPEND,
+ .offset = MTDPART_OFS_APPEND,
.size = 0x00300000,
}
};
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
+#include <linux/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <linux/serial_core.h>
#include <linux/ioport.h>
-#include <asm/io.h>
#include "generic.h"
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/init.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/hardware/ssp.h>
#include <linux/irq.h>
#include <linux/sched.h>
#include <linux/serial_8250.h>
+#include <linux/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
-#include <asm/io.h>
#include <asm/leds.h>
#include <asm/param.h>
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
-#include <asm/io.h>
+#include <linux/io.h>
static void arch_reset(char mode)
{
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
+#include <linux/io.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
/*
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/ioport.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/leds.h>
-#include <asm/io.h>
#include <asm/system.h>
#define LED_STATE_ENABLED 1
#include <linux/amba/clcd.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
+#include <linux/io.h>
#include <asm/cnt32_to_63.h>
#include <asm/system.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/hardware/arm_timer.h>
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/platform.h>
static inline void arch_idle(void)
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/mach/pci.h>
#include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/amba/bus.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
# Makefile for the linux arm-specific parts of the memory manager.
#
-obj-y := consistent.o extable.o fault.o init.o \
+obj-y := dma-mapping.o extable.o fault.o init.o \
iomap.o
obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \
* New designs should not need to patch up faults.
*/
mov pc, lr
+ENDPROC(v7_early_abort)
mov r0, #0 @ clear r0, r1 (no FSR/FAR)
mov r1, #0
mov pc, lr
+ENDPROC(nommu_early_abort)
#include <linux/string.h>
#include <linux/proc_fs.h>
#include <linux/init.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/unaligned.h>
#include "fault.h"
*/
#include <linux/init.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
#include <asm/cacheflush.h>
-#include <asm/io.h>
#include <asm/hardware/cache-l2x0.h>
#define CACHE_LINE_SIZE 32
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
isb
mov pc, lr
+ENDPROC(v7_flush_dcache_all)
/*
* v7_flush_cache_all()
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
ldmfd sp!, {r4-r5, r7, r9-r11, lr}
mov pc, lr
+ENDPROC(v7_flush_kern_cache_all)
/*
* v7_flush_cache_all()
*/
ENTRY(v7_flush_user_cache_range)
mov pc, lr
+ENDPROC(v7_flush_user_cache_all)
+ENDPROC(v7_flush_user_cache_range)
/*
* v7_coherent_kern_range(start,end)
dsb
isb
mov pc, lr
+ENDPROC(v7_coherent_kern_range)
+ENDPROC(v7_coherent_user_range)
/*
* v7_flush_kern_dcache_page(kaddr)
blo 1b
dsb
mov pc, lr
+ENDPROC(v7_flush_kern_dcache_page)
/*
* v7_dma_inv_range(start,end)
blo 1b
dsb
mov pc, lr
+ENDPROC(v7_dma_inv_range)
/*
* v7_dma_clean_range(start,end)
blo 1b
dsb
mov pc, lr
+ENDPROC(v7_dma_clean_range)
/*
* v7_dma_flush_range(start,end)
blo 1b
dsb
mov pc, lr
+ENDPROC(v7_dma_flush_range)
__INITDATA
*/
#include <linux/init.h>
#include <linux/spinlock.h>
+#include <linux/io.h>
#include <asm/system.h>
+#include <asm/cputype.h>
#include <asm/cacheflush.h>
-#include <asm/io.h>
#define CR_L2 (1 << 26)
* specific hacks for copying pages efficiently.
*/
#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
- L_PTE_CACHEABLE)
+ L_PTE_MT_MINICACHE)
static DEFINE_SPINLOCK(minicache_lock);
#include <asm/shmparam.h>
#include <asm/tlbflush.h>
#include <asm/cacheflush.h>
+#include <asm/cachetype.h>
#include "mm.h"
#define COPYPAGE_MINICACHE 0xffff8000
#define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
- L_PTE_CACHEABLE)
+ L_PTE_MT_MINICACHE)
static DEFINE_SPINLOCK(minicache_lock);
/*
- * linux/arch/arm/mm/consistent.c
+ * linux/arch/arm/mm/dma-mapping.c
*
* Copyright (C) 2000-2004 Russell King
*
}
}
EXPORT_SYMBOL(dma_cache_maint);
+
+/**
+ * dma_map_sg - map a set of SG buffers for streaming mode DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to map
+ * @dir: DMA transfer direction
+ *
+ * Map a set of buffers described by scatterlist in streaming mode for DMA.
+ * This is the scatter-gather version of the dma_map_single interface.
+ * Here the scatter gather list elements are each tagged with the
+ * appropriate dma address and length. They are obtained via
+ * sg_dma_{address,length}.
+ *
+ * Device ownership issues as mentioned for dma_map_single are the same
+ * here.
+ */
+int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction dir)
+{
+ struct scatterlist *s;
+ int i, j;
+
+ for_each_sg(sg, s, nents, i) {
+ s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
+ s->length, dir);
+ if (dma_mapping_error(dev, s->dma_address))
+ goto bad_mapping;
+ }
+ return nents;
+
+ bad_mapping:
+ for_each_sg(sg, s, i, j)
+ dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
+ return 0;
+}
+EXPORT_SYMBOL(dma_map_sg);
+
+/**
+ * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to unmap (returned from dma_map_sg)
+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)
+ *
+ * Unmap a set of streaming mode DMA translations. Again, CPU access
+ * rules concerning calls here are the same as for dma_unmap_single().
+ */
+void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
+ enum dma_data_direction dir)
+{
+ struct scatterlist *s;
+ int i;
+
+ for_each_sg(sg, s, nents, i)
+ dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
+}
+EXPORT_SYMBOL(dma_unmap_sg);
+
+/**
+ * dma_sync_sg_for_cpu
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to map (returned from dma_map_sg)
+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)
+ */
+void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ int nents, enum dma_data_direction dir)
+{
+ struct scatterlist *s;
+ int i;
+
+ for_each_sg(sg, s, nents, i) {
+ dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
+ sg_dma_len(s), dir);
+ }
+}
+EXPORT_SYMBOL(dma_sync_sg_for_cpu);
+
+/**
+ * dma_sync_sg_for_device
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to map (returned from dma_map_sg)
+ * @dir: DMA transfer direction (same as was passed to dma_map_sg)
+ */
+void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+ int nents, enum dma_data_direction dir)
+{
+ struct scatterlist *s;
+ int i;
+
+ for_each_sg(sg, s, nents, i) {
+ if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
+ sg_dma_len(s), dir))
+ continue;
+
+ if (!arch_is_coherent())
+ dma_cache_maint(sg_virt(s), s->length, dir);
+ }
+}
+EXPORT_SYMBOL(dma_sync_sg_for_device);
* linux/arch/arm/mm/extable.c
*/
#include <linux/module.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
int fixup_exception(struct pt_regs *regs)
{
#include <linux/init.h>
#include <linux/pagemap.h>
+#include <asm/bugs.h>
#include <asm/cacheflush.h>
+#include <asm/cachetype.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
-static unsigned long shared_pte_mask = L_PTE_CACHEABLE;
+static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
/*
* We take the easy way out of this problem - we make the
* If this page isn't present, or is already setup to
* fault (ie, is old), we can safely ignore any issues.
*/
- if (ret && pte_val(entry) & shared_pte_mask) {
+ if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
flush_cache_page(vma, address, pte_pfn(entry));
- pte_val(entry) &= ~shared_pte_mask;
+ pte_val(entry) &= ~L_PTE_MT_MASK;
+ pte_val(entry) |= shared_pte_mask;
set_pte_at(vma->vm_mm, address, pte, entry);
flush_tlb_page(vma, address);
}
unsigned long *p1, *p2;
pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG|
L_PTE_DIRTY|L_PTE_WRITE|
- L_PTE_BUFFERABLE);
+ L_PTE_MT_BUFFERABLE);
p1 = vmap(&page, 1, VM_IOREMAP, prot);
p2 = vmap(&page, 1, VM_IOREMAP, prot);
if (v) {
printk("failed, %s\n", reason);
- shared_pte_mask |= L_PTE_BUFFERABLE;
+ shared_pte_mask = L_PTE_MT_UNCACHED;
} else {
printk("ok\n");
}
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/kprobes.h>
+#include <linux/uaccess.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
-#include <asm/uaccess.h>
#include "fault.h"
}
pmd = pmd_offset(pgd, addr);
-#if PTRS_PER_PMD != 1
- printk(", *pmd=%08lx", pmd_val(*pmd));
-#endif
+ if (PTRS_PER_PMD != 1)
+ printk(", *pmd=%08lx", pmd_val(*pmd));
if (pmd_none(*pmd))
break;
#include <linux/pagemap.h>
#include <asm/cacheflush.h>
+#include <asm/cachetype.h>
#include <asm/system.h>
#include <asm/tlbflush.h>
#include "mm.h"
-extern void _text, _etext, __data_start, _end, __init_begin, __init_end;
-extern unsigned long phys_initrd_start;
-extern unsigned long phys_initrd_size;
+static unsigned long phys_initrd_start __initdata = 0;
+static unsigned long phys_initrd_size __initdata = 0;
+
+static void __init early_initrd(char **p)
+{
+ unsigned long start, size;
+
+ start = memparse(*p, p);
+ if (**p == ',') {
+ size = memparse((*p) + 1, p);
+
+ phys_initrd_start = start;
+ phys_initrd_size = size;
+ }
+}
+__early_param("initrd=", early_initrd);
+
+static int __init parse_tag_initrd(const struct tag *tag)
+{
+ printk(KERN_WARNING "ATAG_INITRD is deprecated; "
+ "please update your bootloader.\n");
+ phys_initrd_start = __virt_to_phys(tag->u.initrd.start);
+ phys_initrd_size = tag->u.initrd.size;
+ return 0;
+}
+
+__tagtable(ATAG_INITRD, parse_tag_initrd);
+
+static int __init parse_tag_initrd2(const struct tag *tag)
+{
+ phys_initrd_start = tag->u.initrd.start;
+ phys_initrd_size = tag->u.initrd.size;
+ return 0;
+}
+
+__tagtable(ATAG_INITRD2, parse_tag_initrd2);
/*
* This is used to pass memory configuration data from paging_init
*/
static struct meminfo meminfo = { 0, };
-#define for_each_nodebank(iter,mi,no) \
- for (iter = 0; iter < mi->nr_banks; iter++) \
- if (mi->bank[iter].node == no)
-
void show_mem(void)
{
int free = 0, total = 0, reserved = 0;
show_free_areas();
for_each_online_node(node) {
pg_data_t *n = NODE_DATA(node);
- struct page *map = n->node_mem_map - n->node_start_pfn;
+ struct page *map = pgdat_page_nr(n, 0) - n->node_start_pfn;
for_each_nodebank (i,mi,node) {
+ struct membank *bank = &mi->bank[i];
unsigned int pfn1, pfn2;
struct page *page, *end;
- pfn1 = __phys_to_pfn(mi->bank[i].start);
- pfn2 = __phys_to_pfn(mi->bank[i].size + mi->bank[i].start);
+ pfn1 = bank_pfn_start(bank);
+ pfn2 = bank_pfn_end(bank);
page = map + pfn1;
end = map + pfn2;
static unsigned int __init
find_bootmap_pfn(int node, struct meminfo *mi, unsigned int bootmap_pages)
{
- unsigned int start_pfn, bank, bootmap_pfn;
+ unsigned int start_pfn, i, bootmap_pfn;
start_pfn = PAGE_ALIGN(__pa(&_end)) >> PAGE_SHIFT;
bootmap_pfn = 0;
- for_each_nodebank(bank, mi, node) {
+ for_each_nodebank(i, mi, node) {
+ struct membank *bank = &mi->bank[i];
unsigned int start, end;
- start = mi->bank[bank].start >> PAGE_SHIFT;
- end = (mi->bank[bank].size +
- mi->bank[bank].start) >> PAGE_SHIFT;
+ start = bank_pfn_start(bank);
+ end = bank_pfn_end(bank);
if (end < start_pfn)
continue;
initrd_node = -1;
for (i = 0; i < mi->nr_banks; i++) {
- unsigned long bank_end;
-
- bank_end = mi->bank[i].start + mi->bank[i].size;
-
- if (mi->bank[i].start <= phys_initrd_start &&
- end <= bank_end)
- initrd_node = mi->bank[i].node;
+ struct membank *bank = &mi->bank[i];
+ if (bank_phys_start(bank) <= phys_initrd_start &&
+ end <= bank_phys_end(bank))
+ initrd_node = bank->node;
}
}
#ifdef CONFIG_MMU
struct map_desc map;
- map.pfn = __phys_to_pfn(bank->start);
- map.virtual = __phys_to_virt(bank->start);
- map.length = bank->size;
+ map.pfn = bank_pfn_start(bank);
+ map.virtual = __phys_to_virt(bank_phys_start(bank));
+ map.length = bank_phys_size(bank);
map.type = MT_MEMORY;
create_mapping(&map);
#endif
}
-static unsigned long __init
-bootmem_init_node(int node, int initrd_node, struct meminfo *mi)
+static unsigned long __init bootmem_init_node(int node, struct meminfo *mi)
{
- unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
unsigned long start_pfn, end_pfn, boot_pfn;
unsigned int boot_pages;
pg_data_t *pgdat;
struct membank *bank = &mi->bank[i];
unsigned long start, end;
- start = bank->start >> PAGE_SHIFT;
- end = (bank->start + bank->size) >> PAGE_SHIFT;
+ start = bank_pfn_start(bank);
+ end = bank_pfn_end(bank);
if (start_pfn > start)
start_pfn = start;
pgdat = NODE_DATA(node);
init_bootmem_node(pgdat, boot_pfn, start_pfn, end_pfn);
- for_each_nodebank(i, mi, node)
- free_bootmem_node(pgdat, mi->bank[i].start, mi->bank[i].size);
+ for_each_nodebank(i, mi, node) {
+ struct membank *bank = &mi->bank[i];
+ free_bootmem_node(pgdat, bank_phys_start(bank), bank_phys_size(bank));
+ memory_present(node, bank_pfn_start(bank), bank_pfn_end(bank));
+ }
/*
* Reserve the bootmem bitmap for this node.
reserve_bootmem_node(pgdat, boot_pfn << PAGE_SHIFT,
boot_pages << PAGE_SHIFT, BOOTMEM_DEFAULT);
- /*
- * Reserve any special node zero regions.
- */
- if (node == 0)
- reserve_node_zero(pgdat);
+ return end_pfn;
+}
+static void __init bootmem_reserve_initrd(int node)
+{
#ifdef CONFIG_BLK_DEV_INITRD
- /*
- * If the initrd is in this node, reserve its memory.
- */
- if (node == initrd_node) {
- int res = reserve_bootmem_node(pgdat, phys_initrd_start,
- phys_initrd_size, BOOTMEM_EXCLUSIVE);
-
- if (res == 0) {
- initrd_start = __phys_to_virt(phys_initrd_start);
- initrd_end = initrd_start + phys_initrd_size;
- } else {
- printk(KERN_ERR
- "INITRD: 0x%08lx+0x%08lx overlaps in-use "
- "memory region - disabling initrd\n",
- phys_initrd_start, phys_initrd_size);
- }
+ pg_data_t *pgdat = NODE_DATA(node);
+ int res;
+
+ res = reserve_bootmem_node(pgdat, phys_initrd_start,
+ phys_initrd_size, BOOTMEM_EXCLUSIVE);
+
+ if (res == 0) {
+ initrd_start = __phys_to_virt(phys_initrd_start);
+ initrd_end = initrd_start + phys_initrd_size;
+ } else {
+ printk(KERN_ERR
+ "INITRD: 0x%08lx+0x%08lx overlaps in-use "
+ "memory region - disabling initrd\n",
+ phys_initrd_start, phys_initrd_size);
}
#endif
+}
+
+static void __init bootmem_free_node(int node, struct meminfo *mi)
+{
+ unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES];
+ unsigned long start_pfn, end_pfn;
+ pg_data_t *pgdat = NODE_DATA(node);
+ int i;
+
+ start_pfn = pgdat->bdata->node_min_pfn;
+ end_pfn = pgdat->bdata->node_low_pfn;
/*
* initialise the zones within this node.
*/
zhole_size[0] = zone_size[0];
for_each_nodebank(i, mi, node)
- zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT;
+ zhole_size[0] -= bank_pfn_size(&mi->bank[i]);
/*
* Adjust the sizes according to any special requirements for
arch_adjust_zones(node, zone_size, zhole_size);
free_area_init_node(node, zone_size, start_pfn, zhole_size);
-
- return end_pfn;
}
void __init bootmem_init(struct meminfo *mi)
{
unsigned long memend_pfn = 0;
- int node, initrd_node, i;
-
- /*
- * Invalidate the node number for empty or invalid memory banks
- */
- for (i = 0; i < mi->nr_banks; i++)
- if (mi->bank[i].size == 0 || mi->bank[i].node >= MAX_NUMNODES)
- mi->bank[i].node = -1;
+ int node, initrd_node;
memcpy(&meminfo, mi, sizeof(meminfo));
* Run through each node initialising the bootmem allocator.
*/
for_each_node(node) {
- unsigned long end_pfn;
+ unsigned long end_pfn = bootmem_init_node(node, mi);
- end_pfn = bootmem_init_node(node, initrd_node, mi);
+ /*
+ * Reserve any special node zero regions.
+ */
+ if (node == 0)
+ reserve_node_zero(NODE_DATA(node));
+
+ /*
+ * If the initrd is in this node, reserve its memory.
+ */
+ if (node == initrd_node)
+ bootmem_reserve_initrd(node);
/*
* Remember the highest memory PFN.
memend_pfn = end_pfn;
}
+ /*
+ * sparse_init() needs the bootmem allocator up and running.
+ */
+ sparse_init();
+
+ /*
+ * Now free memory in each node - free_area_init_node needs
+ * the sparse mem_map arrays initialized by sparse_init()
+ * for memmap_init_zone(), otherwise all PFNs are invalid.
+ */
+ for_each_node(node)
+ bootmem_free_node(node, mi);
+
high_memory = __va(memend_pfn << PAGE_SHIFT);
/*
* information on the command line.
*/
for_each_nodebank(i, mi, node) {
- bank_start = mi->bank[i].start >> PAGE_SHIFT;
+ struct membank *bank = &mi->bank[i];
+
+ bank_start = bank_pfn_start(bank);
if (bank_start < prev_bank_end) {
printk(KERN_ERR "MEM: unordered memory banks. "
"Not freeing memmap.\n");
if (prev_bank_end && prev_bank_end != bank_start)
free_memmap(node, prev_bank_end, bank_start);
- prev_bank_end = (mi->bank[i].start +
- mi->bank[i].size) >> PAGE_SHIFT;
+ prev_bank_end = bank_pfn_end(bank);
}
}
num_physpages = 0;
for (i = 0; i < meminfo.nr_banks; i++) {
- num_physpages += meminfo.bank[i].size >> PAGE_SHIFT;
- printk(" %ldMB", meminfo.bank[i].size >> 20);
+ num_physpages += bank_pfn_size(&meminfo.bank[i]);
+ printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20);
}
printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT));
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioport.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#ifdef __io
void __iomem *ioport_map(unsigned long port, unsigned int nr)
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
+#include <linux/io.h>
+#include <asm/cputype.h>
#include <asm/cacheflush.h>
-#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
if (!pte_none(*pte))
goto bad;
- set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot),
- type->prot_pte_ext);
+ set_pte_ext(pte, pfn_pte(phys_addr >> PAGE_SHIFT, prot), 0);
phys_addr += PAGE_SIZE;
} while (pte++, addr += PAGE_SIZE, addr != end);
return 0;
}
EXPORT_SYMBOL(__arm_ioremap);
-void __iounmap(volatile void __iomem *addr)
+void __iounmap(volatile void __iomem *io_addr)
{
+ void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
#ifndef CONFIG_SMP
struct vm_struct **p, *tmp;
#endif
unsigned int section_mapping = 0;
- addr = (volatile void __iomem *)(PAGE_MASK & (unsigned long)addr);
-
#ifndef CONFIG_SMP
/*
* If this is a section based mapping we need to handle it
*/
write_lock(&vmlist_lock);
for (p = &vmlist ; (tmp = *p) ; p = &tmp->next) {
- if((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
+ if ((tmp->flags & VM_IOREMAP) && (tmp->addr == addr)) {
if (tmp->flags & VM_ARM_SECTION_MAPPING) {
*p = tmp->next;
unmap_area_sections((unsigned long)tmp->addr,
#endif
if (!section_mapping)
- vunmap((void __force *)addr);
+ vunmap(addr);
}
EXPORT_SYMBOL(__iounmap);
struct mem_type {
unsigned int prot_pte;
- unsigned int prot_pte_ext;
unsigned int prot_l1;
unsigned int prot_sect;
unsigned int domain;
void __init create_mapping(struct map_desc *md);
void __init bootmem_init(struct meminfo *mi);
void reserve_node_zero(struct pglist_data *pgdat);
+
+extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end;
#include <linux/mman.h>
#include <linux/shm.h>
#include <linux/sched.h>
+#include <linux/io.h>
+#include <asm/cputype.h>
#include <asm/system.h>
#define COLOUR_ALIGN(addr,pgoff) \
* caches alias. This is indicated by bits 9 and 21 of the
* cache type register.
*/
- cache_type = read_cpuid(CPUID_CACHETYPE);
- if (cache_type != read_cpuid(CPUID_ID)) {
+ cache_type = read_cpuid_cachetype();
+ if (cache_type != read_cpuid_id()) {
aliasing = (cache_type | cache_type >> 12) & (1 << 11);
if (aliasing)
do_align = filp || flags & MAP_SHARED;
#include <linux/mman.h>
#include <linux/nodemask.h>
+#include <asm/cputype.h>
#include <asm/mach-types.h>
#include <asm/setup.h>
#include <asm/sizes.h>
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-extern void _stext, _etext, __data_start, _end;
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
-
/*
* empty_zero_page is a special page that is used for
* zero-initialized data and COW.
.policy = "uncached",
.cr_mask = CR_W|CR_C,
.pmd = PMD_SECT_UNCACHED,
- .pte = 0,
+ .pte = L_PTE_MT_UNCACHED,
}, {
.policy = "buffered",
.cr_mask = CR_C,
.pmd = PMD_SECT_BUFFERED,
- .pte = PTE_BUFFERABLE,
+ .pte = L_PTE_MT_BUFFERABLE,
}, {
.policy = "writethrough",
.cr_mask = 0,
.pmd = PMD_SECT_WT,
- .pte = PTE_CACHEABLE,
+ .pte = L_PTE_MT_WRITETHROUGH,
}, {
.policy = "writeback",
.cr_mask = 0,
.pmd = PMD_SECT_WB,
- .pte = PTE_BUFFERABLE|PTE_CACHEABLE,
+ .pte = L_PTE_MT_WRITEBACK,
}, {
.policy = "writealloc",
.cr_mask = 0,
.pmd = PMD_SECT_WBWA,
- .pte = PTE_BUFFERABLE|PTE_CACHEABLE,
+ .pte = L_PTE_MT_WRITEALLOC,
}
};
static struct mem_type mem_types[] = {
[MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */
- .prot_pte = PROT_PTE_DEVICE,
+ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED |
+ L_PTE_SHARED,
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED,
.domain = DOMAIN_IO,
},
[MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */
- .prot_pte = PROT_PTE_DEVICE,
- .prot_pte_ext = PTE_EXT_TEX(2),
+ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED,
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2),
.domain = DOMAIN_IO,
},
[MT_DEVICE_CACHED] = { /* ioremap_cached */
- .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE,
+ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_CACHED,
.prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB,
.domain = DOMAIN_IO,
},
- [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */
- .prot_pte = PROT_PTE_DEVICE,
- .prot_l1 = PMD_TYPE_TABLE,
- .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE |
- PMD_SECT_TEX(1),
- .domain = DOMAIN_IO,
- },
[MT_DEVICE_WC] = { /* ioremap_wc */
- .prot_pte = PROT_PTE_DEVICE,
+ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
.prot_l1 = PMD_TYPE_TABLE,
- .prot_sect = PROT_SECT_DEVICE,
+ .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE,
.domain = DOMAIN_IO,
},
[MT_CACHECLEAN] = {
{
struct cachepolicy *cp;
unsigned int cr = get_cr();
- unsigned int user_pgprot, kern_pgprot;
+ unsigned int user_pgprot, kern_pgprot, vecs_pgprot;
int cpu_arch = cpu_architecture();
int i;
cachepolicy = CPOLICY_WRITEBACK;
ecc_mask = 0;
}
+#ifdef CONFIG_SMP
+ cachepolicy = CPOLICY_WRITEALLOC;
+#endif
/*
* On non-Xscale3 ARMv5-and-older systems, use CB=01
* in xsc3 parlance, Uncached Normal in ARMv6 parlance).
*/
if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
- mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
- } else {
- mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;
- mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
+ mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE;
}
/*
}
cp = &cache_policies[cachepolicy];
- kern_pgprot = user_pgprot = cp->pte;
+ vecs_pgprot = kern_pgprot = user_pgprot = cp->pte;
+
+#ifndef CONFIG_SMP
+ /*
+ * Only use write-through for non-SMP systems
+ */
+ if (cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH)
+ vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte;
+#endif
/*
* Enable CPU-specific coherency if supported.
/*
* Mark the device area as "shared device"
*/
- mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE;
mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED;
#ifdef CONFIG_SMP
*/
user_pgprot |= L_PTE_SHARED;
kern_pgprot |= L_PTE_SHARED;
+ vecs_pgprot |= L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
#endif
}
for (i = 0; i < 16; i++) {
unsigned long v = pgprot_val(protection_map[i]);
- v = (v & ~(L_PTE_BUFFERABLE|L_PTE_CACHEABLE)) | user_pgprot;
- protection_map[i] = __pgprot(v);
+ protection_map[i] = __pgprot(v | user_pgprot);
}
- mem_types[MT_LOW_VECTORS].prot_pte |= kern_pgprot;
- mem_types[MT_HIGH_VECTORS].prot_pte |= kern_pgprot;
+ mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot;
+ mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot;
- if (cpu_arch >= CPU_ARCH_ARMv5) {
-#ifndef CONFIG_SMP
- /*
- * Only use write-through for non-SMP systems
- */
- mem_types[MT_LOW_VECTORS].prot_pte &= ~L_PTE_BUFFERABLE;
- mem_types[MT_HIGH_VECTORS].prot_pte &= ~L_PTE_BUFFERABLE;
-#endif
- } else {
+ if (cpu_arch < CPU_ARCH_ARMv5)
mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
- }
pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
pte = pte_offset_kernel(pmd, addr);
do {
- set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)),
- type->prot_pte_ext);
+ set_pte_ext(pte, pfn_pte(pfn, __pgprot(type->prot_pte)), 0);
pfn++;
} while (pte++, addr += PAGE_SIZE, addr != end);
}
create_mapping(io_desc + i);
}
+static unsigned long __initdata vmalloc_reserve = SZ_128M;
+
+/*
+ * vmalloc=size forces the vmalloc area to be exactly 'size'
+ * bytes. This can be used to increase (or decrease) the vmalloc
+ * area - the default is 128m.
+ */
+static void __init early_vmalloc(char **arg)
+{
+ vmalloc_reserve = memparse(*arg, arg);
+
+ if (vmalloc_reserve < SZ_16M) {
+ vmalloc_reserve = SZ_16M;
+ printk(KERN_WARNING
+ "vmalloc area too small, limiting to %luMB\n",
+ vmalloc_reserve >> 20);
+ }
+}
+__early_param("vmalloc=", early_vmalloc);
+
+#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve)
+
static int __init check_membank_valid(struct membank *mb)
{
/*
- * Check whether this memory region has non-zero size.
+ * Check whether this memory region has non-zero size or
+ * invalid node number.
*/
- if (mb->size == 0)
+ if (mb->size == 0 || mb->node >= MAX_NUMNODES)
return 0;
/*
static void __init sanity_check_meminfo(struct meminfo *mi)
{
- int i;
- int j;
+ int i, j;
for (i = 0, j = 0; i < mi->nr_banks; i++) {
if (check_membank_valid(&mi->bank[i]))
#include <linux/mm.h>
#include <linux/pagemap.h>
#include <linux/bootmem.h>
+#include <linux/io.h>
#include <asm/cacheflush.h>
-#include <asm/io.h>
#include <asm/page.h>
#include <asm/mach/arch.h>
#include "mm.h"
-extern void _stext, __data_start, _end;
-
/*
* Reserve the various regions of node 0
*/
BOOTMEM_DEFAULT);
}
+static void __init sanity_check_meminfo(struct meminfo *mi)
+{
+ int i, j;
+
+ for (i = 0, j = 0; i < mi->nr_banks; i++) {
+ struct membank *mb = &mi->bank[i];
+
+ if (mb->size != 0 && mb->node < MAX_NUMNODES)
+ mi->bank[j++] = mi->bank[i];
+ }
+ mi->nr_banks = j;
+}
+
/*
* paging_init() sets up the page tables, initialises the zone memory
* maps, and sets up the zero page, bad page and bad page tables.
*/
void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
{
+ sanity_check_meminfo(mi);
bootmem_init(mi);
}
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
.align 5
ENTRY(cpu_arm1020_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r1, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
#ifndef CONFIG_CPU_DCACHE_DISABLE
mcr p15, 0, r0, c7, c10, 4
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
.align 5
ENTRY(cpu_arm1020e_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r1, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
#ifndef CONFIG_CPU_DCACHE_DISABLE
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
.align 5
ENTRY(cpu_arm1022_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r1, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
#ifndef CONFIG_CPU_DCACHE_DISABLE
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
.align 5
ENTRY(cpu_arm1026_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r1, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
#ifndef CONFIG_CPU_DCACHE_DISABLE
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
+#include "proc-macros.S"
+
ENTRY(cpu_arm6_dcache_clean_area)
ENTRY(cpu_arm7_dcache_clean_area)
mov pc, lr
* : r1 = value to set
* Purpose : Set a PTE and flush it out of any WB cache
*/
- .align 5
+ .align 5
ENTRY(cpu_arm6_set_pte_ext)
ENTRY(cpu_arm7_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young
- movne r2, #0
-
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext wc_disable=0
#endif /* CONFIG_MMU */
- mov pc, lr
+ mov pc, lr
/*
* Function: _arm6_7_reset
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
* : r1 = value to set
* Purpose : Set a PTE and flush it out of any WB cache
*/
- .align 5
+ .align 5
ENTRY(cpu_arm720_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young
- movne r2, #0
-
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext wc_disable=0
#endif
- mov pc, lr
+ mov pc, lr
/*
* Function: arm720_reset
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/page.h>
.align 5
ENTRY(cpu_arm920_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r2, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
mcr p15, 0, r0, c7, c10, 4 @ drain WB
-#endif /* CONFIG_MMU */
+#endif
mov pc, lr
__INIT
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/page.h>
.align 5
ENTRY(cpu_arm922_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r2, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
mcr p15, 0, r0, c7, c10, 4 @ drain WB
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/page.h>
.align 5
ENTRY(cpu_arm925_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r2, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/page.h>
.align 5
ENTRY(cpu_arm926_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
- eor r3, r2, #0x0a @ C & small page?
- tst r3, #0x0b
- biceq r2, r2, #4
-#endif
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext
mov r0, r0
#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/page.h>
.align 5
ENTRY(cpu_feroceon_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext wc_disable=0
mov r0, r0
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH)
mov \reg, #16 @ size offset
mov \reg, \reg, lsl \tmp @ actual cache line size
.endm
+
+
+/*
+ * Sanity check the PTE configuration for the code below - which makes
+ * certain assumptions about how these bits are layed out.
+ */
+#if L_PTE_SHARED != PTE_EXT_SHARED
+#error PTE shared bit mismatch
+#endif
+#if L_PTE_BUFFERABLE != PTE_BUFFERABLE
+#error PTE bufferable bit mismatch
+#endif
+#if L_PTE_CACHEABLE != PTE_CACHEABLE
+#error PTE cacheable bit mismatch
+#endif
+#if (L_PTE_EXEC+L_PTE_USER+L_PTE_WRITE+L_PTE_DIRTY+L_PTE_YOUNG+\
+ L_PTE_FILE+L_PTE_PRESENT) > L_PTE_SHARED
+#error Invalid Linux PTE bit settings
+#endif
+
+/*
+ * The ARMv6 and ARMv7 set_pte_ext translation function.
+ *
+ * Permission translation:
+ * YUWD APX AP1 AP0 SVC User
+ * 0xxx 0 0 0 no acc no acc
+ * 100x 1 0 1 r/o no acc
+ * 10x0 1 0 1 r/o no acc
+ * 1011 0 0 1 r/w no acc
+ * 110x 0 1 0 r/w r/o
+ * 11x0 0 1 0 r/w r/o
+ * 1111 0 1 1 r/w r/w
+ */
+ .macro armv6_mt_table pfx
+\pfx\()_mt_table:
+ .long 0x00 @ L_PTE_MT_UNCACHED
+ .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
+ .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
+ .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
+ .long PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
+ .long 0x00 @ unused
+ .long 0x00 @ L_PTE_MT_MINICACHE (not present)
+ .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC
+ .long 0x00 @ unused
+ .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC
+ .long 0x00 @ unused
+ .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
+ .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED
+ .long 0x00 @ unused
+ .long 0x00 @ unused
+ .long 0x00 @ unused
+ .endm
+
+ .macro armv6_set_pte_ext pfx
+ str r1, [r0], #-2048 @ linux version
+
+ bic r3, r1, #0x000003fc
+ bic r3, r3, #PTE_TYPE_MASK
+ orr r3, r3, r2
+ orr r3, r3, #PTE_EXT_AP0 | 2
+
+ adr ip, \pfx\()_mt_table
+ and r2, r1, #L_PTE_MT_MASK
+ ldr r2, [ip, r2]
+
+ tst r1, #L_PTE_WRITE
+ tstne r1, #L_PTE_DIRTY
+ orreq r3, r3, #PTE_EXT_APX
+
+ tst r1, #L_PTE_USER
+ orrne r3, r3, #PTE_EXT_AP1
+ tstne r3, #PTE_EXT_APX
+ bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
+
+ tst r1, #L_PTE_EXEC
+ orreq r3, r3, #PTE_EXT_XN
+
+ orr r3, r3, r2
+
+ tst r1, #L_PTE_YOUNG
+ tstne r1, #L_PTE_PRESENT
+ moveq r3, #0
+
+ str r3, [r0]
+ mcr p15, 0, r0, c7, c10, 1 @ flush_pte
+ .endm
+
+
+/*
+ * The ARMv3, ARMv4 and ARMv5 set_pte_ext translation function,
+ * covering most CPUs except Xscale and Xscale 3.
+ *
+ * Permission translation:
+ * YUWD AP SVC User
+ * 0xxx 0x00 no acc no acc
+ * 100x 0x00 r/o no acc
+ * 10x0 0x00 r/o no acc
+ * 1011 0x55 r/w no acc
+ * 110x 0xaa r/w r/o
+ * 11x0 0xaa r/w r/o
+ * 1111 0xff r/w r/w
+ */
+ .macro armv3_set_pte_ext wc_disable=1
+ str r1, [r0], #-2048 @ linux version
+
+ eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
+
+ bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits
+ bic r2, r2, #PTE_TYPE_MASK
+ orr r2, r2, #PTE_TYPE_SMALL
+
+ tst r3, #L_PTE_USER @ user?
+ orrne r2, r2, #PTE_SMALL_AP_URO_SRW
+
+ tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty?
+ orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
+
+ tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
+ movne r2, #0
+
+ .if \wc_disable
+#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
+ tst r2, #PTE_CACHEABLE
+ bicne r2, r2, #PTE_BUFFERABLE
+#endif
+ .endif
+ str r2, [r0] @ hardware version
+ .endm
+
+
+/*
+ * Xscale set_pte_ext translation, split into two halves to cope
+ * with work-arounds. r3 must be preserved by code between these
+ * two macros.
+ *
+ * Permission translation:
+ * YUWD AP SVC User
+ * 0xxx 00 no acc no acc
+ * 100x 00 r/o no acc
+ * 10x0 00 r/o no acc
+ * 1011 01 r/w no acc
+ * 110x 10 r/w r/o
+ * 11x0 10 r/w r/o
+ * 1111 11 r/w r/w
+ */
+ .macro xscale_set_pte_ext_prologue
+ str r1, [r0], #-2048 @ linux version
+
+ eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
+
+ bic r2, r1, #PTE_SMALL_AP_MASK @ keep C, B bits
+ orr r2, r2, #PTE_TYPE_EXT @ extended page
+
+ tst r3, #L_PTE_USER @ user?
+ orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w
+
+ tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty?
+ orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
+ @ combined with user -> user r/w
+ .endm
+
+ .macro xscale_set_pte_ext_epilogue
+ tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
+ movne r2, #0 @ no -> fault
+
+ str r2, [r0] @ hardware version
+ mov ip, #0
+ mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
+ mcr p15, 0, ip, c7, c10, 4 @ data write barrier
+ .endm
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <mach/hardware.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
.align 5
ENTRY(cpu_sa110_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext wc_disable=0
mov r0, r0
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
mcr p15, 0, r0, c7, c10, 4 @ drain WB
#include <linux/init.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <mach/hardware.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
.align 5
ENTRY(cpu_sa1100_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- bic r2, r1, #PTE_SMALL_AP_MASK
- bic r2, r2, #PTE_TYPE_MASK
- orr r2, r2, #PTE_TYPE_SMALL
-
- tst r1, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_SMALL_AP_URO_SRW
-
- tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
-
- tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0
-
- str r2, [r0] @ hardware version
+ armv3_set_pte_ext wc_disable=0
mov r0, r0
mcr p15, 0, r0, c7, c10, 1 @ clean D entry
mcr p15, 0, r0, c7, c10, 4 @ drain WB
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
* (hardware version is stored at -1024 bytes)
* - pte - PTE value to store
* - ext - value for extended PTE bits
- *
- * Permissions:
- * YUWD APX AP1 AP0 SVC User
- * 0xxx 0 0 0 no acc no acc
- * 100x 1 0 1 r/o no acc
- * 10x0 1 0 1 r/o no acc
- * 1011 0 0 1 r/w no acc
- * 110x 0 1 0 r/w r/o
- * 11x0 0 1 0 r/w r/o
- * 1111 0 1 1 r/w r/w
*/
+ armv6_mt_table cpu_v6
+
ENTRY(cpu_v6_set_pte_ext)
#ifdef CONFIG_MMU
- str r1, [r0], #-2048 @ linux version
-
- bic r3, r1, #0x000003f0
- bic r3, r3, #0x00000003
- orr r3, r3, r2
- orr r3, r3, #PTE_EXT_AP0 | 2
-
- tst r1, #L_PTE_WRITE
- tstne r1, #L_PTE_DIRTY
- orreq r3, r3, #PTE_EXT_APX
-
- tst r1, #L_PTE_USER
- orrne r3, r3, #PTE_EXT_AP1
- tstne r3, #PTE_EXT_APX
- bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
-
- tst r1, #L_PTE_YOUNG
- biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK
-
- tst r1, #L_PTE_EXEC
- orreq r3, r3, #PTE_EXT_XN
-
- tst r1, #L_PTE_PRESENT
- moveq r3, #0
-
- str r3, [r0]
- mcr p15, 0, r0, c7, c10, 1 @ flush_pte
+ armv6_set_pte_ext cpu_v6
#endif
mov pc, lr
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
ENTRY(cpu_v7_proc_init)
mov pc, lr
+ENDPROC(cpu_v7_proc_init)
ENTRY(cpu_v7_proc_fin)
mov pc, lr
+ENDPROC(cpu_v7_proc_fin)
/*
* cpu_v7_reset(loc)
.align 5
ENTRY(cpu_v7_reset)
mov pc, r0
+ENDPROC(cpu_v7_reset)
/*
* cpu_v7_do_idle()
* IRQs are already disabled.
*/
ENTRY(cpu_v7_do_idle)
- .long 0xe320f003 @ ARM V7 WFI instruction
+ wfi
mov pc, lr
+ENDPROC(cpu_v7_do_idle)
ENTRY(cpu_v7_dcache_clean_area)
#ifndef TLB_CAN_READ_FROM_L1_CACHE
dsb
#endif
mov pc, lr
+ENDPROC(cpu_v7_dcache_clean_area)
/*
* cpu_v7_switch_mm(pgd_phys, tsk)
isb
#endif
mov pc, lr
+ENDPROC(cpu_v7_switch_mm)
/*
* cpu_v7_set_pte_ext(ptep, pte)
* (hardware version is stored at -1024 bytes)
* - pte - PTE value to store
* - ext - value for extended PTE bits
- *
- * Permissions:
- * YUWD APX AP1 AP0 SVC User
- * 0xxx 0 0 0 no acc no acc
- * 100x 1 0 1 r/o no acc
- * 10x0 1 0 1 r/o no acc
- * 1011 0 0 1 r/w no acc
- * 110x 0 1 0 r/w r/o
- * 11x0 0 1 0 r/w r/o
- * 1111 0 1 1 r/w r/w
*/
ENTRY(cpu_v7_set_pte_ext)
#ifdef CONFIG_MMU
str r1, [r0], #-2048 @ linux version
bic r3, r1, #0x000003f0
- bic r3, r3, #0x00000003
+ bic r3, r3, #PTE_TYPE_MASK
orr r3, r3, r2
orr r3, r3, #PTE_EXT_AP0 | 2
+ tst r2, #1 << 4
+ orrne r3, r3, #PTE_EXT_TEX(1)
+
tst r1, #L_PTE_WRITE
tstne r1, #L_PTE_DIRTY
orreq r3, r3, #PTE_EXT_APX
tstne r3, #PTE_EXT_APX
bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
- tst r1, #L_PTE_YOUNG
- biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK
-
tst r1, #L_PTE_EXEC
orreq r3, r3, #PTE_EXT_XN
- tst r1, #L_PTE_PRESENT
+ tst r1, #L_PTE_YOUNG
+ tstne r1, #L_PTE_PRESENT
moveq r3, #0
str r3, [r0]
mcr p15, 0, r0, c7, c10, 1 @ flush_pte
#endif
mov pc, lr
+ENDPROC(cpu_v7_set_pte_ext)
cpu_v7_name:
.ascii "ARMv7 Processor"
mov r10, #0x1f @ domains 0, 1 = manager
mcr p15, 0, r10, c3, c0, 0 @ load domain access register
#endif
+ ldr r5, =0x40e040e0
+ ldr r6, =0xff0aa1a8
+ mcr p15, 0, r5, c10, c2, 0 @ write PRRR
+ mcr p15, 0, r6, c10, c2, 1 @ write NMRR
adr r5, v7_crval
ldmia r5, {r5, r6}
mrc p15, 0, r0, c1, c0, 0 @ read control register
bic r0, r0, r5 @ clear bits them
orr r0, r0, r6 @ set them
mov pc, lr @ return to head.S:__ret
+ENDPROC(__v7_setup)
/*
* V X F I D LR
*/
.type v7_crval, #object
v7_crval:
- crval clear=0x0120c302, mmuset=0x00c0387d, ucset=0x00c0187c
+ crval clear=0x0120c302, mmuset=0x10c0387d, ucset=0x00c0187c
__v7_setup_stack:
.space 4 * 11 @ 11 registers
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <mach/hardware.h>
#include <asm/pgtable.h>
#include <asm/pgtable-hwdef.h>
* cpu_xsc3_set_pte_ext(ptep, pte, ext)
*
* Set a PTE and flush it out
- *
*/
+cpu_xsc3_mt_table:
+ .long 0x00 @ L_PTE_MT_UNCACHED
+ .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE
+ .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
+ .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
+ .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
+ .long 0x00 @ unused
+ .long 0x00 @ L_PTE_MT_MINICACHE (not present)
+ .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?)
+ .long 0x00 @ unused
+ .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC
+ .long 0x00 @ unused
+ .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
+ .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED
+ .long 0x00 @ unused
+ .long 0x00 @ unused
+ .long 0x00 @ unused
+
.align 5
ENTRY(cpu_xsc3_set_pte_ext)
- str r1, [r0], #-2048 @ linux version
+ xscale_set_pte_ext_prologue
- bic r2, r1, #0xff0 @ keep C, B bits
- orr r2, r2, #PTE_TYPE_EXT @ extended page
tst r1, #L_PTE_SHARED @ shared?
- orrne r2, r2, #0x200
-
- eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- tst r3, #L_PTE_USER @ user?
- orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w
-
- tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty?
- orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
- @ combined with user -> user r/w
-
- @ If it's cacheable, it needs to be in L2 also.
- eor ip, r1, #L_PTE_CACHEABLE
- tst ip, #L_PTE_CACHEABLE
- orreq r2, r2, #PTE_EXT_TEX(0x5)
-
- tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
- movne r2, #0 @ no -> fault
-
- str r2, [r0] @ hardware version
- mov ip, #0
- mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
- mcr p15, 0, ip, c7, c10, 4 @ data write barrier
+ and r1, r1, #L_PTE_MT_MASK
+ adr ip, cpu_xsc3_mt_table
+ ldr ip, [ip, r1]
+ orrne r2, r2, #PTE_EXT_COHERENT @ interlock: mask in coherent bit
+ bic r2, r2, #0x0c @ clear old C,B bits
+ orr r2, r2, ip
+
+ xscale_set_pte_ext_epilogue
mov pc, lr
.ltorg
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
-#include <asm/elf.h>
+#include <asm/hwcap.h>
#include <asm/pgtable.h>
#include <asm/pgtable-hwdef.h>
#include <asm/page.h>
/* =============================== PageTable ============================== */
-#define PTE_CACHE_WRITE_ALLOCATE 0
-
/*
* cpu_xscale_switch_mm(pgd)
*
*
* Errata 40: must set memory to write-through for user read-only pages.
*/
+cpu_xscale_mt_table:
+ .long 0x00 @ L_PTE_MT_UNCACHED
+ .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE
+ .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH
+ .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK
+ .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED
+ .long 0x00 @ unused
+ .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE
+ .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC
+ .long 0x00 @ unused
+ .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC
+ .long 0x00 @ unused
+ .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED
+ .long 0x00 @ L_PTE_MT_DEV_NONSHARED
+ .long 0x00 @ unused
+ .long 0x00 @ unused
+ .long 0x00 @ unused
+
.align 5
ENTRY(cpu_xscale_set_pte_ext)
- str r1, [r0], #-2048 @ linux version
-
- bic r2, r1, #0xff0
- orr r2, r2, #PTE_TYPE_EXT @ extended page
-
- eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
-
- tst r3, #L_PTE_USER @ User?
- orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w
-
- tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
- orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
- @ combined with user -> user r/w
-
- @
- @ Handle the X bit. We want to set this bit for the minicache
- @ (U = E = B = W = 0, C = 1) or when write allocate is enabled,
- @ and we have a writeable, cacheable region. If we ignore the
- @ U and E bits, we can allow user space to use the minicache as
- @ well.
- @
- @ X = (C & ~W & ~B) | (C & W & B & write_allocate)
- @
- eor ip, r1, #L_PTE_CACHEABLE
- tst ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE
-#if PTE_CACHE_WRITE_ALLOCATE
- eorne ip, r1, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE
- tstne ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE
-#endif
- orreq r2, r2, #PTE_EXT_TEX(1)
+ xscale_set_pte_ext_prologue
@
- @ Erratum 40: The B bit must be cleared for a user read-only
- @ cacheable page.
- @
- @ B = B & ~(U & C & ~W)
+ @ Erratum 40: must set memory to write-through for user read-only pages
@
- and ip, r1, #L_PTE_USER | L_PTE_WRITE | L_PTE_CACHEABLE
- teq ip, #L_PTE_USER | L_PTE_CACHEABLE
- biceq r2, r2, #PTE_BUFFERABLE
+ and ip, r1, #(L_PTE_MT_MASK | L_PTE_USER | L_PTE_WRITE) & ~(4 << 2)
+ teq ip, #L_PTE_MT_WRITEBACK | L_PTE_USER
- tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
- movne r2, #0 @ no -> fault
+ moveq r1, #L_PTE_MT_WRITETHROUGH
+ and r1, r1, #L_PTE_MT_MASK
+ adr ip, cpu_xscale_mt_table
+ ldr ip, [ip, r1]
+ bic r2, r2, #0x0c
+ orr r2, r2, ip
- str r2, [r0] @ hardware version
- mov ip, #0
- mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line
- mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
+ xscale_set_pte_ext_epilogue
mov pc, lr
mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB
dsb
mov pc, lr
+ENDPROC(v7wbi_flush_user_tlb_range)
/*
* v7wbi_flush_kern_tlb_range(start,end)
dsb
isb
mov pc, lr
+ENDPROC(v7wbi_flush_kern_tlb_range)
.section ".text.init", #alloc, #execinstr
#include "fpmodule.h"
#include "fpmodule.inl"
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
static inline void loadSingle(const unsigned int Fn, const unsigned int __user *pMem)
{
oprofile-$(CONFIG_OPROFILE_ARM11_CORE) += op_model_arm11_core.o
oprofile-$(CONFIG_OPROFILE_ARMV6) += op_model_v6.o
oprofile-$(CONFIG_OPROFILE_MPCORE) += op_model_mpcore.o
+oprofile-$(CONFIG_OPROFILE_ARMV7) += op_model_v7.o
#include <linux/oprofile.h>
#include <linux/sched.h>
#include <linux/mm.h>
+#include <linux/uaccess.h>
#include <asm/ptrace.h>
-#include <asm/uaccess.h>
#include "../kernel/stacktrace.h"
spec = &op_mpcore_spec;
#endif
+#ifdef CONFIG_OPROFILE_ARMV7
+ spec = &op_armv7_spec;
+#endif
+
if (spec) {
ret = spec->init();
if (ret < 0)
extern struct op_arm_model_spec op_armv6_spec;
extern struct op_arm_model_spec op_mpcore_spec;
+extern struct op_arm_model_spec op_armv7_spec;
extern void arm_backtrace(struct pt_regs * const regs, unsigned int depth);
#include <linux/oprofile.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
--- /dev/null
+/**
+ * op_model_v7.c
+ * ARM V7 (Cortex A8) Event Monitor Driver
+ *
+ * Copyright 2008 Jean Pihet <jpihet@mvista.com>
+ * Copyright 2004 ARM SMP Development Team
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/oprofile.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+
+#include "op_counter.h"
+#include "op_arm_model.h"
+#include "op_model_v7.h"
+
+/* #define DEBUG */
+
+
+/*
+ * ARM V7 PMNC support
+ */
+
+static u32 cnt_en[CNTMAX];
+
+static inline void armv7_pmnc_write(u32 val)
+{
+ val &= PMNC_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val));
+}
+
+static inline u32 armv7_pmnc_read(void)
+{
+ u32 val;
+
+ asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
+ return val;
+}
+
+static inline u32 armv7_pmnc_enable_counter(unsigned int cnt)
+{
+ u32 val;
+
+ if (cnt >= CNTMAX) {
+ printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter"
+ " %d\n", smp_processor_id(), cnt);
+ return -1;
+ }
+
+ if (cnt == CCNT)
+ val = CNTENS_C;
+ else
+ val = (1 << (cnt - CNT0));
+
+ val &= CNTENS_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val));
+
+ return cnt;
+}
+
+static inline u32 armv7_pmnc_disable_counter(unsigned int cnt)
+{
+ u32 val;
+
+ if (cnt >= CNTMAX) {
+ printk(KERN_ERR "oprofile: CPU%u disabling wrong PMNC counter"
+ " %d\n", smp_processor_id(), cnt);
+ return -1;
+ }
+
+ if (cnt == CCNT)
+ val = CNTENC_C;
+ else
+ val = (1 << (cnt - CNT0));
+
+ val &= CNTENC_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val));
+
+ return cnt;
+}
+
+static inline u32 armv7_pmnc_enable_intens(unsigned int cnt)
+{
+ u32 val;
+
+ if (cnt >= CNTMAX) {
+ printk(KERN_ERR "oprofile: CPU%u enabling wrong PMNC counter"
+ " interrupt enable %d\n", smp_processor_id(), cnt);
+ return -1;
+ }
+
+ if (cnt == CCNT)
+ val = INTENS_C;
+ else
+ val = (1 << (cnt - CNT0));
+
+ val &= INTENS_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (val));
+
+ return cnt;
+}
+
+static inline u32 armv7_pmnc_getreset_flags(void)
+{
+ u32 val;
+
+ /* Read */
+ asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
+
+ /* Write to clear flags */
+ val &= FLAG_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val));
+
+ return val;
+}
+
+static inline int armv7_pmnc_select_counter(unsigned int cnt)
+{
+ u32 val;
+
+ if ((cnt == CCNT) || (cnt >= CNTMAX)) {
+ printk(KERN_ERR "oprofile: CPU%u selecting wrong PMNC counteri"
+ " %d\n", smp_processor_id(), cnt);
+ return -1;
+ }
+
+ val = (cnt - CNT0) & SELECT_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
+
+ return cnt;
+}
+
+static inline void armv7_pmnc_write_evtsel(unsigned int cnt, u32 val)
+{
+ if (armv7_pmnc_select_counter(cnt) == cnt) {
+ val &= EVTSEL_MASK;
+ asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
+ }
+}
+
+static void armv7_pmnc_reset_counter(unsigned int cnt)
+{
+ u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
+ u32 val = -(u32)counter_config[cpu_cnt].count;
+
+ switch (cnt) {
+ case CCNT:
+ armv7_pmnc_disable_counter(cnt);
+
+ asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
+
+ if (cnt_en[cnt] != 0)
+ armv7_pmnc_enable_counter(cnt);
+
+ break;
+
+ case CNT0:
+ case CNT1:
+ case CNT2:
+ case CNT3:
+ armv7_pmnc_disable_counter(cnt);
+
+ if (armv7_pmnc_select_counter(cnt) == cnt)
+ asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val));
+
+ if (cnt_en[cnt] != 0)
+ armv7_pmnc_enable_counter(cnt);
+
+ break;
+
+ default:
+ printk(KERN_ERR "oprofile: CPU%u resetting wrong PMNC counter"
+ " %d\n", smp_processor_id(), cnt);
+ break;
+ }
+}
+
+int armv7_setup_pmnc(void)
+{
+ unsigned int cnt;
+
+ if (armv7_pmnc_read() & PMNC_E) {
+ printk(KERN_ERR "oprofile: CPU%u PMNC still enabled when setup"
+ " new event counter.\n", smp_processor_id());
+ return -EBUSY;
+ }
+
+ /*
+ * Initialize & Reset PMNC: C bit, D bit and P bit.
+ * Note: Using a slower count for CCNT (D bit: divide by 64) results
+ * in a more stable system
+ */
+ armv7_pmnc_write(PMNC_P | PMNC_C | PMNC_D);
+
+
+ for (cnt = CCNT; cnt < CNTMAX; cnt++) {
+ unsigned long event;
+ u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
+
+ /*
+ * Disable counter
+ */
+ armv7_pmnc_disable_counter(cnt);
+ cnt_en[cnt] = 0;
+
+ if (!counter_config[cpu_cnt].enabled)
+ continue;
+
+ event = counter_config[cpu_cnt].event & 255;
+
+ /*
+ * Set event (if destined for PMNx counters)
+ * We don't need to set the event if it's a cycle count
+ */
+ if (cnt != CCNT)
+ armv7_pmnc_write_evtsel(cnt, event);
+
+ /*
+ * Enable interrupt for this counter
+ */
+ armv7_pmnc_enable_intens(cnt);
+
+ /*
+ * Reset counter
+ */
+ armv7_pmnc_reset_counter(cnt);
+
+ /*
+ * Enable counter
+ */
+ armv7_pmnc_enable_counter(cnt);
+ cnt_en[cnt] = 1;
+ }
+
+ return 0;
+}
+
+static inline void armv7_start_pmnc(void)
+{
+ armv7_pmnc_write(armv7_pmnc_read() | PMNC_E);
+}
+
+static inline void armv7_stop_pmnc(void)
+{
+ armv7_pmnc_write(armv7_pmnc_read() & ~PMNC_E);
+}
+
+/*
+ * CPU counters' IRQ handler (one IRQ per CPU)
+ */
+static irqreturn_t armv7_pmnc_interrupt(int irq, void *arg)
+{
+ struct pt_regs *regs = get_irq_regs();
+ unsigned int cnt;
+ u32 flags;
+
+
+ /*
+ * Stop IRQ generation
+ */
+ armv7_stop_pmnc();
+
+ /*
+ * Get and reset overflow status flags
+ */
+ flags = armv7_pmnc_getreset_flags();
+
+ /*
+ * Cycle counter
+ */
+ if (flags & FLAG_C) {
+ u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), CCNT);
+ armv7_pmnc_reset_counter(CCNT);
+ oprofile_add_sample(regs, cpu_cnt);
+ }
+
+ /*
+ * PMNC counters 0:3
+ */
+ for (cnt = CNT0; cnt < CNTMAX; cnt++) {
+ if (flags & (1 << (cnt - CNT0))) {
+ u32 cpu_cnt = CPU_COUNTER(smp_processor_id(), cnt);
+ armv7_pmnc_reset_counter(cnt);
+ oprofile_add_sample(regs, cpu_cnt);
+ }
+ }
+
+ /*
+ * Allow IRQ generation
+ */
+ armv7_start_pmnc();
+
+ return IRQ_HANDLED;
+}
+
+int armv7_request_interrupts(int *irqs, int nr)
+{
+ unsigned int i;
+ int ret = 0;
+
+ for (i = 0; i < nr; i++) {
+ ret = request_irq(irqs[i], armv7_pmnc_interrupt,
+ IRQF_DISABLED, "CP15 PMNC", NULL);
+ if (ret != 0) {
+ printk(KERN_ERR "oprofile: unable to request IRQ%u"
+ " for ARMv7\n",
+ irqs[i]);
+ break;
+ }
+ }
+
+ if (i != nr)
+ while (i-- != 0)
+ free_irq(irqs[i], NULL);
+
+ return ret;
+}
+
+void armv7_release_interrupts(int *irqs, int nr)
+{
+ unsigned int i;
+
+ for (i = 0; i < nr; i++)
+ free_irq(irqs[i], NULL);
+}
+
+#ifdef DEBUG
+static void armv7_pmnc_dump_regs(void)
+{
+ u32 val;
+ unsigned int cnt;
+
+ printk(KERN_INFO "PMNC registers dump:\n");
+
+ asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
+ printk(KERN_INFO "PMNC =0x%08x\n", val);
+
+ asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val));
+ printk(KERN_INFO "CNTENS=0x%08x\n", val);
+
+ asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val));
+ printk(KERN_INFO "INTENS=0x%08x\n", val);
+
+ asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val));
+ printk(KERN_INFO "FLAGS =0x%08x\n", val);
+
+ asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val));
+ printk(KERN_INFO "SELECT=0x%08x\n", val);
+
+ asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
+ printk(KERN_INFO "CCNT =0x%08x\n", val);
+
+ for (cnt = CNT0; cnt < CNTMAX; cnt++) {
+ armv7_pmnc_select_counter(cnt);
+ asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
+ printk(KERN_INFO "CNT[%d] count =0x%08x\n", cnt-CNT0, val);
+ asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val));
+ printk(KERN_INFO "CNT[%d] evtsel=0x%08x\n", cnt-CNT0, val);
+ }
+}
+#endif
+
+
+static int irqs[] = {
+#ifdef CONFIG_ARCH_OMAP3
+ INT_34XX_BENCH_MPU_EMUL,
+#endif
+};
+
+static void armv7_pmnc_stop(void)
+{
+#ifdef DEBUG
+ armv7_pmnc_dump_regs();
+#endif
+ armv7_stop_pmnc();
+ armv7_release_interrupts(irqs, ARRAY_SIZE(irqs));
+}
+
+static int armv7_pmnc_start(void)
+{
+ int ret;
+
+#ifdef DEBUG
+ armv7_pmnc_dump_regs();
+#endif
+ ret = armv7_request_interrupts(irqs, ARRAY_SIZE(irqs));
+ if (ret >= 0)
+ armv7_start_pmnc();
+
+ return ret;
+}
+
+static int armv7_detect_pmnc(void)
+{
+ return 0;
+}
+
+struct op_arm_model_spec op_armv7_spec = {
+ .init = armv7_detect_pmnc,
+ .num_counters = 5,
+ .setup_ctrs = armv7_setup_pmnc,
+ .start = armv7_pmnc_start,
+ .stop = armv7_pmnc_stop,
+ .name = "arm/armv7",
+};
--- /dev/null
+/**
+ * op_model_v7.h
+ * ARM v7 (Cortex A8) Event Monitor Driver
+ *
+ * Copyright 2008 Jean Pihet <jpihet@mvista.com>
+ * Copyright 2004 ARM SMP Development Team
+ * Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
+ * Copyright 2000-2004 MontaVista Software Inc
+ * Copyright 2004 Dave Jiang <dave.jiang@intel.com>
+ * Copyright 2004 Intel Corporation
+ * Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
+ * Copyright 2004 Oprofile Authors
+ *
+ * Read the file COPYING
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef OP_MODEL_V7_H
+#define OP_MODEL_V7_H
+
+/*
+ * Per-CPU PMNC: config reg
+ */
+#define PMNC_E (1 << 0) /* Enable all counters */
+#define PMNC_P (1 << 1) /* Reset all counters */
+#define PMNC_C (1 << 2) /* Cycle counter reset */
+#define PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */
+#define PMNC_X (1 << 4) /* Export to ETM */
+#define PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/
+#define PMNC_MASK 0x3f /* Mask for writable bits */
+
+/*
+ * Available counters
+ */
+#define CCNT 0
+#define CNT0 1
+#define CNT1 2
+#define CNT2 3
+#define CNT3 4
+#define CNTMAX 5
+
+#define CPU_COUNTER(cpu, counter) ((cpu) * CNTMAX + (counter))
+
+/*
+ * CNTENS: counters enable reg
+ */
+#define CNTENS_P0 (1 << 0)
+#define CNTENS_P1 (1 << 1)
+#define CNTENS_P2 (1 << 2)
+#define CNTENS_P3 (1 << 3)
+#define CNTENS_C (1 << 31)
+#define CNTENS_MASK 0x8000000f /* Mask for writable bits */
+
+/*
+ * CNTENC: counters disable reg
+ */
+#define CNTENC_P0 (1 << 0)
+#define CNTENC_P1 (1 << 1)
+#define CNTENC_P2 (1 << 2)
+#define CNTENC_P3 (1 << 3)
+#define CNTENC_C (1 << 31)
+#define CNTENC_MASK 0x8000000f /* Mask for writable bits */
+
+/*
+ * INTENS: counters overflow interrupt enable reg
+ */
+#define INTENS_P0 (1 << 0)
+#define INTENS_P1 (1 << 1)
+#define INTENS_P2 (1 << 2)
+#define INTENS_P3 (1 << 3)
+#define INTENS_C (1 << 31)
+#define INTENS_MASK 0x8000000f /* Mask for writable bits */
+
+/*
+ * EVTSEL: Event selection reg
+ */
+#define EVTSEL_MASK 0x7f /* Mask for writable bits */
+
+/*
+ * SELECT: Counter selection reg
+ */
+#define SELECT_MASK 0x1f /* Mask for writable bits */
+
+/*
+ * FLAG: counters overflow flag status reg
+ */
+#define FLAG_P0 (1 << 0)
+#define FLAG_P1 (1 << 1)
+#define FLAG_P2 (1 << 2)
+#define FLAG_P3 (1 << 3)
+#define FLAG_C (1 << 31)
+#define FLAG_MASK 0x8000000f /* Mask for writable bits */
+
+
+int armv7_setup_pmu(void);
+int armv7_start_pmu(void);
+int armv7_stop_pmu(void);
+int armv7_request_interrupts(int *, int);
+void armv7_release_interrupts(int *, int);
+
+#endif
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <asm/system.h>
+#include <asm/cputype.h>
#include "op_counter.h"
#include "op_arm_model.h"
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/mach/map.h>
*/
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
void * __iomem __iop3xx_ioremap(unsigned long cookie, size_t size,
unsigned int mtype)
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/ioport.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <asm/irq.h>
#include <asm/signal.h>
#include <asm/system.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/timex.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/mach/irq.h>
*/
#include <linux/irq.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/common.h>
#define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR)
#include <linux/platform_device.h>
#include <linux/cpufreq.h>
#include <linux/debugfs.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/clock.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
-#include <asm/io.h>
#include <asm/setup.h>
#include <mach/common.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/system.h>
#define VERY_HI_RATE 900000000
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/system.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/dmtimer.h>
-#include <asm/io.h>
#include <mach/irqs.h>
/* register offsets */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/bootmem.h>
+#include <linux/io.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/mach/map.h>
#include <mach/board.h>
#include <linux/sysdev.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <mach/gpio.h>
#include <asm/mach/irq.h>
-#include <asm/io.h>
-
/*
* OMAP1510 GPIO registers
*/
#ifndef __ASM_ARCH_OMAP_GPIO_H
#define __ASM_ARCH_OMAP_GPIO_H
+#include <linux/io.h>
#include <mach/irqs.h>
-#include <asm/io.h>
#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000
#define INT_24XX_USB_IRQ_OTG 80
#define INT_24XX_MMC_IRQ 83
+#define INT_34XX_BENCH_MPU_EMUL 3
+
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192
#include <linux/blkdev.h>
#include <linux/err.h>
#include <linux/delay.h>
-#include <asm/io.h>
+#include <linux/io.h>
#include <mach/mailbox.h>
#include "mailbox.h"
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/io.h>
#include <asm/system.h>
-#include <asm/io.h>
#include <linux/spinlock.h>
#include <mach/mux.h>
#include <linux/spinlock.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <mach/hardware.h>
#define OCPI_BASE 0xfffec320
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <asm/tlb.h>
-#include <asm/io.h>
#include <asm/cacheflush.h>
#include <asm/mach/map.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/usb/otg.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <linux/clk.h>
#include <linux/mutex.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-clock.h>
#include <mach/regs-gpio.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/partitions.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/regs-gpio.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/delay.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/delay.h>
#include <asm/cacheflush.h>
#include <asm/mach/arch.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/fb.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <asm/plat-s3c/regs-serial.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/dma.h>
#include <asm/mach/dma.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-gpio.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/device.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <mach/map.h>
#include <mach/regs-gpio.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
+#include <linux/io.h>
#include <asm/cacheflush.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/plat-s3c/regs-serial.h>
#include <mach/regs-clock.h>
#include <linux/ioport.h>
#include <linux/mutex.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/atomic.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <mach/regs-clock.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/sysdev.h>
+#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/irq.h>
-#include <asm/io.h>
#include <asm/mach/irq.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/regs-clock.h>
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/io.h>
#include <asm/system.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
-#include <asm/io.h>
#include <asm/irq.h>
#include <mach/map.h>
#include <asm/plat-s3c/regs-timer.h>
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
-# Last update: Wed Aug 13 21:56:02 2008
+# Last update: Thu Sep 25 10:10:50 2008
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
jade MACH_JADE JADE 1821
ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
-gprisc3 MACH_GPRISC4 GPRISC4 1823
+gprisc3 MACH_GPRISC3 GPRISC3 1823
stamp9260 MACH_STAMP9260 STAMP9260 1824
smdk6430 MACH_SMDK6430 SMDK6430 1825
smdkc100 MACH_SMDKC100 SMDKC100 1826
ginza MACH_GINZA GINZA 1869
a636n MACH_A636N A636N 1870
imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871
-nenoc MACH_NEMOC NEMOC 1872
+nemoc MACH_NEMOC NEMOC 1872
geneva MACH_GENEVA GENEVA 1873
+htcpharos MACH_HTCPHAROS HTCPHAROS 1874
+neonc MACH_NEONC NEONC 1875
+nas7100 MACH_NAS7100 NAS7100 1876
+teuphone MACH_TEUPHONE TEUPHONE 1877
+annax_eth2 MACH_ANNAX_ETH2 ANNAX_ETH2 1878
+csb733 MACH_CSB733 CSB733 1879
+bk3 MACH_BK3 BK3 1880
+omap_em32 MACH_OMAP_EM32 OMAP_EM32 1881
+et9261cp MACH_ET9261CP ET9261CP 1882
+jasperc MACH_JASPERC JASPERC 1883
+issi_arm9 MACH_ISSI_ARM9 ISSI_ARM9 1884
+ued MACH_UED UED 1885
+esiblade MACH_ESIBLADE ESIBLADE 1886
+eye02 MACH_EYE02 EYE02 1887
+imx27kbd MACH_IMX27KBD IMX27KBD 1888
+sst61vc010_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889
+kixvp435 MACH_KIXVP435 KIXVP435 1890
+kixnp435 MACH_KIXNP435 KIXNP435 1891
+africa MACH_AFRICA AFRICA 1892
+nh233 MACH_NH233 NH233 1893
+rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894
+bcm4760 MACH_BCM4760 BCM4760 1895
+eddy_v2 MACH_EDDY_V2 EDDY_V2 1896
+realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897
+hid_a7 MACH_HID_A7 HID_A7 1898
+hero MACH_HERO HERO 1899
+omap_poseidon MACH_OMAP_POSEIDON OMAP_POSEIDON 1900
+realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901
+micro9s MACH_MICRO9S MICRO9S 1902
+mako MACH_MAKO MAKO 1903
+xdaflame MACH_XDAFLAME XDAFLAME 1904
+phidget_sbc2 MACH_PHIDGET_SBC2 PHIDGET_SBC2 1905
+limestone MACH_LIMESTONE LIMESTONE 1906
+iprobe_c32 MACH_IPROBE_C32 IPROBE_C32 1907
+rut100 MACH_RUT100 RUT100 1908
+asusp535 MACH_ASUSP535 ASUSP535 1909
+htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910
+sygdg1 MACH_SYGDG1 SYGDG1 1911
#include <asm/assembler.h>
#include <asm/vfpmacros.h>
- .globl do_vfp
-do_vfp:
+ENTRY(do_vfp)
enable_irq
ldr r4, .LCvfp
ldr r11, [r10, #TI_CPU] @ CPU number
add r10, r10, #TI_VFPSTATE @ r10 = workspace
ldr pc, [r4] @ call VFP entry point
+ENDPROC(do_vfp)
ENTRY(vfp_null_entry)
mov pc, lr
@ failure to the VFP initialisation code.
__INIT
- .globl vfp_testing_entry
-vfp_testing_entry:
+ENTRY(vfp_testing_entry)
ldr r0, VFP_arch_address
str r5, [r0] @ known non-zero value
mov pc, r9 @ we have handled the fault
+ENDPROC(vfp_testing_entry)
VFP_arch_address:
.word VFP_arch
@ r11 = CPU number
@ lr = failure return
- .globl vfp_support_entry
-vfp_support_entry:
+ENTRY(vfp_support_entry)
DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
VFPFMRX r1, FPEXC @ Is the VFP enabled?
@ code will raise an exception if
@ required. If not, the user code will
@ retry the faulted instruction
+ENDPROC(vfp_support_entry)
#ifdef CONFIG_SMP
- .globl vfp_save_state
- .type vfp_save_state, %function
-vfp_save_state:
+ENTRY(vfp_save_state)
@ Save the current VFP state
@ r0 - save location
@ r1 - FPEXC
VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present)
stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
mov pc, lr
+ENDPROC(vfp_save_state)
#endif
last_VFP_context_address:
.word last_VFP_context
- .globl vfp_get_float
-vfp_get_float:
+ENTRY(vfp_get_float)
add pc, pc, r0, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1
mov pc, lr
.endr
+ENDPROC(vfp_get_float)
- .globl vfp_put_float
-vfp_put_float:
+ENTRY(vfp_put_float)
add pc, pc, r1, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1
mov pc, lr
.endr
+ENDPROC(vfp_put_float)
- .globl vfp_get_double
-vfp_get_double:
+ENTRY(vfp_get_double)
add pc, pc, r0, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
mov r0, #0
mov r1, #0
mov pc, lr
+ENDPROC(vfp_get_double)
- .globl vfp_put_double
-vfp_put_double:
+ENTRY(vfp_put_double)
add pc, pc, r2, lsl #3
mov r0, r0
.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
mov pc, lr
.endr
#endif
+ENDPROC(vfp_put_double)
* Error Corrected Code Controller (ECC) - System peripherals regsters.
* Based on AT91SAM9260 datasheet revision B.
*
+ * Copyright (C) 2007 Andrew Victor
+ * Copyright (C) 2007 Atmel Corporation.
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
config CS89x0
tristate "CS89x0 support"
- depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X)
+ depends on NET_ETHERNET && (ISA || EISA || MACH_IXDP2351 \
+ || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_MX31ADS)
---help---
Support for CS89x0 chipset based Ethernet cards. If you have a
network (Ethernet) card of this type, say Y and read the
To compile this driver as a module, choose M here. The module
will be called cs89x0.
+config CS89x0_NONISA_IRQ
+ def_bool y
+ depends on CS89x0 != n
+ depends on MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X || MACH_MX31ADS
+
config TC35815
tristate "TOSHIBA TC35815 Ethernet support"
depends on NET_PCI && PCI && MIPS
#define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */
static unsigned int netcard_portlist[] __used __initdata = {CIRRUS_DEFAULT_BASE, 0};
static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0};
+#elif defined(CONFIG_MACH_MX31ADS)
+#include <mach/board-mx31ads.h>
+static unsigned int netcard_portlist[] __used __initdata = {
+ PBC_BASE_ADDRESS + PBC_CS8900A_IOBASE + 0x300, 0
+};
+static unsigned cs8900_irq_map[] = {EXPIO_INT_ENET_INT, 0, 0, 0};
#else
static unsigned int netcard_portlist[] __used __initdata =
{ 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
} else {
i = lp->isa_config & INT_NO_MASK;
if (lp->chip_type == CS8900) {
-#if defined(CONFIG_MACH_IXDP2351) || defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX010X)
+#ifdef CONFIG_CS89x0_NONISA_IRQ
i = cs8900_irq_map[0];
#else
/* Translate the IRQ using the IRQ mapping table. */
void __init reset_chip(struct net_device *dev)
{
+#if !defined(CONFIG_MACH_MX31ADS)
#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01)
struct net_local *lp = netdev_priv(dev);
int ioaddr = dev->base_addr;
reset_start_time = jiffies;
while( (readreg(dev, PP_SelfST) & INIT_DONE) == 0 && jiffies - reset_start_time < 2)
;
+#endif /* !CONFIG_MACH_MX31ADS */
}
else
#endif
{
-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X)
+#ifndef CONFIG_CS89x0_NONISA_IRQ
if (((1 << dev->irq) & lp->irq_map) == 0) {
printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n",
dev->name, dev->irq, lp->irq_map);
#define UART_DUMMY_LSR_RX 0x100
#define UART_PORT_SIZE (KS8695_USR - KS8695_URRB + 4)
-#define tx_enabled(port) ((port)->unused[0])
-#define rx_enabled(port) ((port)->unused[1])
+static inline int tx_enabled(struct uart_port *port)
+{
+ return port->unused[0] & 1;
+}
+
+static inline int rx_enabled(struct uart_port *port)
+{
+ return port->unused[0] & 2;
+}
+
+static inline int ms_enabled(struct uart_port *port)
+{
+ return port->unused[0] & 4;
+}
+
+static inline void ms_enable(struct uart_port *port, int enabled)
+{
+ if(enabled)
+ port->unused[0] |= 4;
+ else
+ port->unused[0] &= ~4;
+}
+
+static inline void rx_enable(struct uart_port *port, int enabled)
+{
+ if(enabled)
+ port->unused[0] |= 2;
+ else
+ port->unused[0] &= ~2;
+}
+
+static inline void tx_enable(struct uart_port *port, int enabled)
+{
+ if(enabled)
+ port->unused[0] |= 1;
+ else
+ port->unused[0] &= ~1;
+}
#ifdef SUPPORT_SYSRQ
{
if (tx_enabled(port)) {
disable_irq(KS8695_IRQ_UART_TX);
- tx_enabled(port) = 0;
+ tx_enable(port, 0);
}
}
{
if (!tx_enabled(port)) {
enable_irq(KS8695_IRQ_UART_TX);
- tx_enabled(port) = 1;
+ tx_enable(port, 1);
}
}
{
if (rx_enabled(port)) {
disable_irq(KS8695_IRQ_UART_RX);
- rx_enabled(port) = 0;
+ rx_enable(port, 0);
}
}
static void ks8695uart_enable_ms(struct uart_port *port)
{
- enable_irq(KS8695_IRQ_UART_MODEM_STATUS);
+ if (!ms_enabled(port)) {
+ enable_irq(KS8695_IRQ_UART_MODEM_STATUS);
+ ms_enable(port,1);
+ }
}
static void ks8695uart_disable_ms(struct uart_port *port)
{
- disable_irq(KS8695_IRQ_UART_MODEM_STATUS);
+ if (ms_enabled(port)) {
+ disable_irq(KS8695_IRQ_UART_MODEM_STATUS);
+ ms_enable(port,0);
+ }
}
static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id)
int retval;
set_irq_flags(KS8695_IRQ_UART_TX, IRQF_VALID | IRQF_NOAUTOEN);
- tx_enabled(port) = 0;
- rx_enabled(port) = 1;
+ tx_enable(port, 0);
+ rx_enable(port, 1);
+ ms_enable(port, 1);
/*
* Allocate the IRQ
var->red.offset = 11;
var->blue.offset = 0;
var->green.length = 6;
+ } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
+ var->red.offset = 10;
+ var->blue.offset = 0;
+ var->green.length = 5;
} else {
/* BGR:555 mode */
var->red.offset = 0;
static int __init ixp4xx_wdt_init(void)
{
int ret;
- unsigned long processor_id;
- asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
- if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
+ if (!(read_cpuid_id() & 0xf) && !cpu_is_ixp46x()) {
printk(KERN_ERR "IXP4XXX Watchdog: Rev. A0 IXP42x CPU detected"
" - watchdog disabled\n");
*/
#define ATMEL_LCDC_WIRING_BGR 0
#define ATMEL_LCDC_WIRING_RGB 1
+#define ATMEL_LCDC_WIRING_RGB555 2
/* LCD Controller info data structure, stored in device platform_data */
projects / platform / adaptation / renesas_rcar / renesas_kernel.git / commitdiff