codeGen->regSet.rsMaskPreSpillRegArg |= regMask;
}
}
- else
- {
- varDsc->lvOnFrame = true; // The final home for this incoming register might be our local stack frame
- }
-
#else // !_TARGET_ARM_
#if defined(FEATURE_UNIX_AMD64_STRUCT_PASSING)
SYSTEMV_AMD64_CORINFO_STRUCT_REG_PASSING_DESCRIPTOR structDesc;
}
}
#endif // FEATURE_UNIX_AMD64_STRUCT_PASSING
+#endif // !_TARGET_ARM_
// The final home for this incoming register might be our local stack frame.
// For System V platforms the final home will always be on the local stack frame.
varDsc->lvOnFrame = true;
-#endif // !_TARGET_ARM_
-
bool canPassArgInRegisters = false;
#if defined(FEATURE_UNIX_AMD64_STRUCT_PASSING)
JITDUMP("TreeNodeInfoInit for: ");
DISPNODE(tree);
- NYI_IF(tree->TypeGet() == TYP_STRUCT, "lowering struct");
NYI_IF(tree->TypeGet() == TYP_DOUBLE, "lowering double");
switch (tree->OperGet())
case GT_LCL_FLD_ADDR:
case GT_LCL_VAR:
case GT_LCL_VAR_ADDR:
- {
- unsigned varNum = tree->gtLclVarCommon.gtLclNum;
- LclVarDsc* varDsc = comp->lvaTable + varNum;
- NYI_IF(varTypeIsStruct(varDsc), "lowering struct var");
- }
case GT_PHYSREG:
case GT_CLS_VAR_ADDR:
case GT_IL_OFFSET: