Revert "net: dsa: bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278"

This reverts commit 7458bd540fa0a90220b9e8c349d910d9dde9caf8 ("net: dsa:
bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278") as it causes
advanced congestion buffering issues with 7278 switch devices when using
their internal Giabit PHY. While this is being debugged, continue with
conservative defaults that work and do not cause packet loss.

Fixes: 7458bd540fa0 ("net: dsa: bcm_sf2: Also configure Port 5 for 2Gb/sec on 7278")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Vivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index 6feaf8c..d195554 100644 (file)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -616,9 +616,6 @@ force_link:
        if (state->duplex == DUPLEX_FULL)
                reg |= DUPLX_MODE;
 
-       if (priv->type == BCM7278_DEVICE_ID && dsa_is_cpu_port(ds, port))
-               reg |= GMIIP_SPEED_UP_2G;
-
        core_writel(priv, reg, offset);
 }
 

diff --git a/drivers/net/dsa/bcm_sf2_regs.h b/drivers/net/dsa/bcm_sf2_regs.h
index 7844781..d8a5e62 100644 (file)
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -178,7 +178,6 @@ enum bcm_sf2_reg_offs {
 #define  RXFLOW_CNTL                   (1 << 4)
 #define  TXFLOW_CNTL                   (1 << 5)
 #define  SW_OVERRIDE                   (1 << 6)
-#define  GMIIP_SPEED_UP_2G             (1 << 7)
 
 #define CORE_WATCHDOG_CTRL             0x001e4
 #define  SOFTWARE_RESET                        (1 << 7)