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RISC-V: Remove unused TI/TF vector modes.
author
Ju-Zhe Zhong
<juzhe.zhong@rivai.ai>
Mon, 24 Oct 2022 02:05:24 +0000
(10:05 +0800)
committer
Kito Cheng
<kito.cheng@sifive.com>
Mon, 24 Oct 2022 02:21:03 +0000
(10:21 +0800)
gcc/ChangeLog:
* config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes.
gcc/config/riscv/riscv-vector-switch.def
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diff --git
a/gcc/config/riscv/riscv-vector-switch.def
b/gcc/config/riscv/riscv-vector-switch.def
index
cacfccb
..
ee8ebd5
100644
(file)
--- a/
gcc/config/riscv/riscv-vector-switch.def
+++ b/
gcc/config/riscv/riscv-vector-switch.def
@@
-155,10
+155,6
@@
ENTRY (VNx4DF, TARGET_VECTOR_FP64)
ENTRY (VNx2DF, TARGET_VECTOR_FP64)
ENTRY (VNx1DF, TARGET_VECTOR_FP64)
-/* SEW = 128. Disable all of them. */
-ENTRY (VNx2TI, false)
-ENTRY (VNx2TF, false)
-
#undef TARGET_VECTOR_FP32
#undef TARGET_VECTOR_FP64
#undef ENTRY