2005-05-09 Adrian Straetling <straetling@de.ibm.com>
+ * config/s390/s390-protos.h: (s390_match_ccmode,
+ s390_match_ccmode_set, reg_used_in_mem_p,
+ symbolic_reference_mentioned_p, tls_symbolic_reference_mentioned_p,
+ legitimate_la_operand_p, preferred_la_operand_p,
+ s390_short_displacement, addr_generation_dependency_p,
+ legitimate_reload_constant_p, legitimate_address_p): Change return type
+ into 'bool'.
+ (s390_tm_ccmode): Change type of parameter "mixed" into 'bool'.
+ * config/s390/s390.c: (s390_match_ccmode,
+ symbolic_reference_mentioned_p, tls_symbolic_reference_mentioned_p,
+ legitimate_reload_constant_p): Change return type into 'bool'.
+ (preferred_la_operand_p,legitimate_la_operand_p, legitimate_address_p):
+ Likewise. Additionally adapted comment.
+ (s390_extra_constraint_p): Change Comment to reflect 'int' return type.
+ (s390_tm_ccmode): Change type of parameter "mixed" into 'bool'.
+ (s390_decompose_address): Change the type of the internal flags
+ "pointer", "base_ptr", "indx_ptr", and the return value into 'bool'.
+ (struct s390_address): Change type of "pointer" into bool.
+ * config/s390/s390.md: ("*tmdi_reg", "*tmsi_reg", "tm<mode>_full"):
+ Adapt calls for 's390_tm_ccmode' to the new signature.
+
+2005-05-09 Adrian Straetling <straetling@de.ibm.com>
+
* config/s390/s390.c: (s390_match_ccmode_set,
s390_branch_condition_mnemonic, s390_short_displacement,
s390_decompose_address, get_thread_pointer, legitimize_tls_address,
extern bool s390_offset_p (rtx, rtx, rtx);
extern int tls_symbolic_operand (rtx);
-extern int s390_match_ccmode (rtx, enum machine_mode);
-extern enum machine_mode s390_tm_ccmode (rtx, rtx, int);
+extern bool s390_match_ccmode (rtx, enum machine_mode);
+extern enum machine_mode s390_tm_ccmode (rtx, rtx, bool);
extern enum machine_mode s390_select_ccmode (enum rtx_code, rtx, rtx);
extern void s390_canonicalize_comparison (enum rtx_code *, rtx *, rtx *);
extern rtx s390_emit_compare (enum rtx_code, rtx, rtx);
extern void s390_emit_jump (rtx, rtx);
-extern int symbolic_reference_mentioned_p (rtx);
-extern int tls_symbolic_reference_mentioned_p (rtx);
-extern int legitimate_la_operand_p (rtx);
-extern int preferred_la_operand_p (rtx, rtx);
+extern bool symbolic_reference_mentioned_p (rtx);
+extern bool tls_symbolic_reference_mentioned_p (rtx);
+extern bool legitimate_la_operand_p (rtx);
+extern bool preferred_la_operand_p (rtx, rtx);
extern int legitimate_pic_operand_p (rtx);
extern int legitimate_constant_p (rtx);
-extern int legitimate_reload_constant_p (rtx);
-extern int legitimate_address_p (enum machine_mode, rtx, int);
+extern bool legitimate_reload_constant_p (rtx);
+extern bool legitimate_address_p (enum machine_mode, rtx, int);
extern rtx legitimize_pic_address (rtx, rtx);
extern rtx legitimize_address (rtx, rtx, enum machine_mode);
extern rtx legitimize_reload_address (rtx, enum machine_mode, int, int);
rtx base;
rtx indx;
rtx disp;
- int pointer;
+ bool pointer;
};
/* Which cpu are we tuning for. */
the source and destination have matching CC modes and that
CC mode is at least as constrained as REQ_MODE. */
-static int
+static bool
s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
{
enum machine_mode set_mode;
CC mode is at least as constrained as REQ_MODE.
If REQ_MODE is VOIDmode, always return false. */
-int
+bool
s390_match_ccmode (rtx insn, enum machine_mode req_mode)
{
int i;
/* s390_tm_ccmode returns VOIDmode to indicate failure. */
if (req_mode == VOIDmode)
- return 0;
+ return false;
if (GET_CODE (PATTERN (insn)) == SET)
return s390_match_ccmode_set (PATTERN (insn), req_mode);
rtx set = XVECEXP (PATTERN (insn), 0, i);
if (GET_CODE (set) == SET)
if (!s390_match_ccmode_set (set, req_mode))
- return 0;
+ return false;
}
- return 1;
+ return true;
}
/* If a test-under-mask instruction can be used to implement
if the instruction cannot (TM). */
enum machine_mode
-s390_tm_ccmode (rtx op1, rtx op2, int mixed)
+s390_tm_ccmode (rtx op1, rtx op2, bool mixed)
{
int bit0, bit1;
/* Return true if DISP is a valid short displacement. */
-static int
+static bool
s390_short_displacement (rtx disp)
{
/* No displacement is OK. */
if (!disp)
- return 1;
+ return true;
/* Integer displacement in range. */
if (GET_CODE (disp) == CONST_INT)
&& GET_CODE (XEXP (disp, 0)) == UNSPEC
&& (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
|| XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
- return 0;
+ return false;
/* All other symbolic constants are literal pool references,
which are OK as the literal pool must be small. */
if (GET_CODE (disp) == CONST)
- return 1;
+ return true;
- return 0;
+ return false;
}
/* Decompose a RTL expression ADDR for a memory address into
its components, returned in OUT.
- Returns 0 if ADDR is not a valid memory address, nonzero
+ Returns false if ADDR is not a valid memory address, true
otherwise. If OUT is NULL, don't return the components,
but check for validity only.
rtx indx = NULL_RTX;
rtx disp = NULL_RTX;
rtx orig_disp;
- int pointer = FALSE;
- int base_ptr = FALSE;
- int indx_ptr = FALSE;
+ bool pointer = false;
+ bool base_ptr = false;
+ bool indx_ptr = false;
/* Decompose address into base + index + displacement. */
else
{
- return FALSE;
+ return false;
}
}
else if (!indx)
indx = gen_rtx_REG (Pmode, BASE_REGNUM);
else
- return FALSE;
+ return false;
/* Mark up the displacement. */
disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
gen_rtvec (1, XVECEXP (base, 0, 0)),
UNSPEC_LTREL_OFFSET);
else
- return FALSE;
+ return false;
base = gen_rtx_REG (Pmode, BASE_REGNUM);
break;
break;
default:
- return FALSE;
+ return false;
}
if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
- return FALSE;
+ return false;
if (REGNO (base) == BASE_REGNUM
|| REGNO (base) == STACK_POINTER_REGNUM
|| REGNO (base) == ARG_POINTER_REGNUM
|| (flag_pic
&& REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
- pointer = base_ptr = TRUE;
+ pointer = base_ptr = true;
}
/* Validate index register. */
gen_rtvec (1, XVECEXP (indx, 0, 0)),
UNSPEC_LTREL_OFFSET);
else
- return FALSE;
+ return false;
indx = gen_rtx_REG (Pmode, BASE_REGNUM);
break;
break;
default:
- return FALSE;
+ return false;
}
if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
- return FALSE;
+ return false;
if (REGNO (indx) == BASE_REGNUM
|| REGNO (indx) == STACK_POINTER_REGNUM
|| REGNO (indx) == ARG_POINTER_REGNUM
|| (flag_pic
&& REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
- pointer = indx_ptr = TRUE;
+ pointer = indx_ptr = true;
}
/* Prefer to use pointer as base, not index. */
&& base != return_address_pointer_rtx
&& indx != return_address_pointer_rtx)
if (!DISP_IN_RANGE (offset))
- return FALSE;
+ return false;
}
else
{
/* All the special cases are pointers. */
- pointer = TRUE;
+ pointer = true;
/* In the small-PIC case, the linker converts @GOT
and @GOTNTPOFF offsets to possible displacements. */
exceed the size of the constant pool entry. */
rtx sym = XVECEXP (disp, 0, 0);
if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
- return FALSE;
+ return false;
orig_disp = plus_constant (orig_disp, offset);
}
}
else
- return FALSE;
+ return false;
}
if (!base && !indx)
- pointer = TRUE;
+ pointer = true;
if (out)
{
out->pointer = pointer;
}
- return TRUE;
+ return true;
}
/* Return true if CODE is a valid address without index. */
return true;
}
-/* Return true if OP is a valid operand for a C constraint. */
+/* Return 1 if OP is a valid operand for a C constraint, 0 else. */
int
s390_extra_constraint_str (rtx op, int c, const char * str)
/* Return true if OP contains a symbol reference */
-int
+bool
symbolic_reference_mentioned_p (rtx op)
{
register const char *fmt;
/* Return true if OP contains a reference to a thread-local symbol. */
-int
+bool
tls_symbolic_reference_mentioned_p (rtx op)
{
register const char *fmt;
for (j = XVECLEN (op, i) - 1; j >= 0; j--)
if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
- return 1;
+ return true;
}
else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
- return 1;
+ return true;
}
- return 0;
+ return false;
}
a constant that would need to be forced to the literal pool
before it can be used as operand. */
-int
+bool
legitimate_reload_constant_p (register rtx op)
{
/* Accept la(y) operands. */
if (GET_CODE (op) == CONST_INT
&& DISP_IN_RANGE (INTVAL (op)))
- return 1;
+ return true;
/* Accept l(g)hi operands. */
if (GET_CODE (op) == CONST_INT
&& CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
- return 1;
+ return true;
/* Accept lliXX operands. */
if (TARGET_ZARCH
&& s390_single_part (op, DImode, HImode, 0) >= 0)
- return 1;
+ return true;
/* Accept larl operands. */
if (TARGET_CPU_ZARCH
&& larl_operand (op, VOIDmode))
- return 1;
+ return true;
/* Everything else cannot be handled without reload. */
- return 0;
+ return false;
}
/* Given an rtx OP being reloaded into a reg required to be in class CLASS,
}
-/* Return nonzero if ADDR is a valid memory address.
+/* Return true if ADDR is a valid memory address.
STRICT specifies whether strict register checking applies. */
-int
+bool
legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
register rtx addr, int strict)
{
struct s390_address ad;
if (!s390_decompose_address (addr, &ad))
- return FALSE;
+ return false;
if (strict)
{
if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
- return FALSE;
+ return false;
if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
- return FALSE;
+ return false;
}
else
{
if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
- return FALSE;
+ return false;
if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
- return FALSE;
+ return false;
}
- return TRUE;
+ return true;
}
-/* Return 1 if OP is a valid operand for the LA instruction.
+/* Return true if OP is a valid operand for the LA instruction.
In 31-bit, we need to prove that the result is used as an
address, as LA performs only a 31-bit addition. */
-int
+bool
legitimate_la_operand_p (register rtx op)
{
struct s390_address addr;
if (!s390_decompose_address (op, &addr))
- return FALSE;
-
- if (TARGET_64BIT || addr.pointer)
- return TRUE;
+ return false;
- return FALSE;
+ return (TARGET_64BIT || addr.pointer);
}
-/* Return 1 if it is valid *and* preferable to use LA to
+/* Return true if it is valid *and* preferable to use LA to
compute the sum of OP1 and OP2. */
-int
+bool
preferred_la_operand_p (rtx op1, rtx op2)
{
struct s390_address addr;
op1 = gen_rtx_PLUS (Pmode, op1, op2);
if (!s390_decompose_address (op1, &addr))
- return FALSE;
+ return false;
if (addr.base && !REG_OK_FOR_BASE_STRICT_P (addr.base))
- return FALSE;
+ return false;
if (addr.indx && !REG_OK_FOR_INDEX_STRICT_P (addr.indx))
- return FALSE;
+ return false;
if (!TARGET_64BIT && !addr.pointer)
- return FALSE;
+ return false;
if (addr.pointer)
- return TRUE;
+ return true;
if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
|| (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
- return TRUE;
+ return true;
- return FALSE;
+ return false;
}
/* Emit a forced load-address operation to load SRC into DST.
/* Returns true if register REGNO is used for forming
a memory address in expression X. */
-static int
+static bool
reg_used_in_mem_p (int regno, rtx x)
{
enum rtx_code code = GET_CODE (x);
{
if (refers_to_regno_p (regno, regno+1,
XEXP (x, 0), 0))
- return 1;
+ return true;
}
else if (code == SET
&& GET_CODE (SET_DEST (x)) == PC)
{
if (refers_to_regno_p (regno, regno+1,
SET_SRC (x), 0))
- return 1;
+ return true;
}
fmt = GET_RTX_FORMAT (code);
{
if (fmt[i] == 'e'
&& reg_used_in_mem_p (regno, XEXP (x, i)))
- return 1;
+ return true;
else if (fmt[i] == 'E')
for (j = 0; j < XVECLEN (x, i); j++)
if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
- return 1;
+ return true;
}
- return 0;
+ return false;
}
/* Returns true if expression DEP_RTX sets an address register
used by instruction INSN to address memory. */
-static int
+static bool
addr_generation_dependency_p (rtx dep_rtx, rtx insn)
{
rtx target, pat;
return reg_used_in_mem_p (regno, PATTERN (insn));
}
}
- return 0;
+ return false;
}
/* Return 1, if dep_insn sets register used in insn in the agen unit. */
(compare (and:QI (match_operand:QI 0 "memory_operand" "Q,S")
(match_operand:QI 1 "immediate_operand" "n,n"))
(match_operand:QI 2 "immediate_operand" "n,n")))]
- "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))"
+ "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], false))"
"@
tm\t%S0,%b1
tmy\t%S0,%b1"
"N0HD0,N1HD0,N2HD0,N3HD0"))
(match_operand:DI 2 "immediate_operand" "n,n,n,n")))]
"TARGET_64BIT
- && s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
+ && s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], true))
&& s390_single_part (operands[1], DImode, HImode, 0) >= 0"
"@
tmhh\t%0,%i1
(compare (and:SI (match_operand:SI 0 "nonimmediate_operand" "d,d")
(match_operand:SI 1 "immediate_operand" "N0HS0,N1HS0"))
(match_operand:SI 2 "immediate_operand" "n,n")))]
- "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1))
+ "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], true))
&& s390_single_part (operands[1], SImode, HImode, 0) >= 0"
"@
tmh\t%0,%i1
[(set (reg CC_REGNUM)
(compare (match_operand:HQI 0 "register_operand" "d")
(match_operand:HQI 1 "immediate_operand" "n")))]
- "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
+ "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], true))"
"tml\t%0,<max_uint>"
[(set_attr "op_type" "RI")])