drm/i915: Nuke some bogus tabs from the pcode defines

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170912153411.20171-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0b03260..f9f9fcc 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7954,8 +7954,8 @@ enum {
 #define     GEN7_PCODE_TIMEOUT                 0x2
 #define     GEN7_PCODE_ILLEGAL_DATA            0x3
 #define     GEN7_PCODE_MIN_FREQ_TABLE_GT_RATIO_OUT_OF_RANGE 0x10
-#define          GEN6_PCODE_WRITE_RC6VIDS              0x4
-#define          GEN6_PCODE_READ_RC6VIDS               0x5
+#define   GEN6_PCODE_WRITE_RC6VIDS             0x4
+#define   GEN6_PCODE_READ_RC6VIDS              0x5
 #define     GEN6_ENCODE_RC6_VID(mv)            (((mv) - 245) / 5)
 #define     GEN6_DECODE_RC6_VID(vids)          (((vids) * 5) + 245)
 #define   BDW_PCODE_DISPLAY_FREQ_CHANGE_REQ    0x18
@@ -7974,7 +7974,7 @@ enum {
 #define   GEN6_PCODE_WRITE_D_COMP              0x11
 #define   HSW_PCODE_DE_WRITE_FREQ_REQ          0x17
 #define   DISPLAY_IPS_CONTROL                  0x19
-#define          HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL  0x1A
+#define   HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL 0x1A
 #define   GEN9_PCODE_SAGV_CONTROL              0x21
 #define     GEN9_SAGV_DISABLE                  0x0
 #define     GEN9_SAGV_IS_DISABLED              0x1