More test cases.

diff --git a/sim/testsuite/mips64r5900-elf/.Sanitize b/sim/testsuite/mips64r5900-elf/.Sanitize
index 7f83da8..7ce49da 100644 (file)
--- a/sim/testsuite/mips64r5900-elf/.Sanitize
+++ b/sim/testsuite/mips64r5900-elf/.Sanitize
@@ -28,10 +28,34 @@ Makefile.in
 configure
 configure.in
 exit47.s
+f-abs.s
+f-add.s
+f-adda.s
+f-cond.s
+f-cvt.s
+f-div.s
+f-madd.s
+f-madda.s
+f-max.s
+f-min.s
+f-msub.s
+f-msuba.s
+f-mul.s
+f-mula.s
+f-neg.s
+f-rsqrt.s
+f-sqrt.s
+f-sub.s
+f-suba.s
 hello.s
 loop.s
+t-dadd.s
+t-ddiv.s
+t-div.s
+t-div1.s
+t-divu.s
+t-divu1.s
 t-macros.i
-
 t-mtsa.s
 t-pabsh.s
 t-pabsw.s
@@ -88,8 +112,9 @@ t-psubuh.s
 t-psubuw.s
 t-psubw.s
 t-qfsrv.s
-
+t-sdl.s
 tick.s
+trap.s
 
 Things-to-lose:
 

diff --git a/sim/testsuite/mips64r5900-elf/t-dadd.s b/sim/testsuite/mips64r5900-elf/t-dadd.s
new file mode 100644 (file)
index 0000000..7f1c410
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/t-dadd.s
@@ -0,0 +1,20 @@
+.include "t-macros.i"
+
+       start
+
+       # don't overflow
+
+test_dadd:
+
+       load $7 0xdeadbeefdeadbeef 0x7fffffffffffffff
+       load $8 0xdeadbeefdeadbeef 0xffffffffffffffff
+        dadd $10, $7, $8
+        check10 0x0000000000000000 0x7ffffffffffffffe
+
+test_dadd_1:
+       load $7 0xdeadbeefdeadbeef 0x8000000000000000
+       load $8 0xdeadbeefdeadbeef 0x7fffffffffffffff
+        dadd $10, $7, $8
+        check10 0x0000000000000000 0xffffffffffffffff
+
+       exit0

diff --git a/sim/testsuite/mips64r5900-elf/t-ddiv.s b/sim/testsuite/mips64r5900-elf/t-ddiv.s
new file mode 100644 (file)
index 0000000..e4b327b
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/t-ddiv.s
@@ -0,0 +1,23 @@
+.include "t-macros.i"
+
+       start
+
+test_div:
+
+       load $7 0xdeadbeefdeadbeef 0x8000000000000000
+       load $8 0xdeadbeefdeadbeef 0xffffffffffffffff
+       # NB:    That $0 is needed!
+        ddiv $0, $7, $8
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0x0000000000000000 0x8000000000000000
+
+test_div_0:
+       load $7 0xdeadbeefdeadbeef 0x8000000000000000
+       load $8 0xdeadbeefdeadbeef 0x0000000000000000
+       # NB:    That $0 is needed!
+        ddiv $0, $7, $8
+       # don't crash!
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0x0000000000000000 0x8000000000000000
+       
+       exit0

diff --git a/sim/testsuite/mips64r5900-elf/t-div.s b/sim/testsuite/mips64r5900-elf/t-div.s
new file mode 100644 (file)
index 0000000..0cb3e7c
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/t-div.s
@@ -0,0 +1,22 @@
+.include "t-macros.i"
+
+       start
+
+test_div:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff
+       # NB:    That $0 is needed!
+        div $0, $7,$8
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0x0000000000000000 0xffffffff80000000
+
+test_div_0:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000
+       # NB:    That $0 is needed!
+        div $0, $7,$8
+       # don't crash!
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0x0000000000000000 0xffffffff80000000
+       
+       exit0

diff --git a/sim/testsuite/mips64r5900-elf/t-div1.s b/sim/testsuite/mips64r5900-elf/t-div1.s
new file mode 100644 (file)
index 0000000..325b8b5
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/t-div1.s
@@ -0,0 +1,20 @@
+.include "t-macros.i"
+
+       start
+
+test_div:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff
+        div1 $7,$8
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0xffffffff80000000 0x0000000000000000
+
+test_div_0:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000
+        div1 $7,$8
+       # don't crash!
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0xffffffff80000000 0x0000000000000000
+       
+       exit0

diff --git a/sim/testsuite/mips64r5900-elf/t-divu.s b/sim/testsuite/mips64r5900-elf/t-divu.s
new file mode 100644 (file)
index 0000000..dbcc5e4
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/t-divu.s
@@ -0,0 +1,20 @@
+.include "t-macros.i"
+
+       start
+
+test_div:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff
+        divu $0, $7,$8
+        checkHI 0x0000000000000000 0xffffffff80000000
+        checkLO 0x0000000000000000 0x0000000000000000
+
+test_div_0:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000
+        divu $0, $7,$8
+       # don't crash!
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0x0000000000000000 0xffffffff80000000
+       
+       exit0

diff --git a/sim/testsuite/mips64r5900-elf/t-divu1.s b/sim/testsuite/mips64r5900-elf/t-divu1.s
new file mode 100644 (file)
index 0000000..fcdd62b
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/t-divu1.s
@@ -0,0 +1,20 @@
+.include "t-macros.i"
+
+       start
+
+test_div:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff
+        divu1 $7,$8
+        checkHI 0xffffffff80000000 0x0000000000000000
+        checkLO 0x0000000000000000 0x0000000000000000
+
+test_div_0:
+       load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000
+       load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000
+        divu1 $7,$8
+       # don't crash!
+        checkHI 0x0000000000000000 0x0000000000000000
+        checkLO 0xffffffff80000000 0x0000000000000000
+       
+       exit0

diff --git a/sim/testsuite/mips64r5900-elf/trap.s b/sim/testsuite/mips64r5900-elf/trap.s
new file mode 100644 (file)
index 0000000..14e8dbc
--- /dev/null
+++ b/sim/testsuite/mips64r5900-elf/trap.s
@@ -0,0 +1,63 @@
+       .include "t-macros.i"
+
+       start
+       
+        mtc0    $0,$12
+        mtc0    $0,$11
+        mtc0    $0,$13
+
+       # install our jump table
+       la      $24, jump_table
+       li      $25, 0x80000180
+       li      $26, 0xbfc00380
+       lw      $27, 0($24)
+       sw      $27, 0($25)
+       sw      $27, 0($26)
+       lw      $27, 4($24)
+       sw      $27, 4($25)
+       sw      $27, 4($26)
+       lw      $27, 8($24)
+       sw      $27, 8($25)
+       sw      $27, 8($26)
+
+        la      $25, LocalHandler
+        la      $27, address_trap
+        la      $31, address_return
+        li      $2, 1
+        li      $3, 1
+address_trap:
+        tge     $2, $3
+        b       fail
+
+address_return:
+       exit0
+
+fail:
+       exit47
+
+jump_table:
+       .align 7
+       la      $24, LocalHandler
+       jr      $24
+
+
+        .align 7
+LocalHandler:
+
+        mfc0    $25,$12
+        andi    $7,$25,0x002        # check that exl bit was set
+        beq     $7,$0,fail
+
+        mfc0    $25,$14
+        bne     $27,$25,fail        # compare with the exception program counter
+        mfc0    $25,$13
+        andi    $25,$25,0x000000ff  # extract excpt code, not checking int*[5:0]
+        li      $8,(( 13 )<<2)              # expected value of cause register
+        bne     $25,$8,fail
+        mtc0    $31,$14           # return address from handler
+        nop
+        nop
+        nop
+        nop
+        eret
+        nop