arm64: dts: qcom: stop using snps,dw-pcie falback
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 6 May 2022 15:21:04 +0000 (18:21 +0300)
committerBjorn Andersson <andersson@kernel.org>
Mon, 29 Aug 2022 20:14:16 +0000 (15:14 -0500)
Qualcomm PCIe devices are not really compatible with the snps,dw-pcie.
Unlike the generic IP core, they have special requirements regarding
enabling clocks, toggling resets, using the PHY, etc.

This is not to mention that platform snps-dw-pcie driver expects to find
two IRQs declared, while Qualcomm platforms use just one.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220506152107.1527552-6-dmitry.baryshkov@linaro.org
arch/arm64/boot/dts/qcom/qcs404.dtsi
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 9ab9900615223f381774c7dc519c13623eba8327..1881d810a429592bcfa8bab6b375f4dbd80add17 100644 (file)
                };
 
                pcie: pci@10000000 {
-                       compatible = "qcom,pcie-qcs404", "snps,dw-pcie";
+                       compatible = "qcom,pcie-qcs404";
                        reg =  <0x10000000 0xf1d>,
                               <0x10000f20 0xa8>,
                               <0x07780000 0x2000>,
index bc773e210023cba0ea1ce5f4aa426de1de60eec6..8124f38863e2d520b122dc9055bc9b5454ad1abe 100644 (file)
                };
 
                pcie0: pci@1c00000 {
-                       compatible = "qcom,pcie-sm8250", "snps,dw-pcie";
+                       compatible = "qcom,pcie-sm8250";
                        reg = <0 0x01c00000 0 0x3000>,
                              <0 0x60000000 0 0xf1d>,
                              <0 0x60000f20 0 0xa8>,
                };
 
                pcie1: pci@1c08000 {
-                       compatible = "qcom,pcie-sm8250", "snps,dw-pcie";
+                       compatible = "qcom,pcie-sm8250";
                        reg = <0 0x01c08000 0 0x3000>,
                              <0 0x40000000 0 0xf1d>,
                              <0 0x40000f20 0 0xa8>,
                };
 
                pcie2: pci@1c10000 {
-                       compatible = "qcom,pcie-sm8250", "snps,dw-pcie";
+                       compatible = "qcom,pcie-sm8250";
                        reg = <0 0x01c10000 0 0x3000>,
                              <0 0x64000000 0 0xf1d>,
                              <0 0x64000f20 0 0xa8>,