drm/kmb: Work around for higher system clock
authorAnitha Chrisanthus <anitha.chrisanthus@intel.com>
Tue, 15 Dec 2020 19:13:09 +0000 (11:13 -0800)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Thu, 21 Oct 2021 09:08:08 +0000 (11:08 +0200)
Use a different value for system clock offset in the
ppl/llp ratio calculations for clocks higher than 500 Mhz.

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-1-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/kmb/kmb_dsi.c

index 1793cd3..86e8e79 100644 (file)
@@ -482,6 +482,10 @@ static u32 mipi_tx_fg_section_cfg(struct kmb_dsi *kmb_dsi,
        return 0;
 }
 
+#define CLK_DIFF_LOW 50
+#define CLK_DIFF_HI 60
+#define SYSCLK_500  500
+
 static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,
                                struct mipi_tx_frame_timing_cfg *fg_cfg)
 {
@@ -492,7 +496,12 @@ static void mipi_tx_fg_cfg_regs(struct kmb_dsi *kmb_dsi, u8 frame_gen,
        /* 500 Mhz system clock minus 50 to account for the difference in
         * MIPI clock speed in RTL tests
         */
-       sysclk = kmb_dsi->sys_clk_mhz - 50;
+       if (kmb_dsi->sys_clk_mhz == SYSCLK_500) {
+               sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_LOW;
+       } else {
+               /* 700 Mhz clk*/
+               sysclk = kmb_dsi->sys_clk_mhz - CLK_DIFF_HI;
+       }
 
        /* PPL-Pixel Packing Layer, LLP-Low Level Protocol
         * Frame genartor timing parameters are clocked on the system clock,