Do not use subword paradoxical subregs in emit_group_store

The goal of the trick is to make life easier for the combiner, but subword
paradoxical subregs make it harder for the register allocator instead.

gcc/
	* expr.cc (emit_group_store): Do not use subword paradoxical subregs

diff --git a/gcc/expr.cc b/gcc/expr.cc
index 9145193..c6917fb 100644 (file)
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -2901,19 +2901,19 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED,
       if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
        dst = gen_reg_rtx (outer);
 
-      /* Make life a bit easier for combine.  */
-      /* If the first element of the vector is the low part
-        of the destination mode, use a paradoxical subreg to
-        initialize the destination.  */
+      /* Make life a bit easier for combine: if the first element of the
+        vector is the word (or larger) low part of the destination mode,
+        use a paradoxical subreg to initialize the destination.  */
       if (start < finish)
        {
          inner = GET_MODE (tmps[start]);
          bytepos = subreg_lowpart_offset (inner, outer);
-         if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)),
-                       bytepos))
+         if (known_ge (GET_MODE_BITSIZE (inner), BITS_PER_WORD)
+             && known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0,
+                                                            start), 1)),
+                          bytepos))
            {
-             temp = simplify_gen_subreg (outer, tmps[start],
-                                         inner, 0);
+             temp = simplify_gen_subreg (outer, tmps[start], inner, 0);
              if (temp)
                {
                  emit_move_insn (dst, temp);
@@ -2929,12 +2929,12 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED,
        {
          inner = GET_MODE (tmps[finish - 1]);
          bytepos = subreg_lowpart_offset (inner, outer);
-         if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0,
-                                                         finish - 1), 1)),
-                       bytepos))
+         if (known_ge (GET_MODE_BITSIZE (inner), BITS_PER_WORD)
+             && known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0,
+                                                            finish - 1), 1)),
+                          bytepos))
            {
-             temp = simplify_gen_subreg (outer, tmps[finish - 1],
-                                         inner, 0);
+             temp = simplify_gen_subreg (outer, tmps[finish - 1], inner, 0);
              if (temp)
                {
                  emit_move_insn (dst, temp);