Further generalize this scheduler test.

The order of copies depends on queue order, which is not very stable.

llvm-svn: 179456

diff --git a/llvm/test/CodeGen/X86/misched-copy.ll b/llvm/test/CodeGen/X86/misched-copy.ll
index b281efc..8de2d2d 100644 (file)
--- a/llvm/test/CodeGen/X86/misched-copy.ll
+++ b/llvm/test/CodeGen/X86/misched-copy.ll
@@ -11,8 +11,8 @@
 ; CHECK:      *** Final schedule for BB#1 ***
 ; CHECK-NEXT: %EAX<def> = COPY
 ; CHECK:      MUL32r %vreg{{[0-9]+}}, %EAX<imp-def>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use>;
-; CHECK-NEXT: COPY %EAX;
-; CHECK-NEXT: COPY %EDX;
+; CHECK-NEXT: COPY %E{{[AD]}}X;
+; CHECK-NEXT: COPY %E{{[AD]}}X;
 ; CHECK:      DIVSSrm
 define i64 @mulhoist(i32 %a, i32 %b) #0 {
 entry: