arm64: dts: rockchip: add rk356x gpio debounce clocks

The rk356x added a debounce clock to the gpio devices. This clock is
necessary for the new v2 gpio driver to bind.
Add the clocks to the rk356x device tree.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-4-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 13b185e..499a0c7 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -804,7 +804,7 @@
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xfdd60000 0x0 0x100>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&pmucru PCLK_GPIO0>;
+                       clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -815,7 +815,7 @@
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xfe740000 0x0 0x100>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cru PCLK_GPIO1>;
+                       clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -826,7 +826,7 @@
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xfe750000 0x0 0x100>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cru PCLK_GPIO2>;
+                       clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -837,7 +837,7 @@
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xfe760000 0x0 0x100>;
                        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cru PCLK_GPIO3>;
+                       clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;
@@ -848,7 +848,7 @@
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xfe770000 0x0 0x100>;
                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cru PCLK_GPIO4>;
+                       clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
                        gpio-controller;
                        #gpio-cells = <2>;
                        interrupt-controller;