drm/vc4: hdmi: Take the sink maximum TMDS clock into account

In the function that validates that the clock isn't too high, we've only
taken our controller limitations into account so far.

However, the sink can have a limit on the maximum TMDS clock it can deal
with too which is exposed through the EDID and the drm_display_info.

Make sure we check it.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index 8456351..a5cada0 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -1253,12 +1253,18 @@ static enum drm_mode_status
 vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
                             unsigned long long clock)
 {
+       const struct drm_connector *connector = &vc4_hdmi->connector;
+       const struct drm_display_info *info = &connector->display_info;
+
        if (clock > vc4_hdmi->variant->max_pixel_clock)
                return MODE_CLOCK_HIGH;
 
        if (vc4_hdmi->disable_4kp60 && clock > HDMI_14_MAX_TMDS_CLK)
                return MODE_CLOCK_HIGH;
 
+       if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
+               return MODE_CLOCK_HIGH;
+
        return MODE_OK;
 }