re PR target/52883 (ICE in simplify_const_unary_operation, at simplify-rtx.c:1464)

	PR target/52883
	* config/i386/predicates.md (x86_64_zext_general_operand): Prevent
	VOIDmode immediate operands.
	* config/i386/constraints.md (Wz): New constraint.
	* config/i386/i386.md (*zero_extendsidi2_rex64): Use Wz instead of Z.

testsuite/ChangeLog:

	PR target/52883
	* gcc.target/i386/pr52883.c: New testcase.

From-SVN: r186243

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ee71f75..a3dd551 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2012-04-09  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/52883
+       * config/i386/predicates.md (x86_64_zext_general_operand): Prevent
+       VOIDmode immediate operands.
+       * config/i386/constraints.md (Wz): New constraint.
+       * config/i386/i386.md (*zero_extendsidi2_rex64): Use Wz instead of Z.
+
 2012-04-09  Eric Botcazou  <ebotcazou@adacore.com>
 
        PR target/52717
@@ -88,7 +96,7 @@
        sh_cfun_attr_renesas_p, sh_cfun_interrupt_handler_p,
        sh_cfun_resbank_handler_p, system_reg_operand, fp_zero_operand,
        fp_one_operand, fldi_ok, reg_unused_after, sh_can_redirect_branch,
-       sh_hard_regno_rename_ok, check_use_sfunc_addr, sh_contains_memref_p, 
+       sh_hard_regno_rename_ok, check_use_sfunc_addr, sh_contains_memref_p,
        sh_loads_bankedreg_p): Use bool as return type.
        (nonpic_symbol_mentioned_p): Use bool as return type.  Remove
        'register' modifier.

diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 9537d93..fda1a04 100644 (file)
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -18,7 +18,7 @@
 ;; <http://www.gnu.org/licenses/>.
 
 ;;; Unused letters:
-;;;     B     H           T  W
+;;;     B     H           T
 ;;;           h  k          v
 
 ;; Integer register constraints.
@@ -199,6 +199,16 @@
    instructions)."
   (match_operand 0 "x86_64_immediate_operand"))
 
+;; We use W prefix to denote any number of
+;; constant-or-symbol-reference constraints
+
+(define_constraint "Wz"
+  "32-bit unsigned integer constant, or a symbolic reference known
+   to fit that range (for zero-extending conversion operations that
+   require non-VOIDmode immediate operands)."
+  (and (match_operand 0 "x86_64_zext_immediate_operand")
+       (match_test "GET_MODE (op) != VOIDmode")))
+
 (define_constraint "Z"
   "32-bit unsigned integer constant, or a symbolic reference known
    to fit that range (for immediate operands in zero-extending x86-64

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index dd1f9be..27ed5f6 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3393,10 +3393,10 @@
 
 (define_insn "*zero_extendsidi2_rex64"
   [(set (match_operand:DI 0 "nonimmediate_operand"
-                       "=r ,o,?*Ym,?*y,?*Yi,!*x")
+                       "=r  ,o,?*Ym,?*y,?*Yi,!*x")
        (zero_extend:DI
         (match_operand:SI 1 "x86_64_zext_general_operand"
-                       "rmZ,0,r   ,m  ,r   ,m*x")))]
+                       "rmWz,0,r   ,m  ,r   ,m*x")))]
   "TARGET_64BIT"
   "@
    mov{l}\t{%1, %k0|%k0, %1}

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 4c76648..92db809 100644 (file)
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -341,11 +341,13 @@
     (match_operand 0 "general_operand")))
 
 ;; Return true if OP is general operand representable on x86_64
-;; as zero extended constant.
+;; as zero extended constant.  This predicate is used in zero-extending
+;; conversion operations that require non-VOIDmode immediate operands.
 (define_predicate "x86_64_zext_general_operand"
   (if_then_else (match_test "TARGET_64BIT")
     (ior (match_operand 0 "nonimmediate_operand")
-        (match_operand 0 "x86_64_zext_immediate_operand"))
+        (and (match_operand 0 "x86_64_zext_immediate_operand")
+             (match_test "GET_MODE (op) != VOIDmode")))
     (match_operand 0 "general_operand")))
 
 ;; Return true if OP is general operand representable on x86_64

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0cdf06f..dd3df5b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-04-09  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/52883
+       * gcc.target/i386/pr52883.c: New testcase.
+
 2012-04-09  Eric Botcazou  <ebotcazou@adacore.com>
 
        * lib/target-supports.exp (check_effective_target_sparc_v9): New.

diff --git a/gcc/testsuite/gcc.target/i386/pr52883.c b/gcc/testsuite/gcc.target/i386/pr52883.c
new file mode 100644 (file)
index 0000000..766e87e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr52883.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+int a, b, d, e, f, i, j, k, l, m;
+unsigned c;
+int g[] = { }, h[0];
+
+int
+fn1 () {
+  return 0;
+}
+
+void
+fn2 () {
+  c = 0;
+  e = 0;
+  for (;; e = 0)
+    if (f > j) {
+      k = fn1 ();
+      l = (d || k) * b;
+      m = l * a;
+      h[0] = m <= i;
+    } else
+      i = g[c];
+}