x86/apic: Mark single target interrupts
authorThomas Gleixner <tglx@linutronix.de>
Mon, 19 Jun 2017 23:37:54 +0000 (01:37 +0200)
committerThomas Gleixner <tglx@linutronix.de>
Thu, 22 Jun 2017 16:21:26 +0000 (18:21 +0200)
If the interrupt destination mode of the APIC is physical then the
effective affinity is restricted to a single CPU.

Mark the interrupt accordingly in the domain allocation code, so the core
code can avoid pointless affinity setting attempts.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Keith Busch <keith.busch@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Christoph Hellwig <hch@lst.de>
Link: http://lkml.kernel.org/r/20170619235447.508846202@linutronix.de
arch/x86/kernel/apic/vector.c

index b270a76..2567dc0 100644 (file)
@@ -371,6 +371,13 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,
                                               irq_data);
                if (err)
                        goto error;
+               /*
+                * If the apic destination mode is physical, then the
+                * effective affinity is restricted to a single target
+                * CPU. Mark the interrupt accordingly.
+                */
+               if (!apic->irq_dest_mode)
+                       irqd_set_single_target(irq_data);
        }
 
        return 0;