So that people without large BAR can try this out.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9318>
disable optimizations that get enabled when all VRAM is CPU visible.
``pswave32``
enable wave32 for pixel shaders (GFX10+)
+ ``sam``
+ enable optimizations to move more driver internal objects to VRAM.
``tccompatcmask``
enable TC-compat cmask for MSAA images
enum radeon_bo_domain
radv_cmdbuffer_domain(const struct radeon_info *info, uint32_t perftest)
{
- return (info->all_vram_visible &&
- info->has_dedicated_vram &&
- !(perftest & RADV_PERFTEST_NO_SAM)) ?
- RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT;
+ bool use_sam = (info->all_vram_visible && info->has_dedicated_vram &&
+ !(perftest & RADV_PERFTEST_NO_SAM)) ||
+ (perftest & RADV_PERFTEST_SAM);
+ return use_sam ? RADEON_DOMAIN_VRAM : RADEON_DOMAIN_GTT;
}
static bool
RADV_PERFTEST_GE_WAVE_32 = 1u << 6,
RADV_PERFTEST_DFSM = 1u << 7,
RADV_PERFTEST_NO_SAM = 1u << 8,
+ RADV_PERFTEST_SAM = 1u << 9,
};
bool
{"gewave32", RADV_PERFTEST_GE_WAVE_32},
{"dfsm", RADV_PERFTEST_DFSM},
{"nosam", RADV_PERFTEST_NO_SAM},
+ {"sam", RADV_PERFTEST_SAM},
{NULL, 0}
};