[InstCombine] add/adjust tests for flooring div; NFC

diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 3f40ad3..7002009 100644 (file)
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -2477,6 +2477,23 @@ define i32 @floor_sdiv(i32 %x) {
   ret i32 %r
 }
 
+define <2 x i32> @floor_sdiv_vec_commute(<2 x i32> %x) {
+; CHECK-LABEL: @floor_sdiv_vec_commute(
+; CHECK-NEXT:    [[D:%.*]] = sdiv <2 x i32> [[X:%.*]], <i32 4, i32 4>
+; CHECK-NEXT:    [[A:%.*]] = and <2 x i32> [[X]], <i32 -2147483645, i32 -2147483645>
+; CHECK-NEXT:    [[I:%.*]] = icmp ugt <2 x i32> [[A]], <i32 -2147483648, i32 -2147483648>
+; CHECK-NEXT:    [[S:%.*]] = sext <2 x i1> [[I]] to <2 x i32>
+; CHECK-NEXT:    [[R:%.*]] = add nsw <2 x i32> [[D]], [[S]]
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %d = sdiv <2 x i32> %x, <i32 4, i32 4>
+  %a = and <2 x i32> %x, <i32 -2147483645, i32 -2147483645>
+  %i = icmp ugt <2 x i32> %a, <i32 -2147483648, i32 -2147483648>
+  %s = sext <2 x i1> %i to <2 x i32>
+  %r = add <2 x i32> %s, %d
+  ret <2 x i32> %r
+}
+
 define i8 @floor_sdiv_uses(i8 %x) {
 ; CHECK-LABEL: @floor_sdiv_uses(
 ; CHECK-NEXT:    [[D:%.*]] = sdiv i8 [[X:%.*]], 16
@@ -2520,10 +2537,14 @@ define i32 @floor_sdiv_wrong_div(i32 %x) {
 define i32 @floor_sdiv_wrong_mask(i32 %x) {
 ; CHECK-LABEL: @floor_sdiv_wrong_mask(
 ; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 4
-; CHECK-NEXT:    ret i32 [[D]]
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[X]], -2147483644
+; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[A]], -2147483648
+; CHECK-NEXT:    [[S:%.*]] = sext i1 [[I]] to i32
+; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[D]], [[S]]
+; CHECK-NEXT:    ret i32 [[R]]
 ;
   %d = sdiv i32 %x, 4
-  %a = and i32 %x, 3
+  %a = and i32 %x, -2147483644
   %i = icmp ugt i32 %a, -2147483648
   %s = sext i1 %i to i32
   %r = add i32 %d, %s
@@ -2532,15 +2553,16 @@ define i32 @floor_sdiv_wrong_mask(i32 %x) {
 
 define i32 @floor_sdiv_wrong_cmp(i32 %x) {
 ; CHECK-LABEL: @floor_sdiv_wrong_cmp(
-; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 8
-; CHECK-NEXT:    [[X_LOBIT:%.*]] = ashr i32 [[X]], 31
-; CHECK-NEXT:    [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], -1
-; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[D]], [[X_LOBIT_NOT]]
+; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 4
+; CHECK-NEXT:    [[A:%.*]] = and i32 [[X]], -2147483646
+; CHECK-NEXT:    [[I:%.*]] = icmp eq i32 [[A]], -2147483646
+; CHECK-NEXT:    [[S:%.*]] = sext i1 [[I]] to i32
+; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[D]], [[S]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %d = sdiv i32 %x, 8
+  %d = sdiv i32 %x, 4
   %a = and i32 %x, -2147483645
-  %i = icmp ult i32 %a, -2147483648
+  %i = icmp ugt i32 %a, -2147483647
   %s = sext i1 %i to i32
   %r = add i32 %d, %s
   ret i32 %r
@@ -2548,14 +2570,14 @@ define i32 @floor_sdiv_wrong_cmp(i32 %x) {
 
 define i32 @floor_sdiv_wrong_ext(i32 %x) {
 ; CHECK-LABEL: @floor_sdiv_wrong_ext(
-; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 8
+; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 4
 ; CHECK-NEXT:    [[A:%.*]] = and i32 [[X]], -2147483645
 ; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[A]], -2147483648
 ; CHECK-NEXT:    [[S:%.*]] = zext i1 [[I]] to i32
 ; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[D]], [[S]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %d = sdiv i32 %x, 8
+  %d = sdiv i32 %x, 4
   %a = and i32 %x, -2147483645
   %i = icmp ugt i32 %a, -2147483648
   %s = zext i1 %i to i32
@@ -2565,14 +2587,14 @@ define i32 @floor_sdiv_wrong_ext(i32 %x) {
 
 define i32 @floor_sdiv_wrong_op(i32 %x, i32 %y) {
 ; CHECK-LABEL: @floor_sdiv_wrong_op(
-; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 8
+; CHECK-NEXT:    [[D:%.*]] = sdiv i32 [[X:%.*]], 4
 ; CHECK-NEXT:    [[A:%.*]] = and i32 [[Y:%.*]], -2147483645
 ; CHECK-NEXT:    [[I:%.*]] = icmp ugt i32 [[A]], -2147483648
 ; CHECK-NEXT:    [[S:%.*]] = zext i1 [[I]] to i32
 ; CHECK-NEXT:    [[R:%.*]] = add nsw i32 [[D]], [[S]]
 ; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %d = sdiv i32 %x, 8
+  %d = sdiv i32 %x, 4
   %a = and i32 %y, -2147483645
   %i = icmp ugt i32 %a, -2147483648
   %s = zext i1 %i to i32