zink: Wire up ARB_post_depth_coverage

Just a matter of passing the bits through in the right place.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9637>

diff --git a/docs/features.txt b/docs/features.txt
index 6117b17..4830127 100644 (file)
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -304,7 +304,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
   GL_ARB_fragment_shader_interlock                      DONE (i965)
   GL_ARB_gpu_shader_int64                               DONE (i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe, zink)
   GL_ARB_parallel_shader_compile                        DONE (all drivers)
-  GL_ARB_post_depth_coverage                            DONE (i965, nvc0, radeonsi, llvmpipe)
+  GL_ARB_post_depth_coverage                            DONE (i965, nvc0, radeonsi, llvmpipe, zink)
   GL_ARB_robustness_isolation                           not started
   GL_ARB_sample_locations                               DONE (nvc0)
   GL_ARB_seamless_cubemap_per_texture                   DONE (etnaviv/SEAMLESS_CUBE_MAP, freedreno, i965, nvc0, r600, radeonsi, softpipe, swr, virgl)

diff --git a/docs/relnotes/new_features.txt b/docs/relnotes/new_features.txt
index c98a110..52b8245 100644 (file)
--- a/docs/relnotes/new_features.txt
+++ b/docs/relnotes/new_features.txt
@@ -5,3 +5,4 @@ Zink exposes GL 4.6 and ES 3.1
 GL_EXT_depth_bounds_test on softpipe, zink
 GL_EXT_texture_filter_minmax on nvc0 (gm200+)
 GL_ARB_texture_filter_minmax on nvc0 (gm200+)
+GL_ARB_post_depth_coverage on zink

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 7543074..444984f 100644 (file)
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -2600,6 +2600,7 @@ emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
       break;
 
    case nir_intrinsic_load_sample_mask_in:
+      spirv_builder_emit_cap(&ctx->builder, SpvCapabilitySampleMaskPostDepthCoverage);
       emit_load_uint_input(ctx, intr, &ctx->sample_mask_in_var, "gl_SampleMaskIn", SpvBuiltInSampleMask);
       break;
 
@@ -3702,6 +3703,9 @@ nir_to_spirv(struct nir_shader *s, const struct zink_so_info *so_info,
       if (s->info.fs.early_fragment_tests)
          spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
                                       SpvExecutionModeEarlyFragmentTests);
+      if (s->info.fs.post_depth_coverage)
+         spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
+                                      SpvExecutionModePostDepthCoverage);
       break;
    case MESA_SHADER_TESS_CTRL:
       spirv_builder_emit_exec_mode_literal(&ctx.builder, entry_point,

diff --git a/src/gallium/drivers/zink/zink_device_info.py b/src/gallium/drivers/zink/zink_device_info.py
index 0875735..95008e5 100644 (file)
--- a/src/gallium/drivers/zink/zink_device_info.py
+++ b/src/gallium/drivers/zink/zink_device_info.py
@@ -66,6 +66,7 @@ EXTENSIONS = [
     Extension("VK_KHR_external_memory_fd"),
     Extension("VK_KHR_vulkan_memory_model"),
     Extension("VK_EXT_shader_viewport_index_layer"),
+    Extension("VK_EXT_post_depth_coverage"),
     Extension("VK_KHR_driver_properties",
         alias="driver",
         properties=True),

diff --git a/src/gallium/drivers/zink/zink_screen.c b/src/gallium/drivers/zink/zink_screen.c
index 5a945f5..0e0eeab 100644 (file)
--- a/src/gallium/drivers/zink/zink_screen.c
+++ b/src/gallium/drivers/zink/zink_screen.c
@@ -502,6 +502,9 @@ zink_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_DEPTH_BOUNDS_TEST:
       return screen->info.feats.features.depthBounds;
 
+   case PIPE_CAP_POST_DEPTH_COVERAGE:
+      return screen->info.have_EXT_post_depth_coverage;
+
    default:
       return u_pipe_screen_get_param_defaults(pscreen, param);
    }