drm/mediatek: add dsi reg commit disable control
authorJitao Shi <jitao.shi@mediatek.com>
Sun, 11 Aug 2019 10:40:04 +0000 (18:40 +0800)
committerCK Hu <ck.hu@mediatek.com>
Mon, 7 Oct 2019 04:29:38 +0000 (12:29 +0800)
New DSI IP has shadow register and working reg. The register
values are writen to shadow register. And then trigger with
commit reg, the register values will be moved working register.

This function is default on. But this driver doesn't use this
function. So add the disable control.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
drivers/gpu/drm/mediatek/mtk_dsi.c

index a7caf75fb97190c53eaeeb5f00650382afad3396..881c0afabf17b5903624e49560466d68ffc8d071 100644 (file)
 #define VM_CMD_EN                      BIT(0)
 #define TS_VFP_EN                      BIT(5)
 
+#define DSI_SHADOW_DEBUG       0x190U
+#define FORCE_COMMIT                   BIT(0)
+#define BYPASS_SHADOW                  BIT(1)
+
 #define CONFIG                         (0xff << 0)
 #define SHORT_PACKET                   0
 #define LONG_PACKET                    2
@@ -151,6 +155,7 @@ struct phy;
 
 struct mtk_dsi_driver_data {
        const u32 reg_cmdq_off;
+       bool has_shadow_ctl;
 };
 
 struct mtk_dsi {
@@ -588,6 +593,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi)
        }
 
        mtk_dsi_enable(dsi);
+
+       if (dsi->driver_data->has_shadow_ctl)
+               writel(FORCE_COMMIT | BYPASS_SHADOW,
+                      dsi->regs + DSI_SHADOW_DEBUG);
+
        mtk_dsi_reset_engine(dsi);
        mtk_dsi_phy_timconfig(dsi);