Merge tag 'omap-for-v6.6/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel...

Fixes for omaps and ti-sysc

Fixes for several ti-sysc interconnect target module driver issues for
external abort on non-linefetch, am35x soc match, and uart module quirks
handling needed for devices to work and to allow device wake-up to work.

Fixes for droid4 boot time errors and warnings as noticed after boot doing
dmesg -lerr,warn. Let's also cut down the debug uart noise by using
overrun-throttle-ms, and downgrade the u-boot version warnings to
debug statements to further reduce the boot time noise with warnings.

* tag 'omap-for-v6.6/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: ti-sysc: Fix SYSC_QUIRK_SWSUP_SIDLE_ACT handling for uart wake-up
  ARM: omap2+: Downgrade u-boot version warnings to debug statements
  ARM: dts: ti: omap: Fix noisy serial with overrun-throttle-ms for mapphone
  ARM: dts: ti: omap: motorola-mapphone: Fix abe_clkctrl warning on boot
  ARM: dts: ti: omap: Fix bandgap thermal cells addressing for omap3/4
  bus: ti-sysc: Fix missing AM35xx SoC matching
  bus: ti-sysc: Use fsleep() instead of usleep_range() in sysc_reset()

Link: https://lore.kernel.org/r/pull-1695715881-95183@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/mm/cache-uniphier.c b/arch/arm/mm/cache-uniphier.c
index ff28814..84a2f17 100644 (file)
--- a/arch/arm/mm/cache-uniphier.c
+++ b/arch/arm/mm/cache-uniphier.c
@@ -58,11 +58,13 @@
                ((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE)
 
 /**
- * uniphier_cache_data - UniPhier outer cache specific data
+ * struct uniphier_cache_data - UniPhier outer cache specific data
  *
  * @ctrl_base: virtual base address of control registers
  * @rev_base: virtual base address of revision registers
  * @op_base: virtual base address of operation registers
+ * @way_ctrl_base: virtual address of the way control registers for this
+ *     SoC revision
  * @way_mask: each bit specifies if the way is present
  * @nsets: number of associativity sets
  * @line_size: line size in bytes

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 4dbbf8f..a9e52b5 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2957,7 +2957,7 @@
                        clock-names = "merge","merge_async";
                        power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
                        mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
-                       mediatek,merge-mute = <1>;
+                       mediatek,merge-mute;
                        resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC>;
                };
 
@@ -2970,7 +2970,7 @@
                        clock-names = "merge","merge_async";
                        power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
                        mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
-                       mediatek,merge-mute = <1>;
+                       mediatek,merge-mute;
                        resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC>;
                };
 
@@ -2983,7 +2983,7 @@
                        clock-names = "merge","merge_async";
                        power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
                        mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
-                       mediatek,merge-mute = <1>;
+                       mediatek,merge-mute;
                        resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC>;
                };
 
@@ -2996,7 +2996,7 @@
                        clock-names = "merge","merge_async";
                        power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
                        mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
-                       mediatek,merge-mute = <1>;
+                       mediatek,merge-mute;
                        resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC>;
                };
 
@@ -3009,7 +3009,7 @@
                        clock-names = "merge","merge_async";
                        power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
                        mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
-                       mediatek,merge-fifo-en = <1>;
+                       mediatek,merge-fifo-en;
                        resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>;
                };