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Merge pull request #1236 from martin-frbg/l1cache
author
Zhang Xianyi
<traits.zhang@gmail.com>
Mon, 24 Jul 2017 04:07:00 +0000
(12:07 +0800)
committer
GitHub
<noreply@github.com>
Mon, 24 Jul 2017 04:07:00 +0000
(12:07 +0800)
Use cpuid 4 with subleafs to query L1 cache size on Intel processors
Trivial merge