re PR middle-end/45416 (Code size regression from 4.4 for ARM)

2011-12-07  Andrew Pinski  <apinski@cavium.com>

	PR middle-end/45416
	* expr.c (do_store_flag): Rewrite code that looks for BIT_AND_EXPR for
	SSA-expand.

2011-12-07  Andrew Pinski  <apinski@cavium.com>

	PR middle-end/45416
	* gcc.dg/pr45416.c: New testcase.

From-SVN: r182084

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 486aa0f..5d50a19 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-12-07  Andrew Pinski  <apinski@cavium.com>
+
+       PR middle-end/45416
+       * expr.c (do_store_flag): Rewrite code that looks for BIT_AND_EXPR for
+       SSA-expand.
+
 2011-12-07  Richard Guenther  <rguenther@suse.de>
 
        PR tree-optimization/50823

diff --git a/gcc/expr.c b/gcc/expr.c
index 6722af0..524ddab 100644 (file)
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -10563,15 +10563,22 @@ do_store_flag (sepops ops, rtx target, enum machine_mode mode)
      so we just call into the folder and expand its result.  */
 
   if ((code == NE || code == EQ)
-      && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
-      && integer_pow2p (TREE_OPERAND (arg0, 1))
+      && integer_zerop (arg1)
       && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
     {
-      tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
-      return expand_expr (fold_single_bit_test (loc,
-                                               code == NE ? NE_EXPR : EQ_EXPR,
-                                               arg0, arg1, type),
-                         target, VOIDmode, EXPAND_NORMAL);
+      gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
+      if (srcstmt
+         && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
+       {
+         enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
+         tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
+         tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
+                                      gimple_assign_rhs1 (srcstmt),
+                                      gimple_assign_rhs2 (srcstmt));
+         temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
+         if (temp)
+           return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
+       }
     }
 
   if (! get_subtarget (target)

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5ecacdd..04d6c23 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2011-12-07  Andrew Pinski  <apinski@cavium.com>
+
+       PR middle-end/45416
+       * gcc.dg/pr45416.c: New testcase.
+
 2011-12-07  Ed Smith-Rowland <3dw4rd@verizon.net>
 
        PR c++/51420

diff --git a/gcc/testsuite/gcc.dg/pr45416.c b/gcc/testsuite/gcc.dg/pr45416.c
new file mode 100644 (file)
index 0000000..1e57185
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr45416.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int foo(long long a)
+{
+   if (a & (long long) 0x400)
+      return 1;
+   return 0;
+}
+
+/* { dg-final { scan-assembler "andl" { target i?86-*-linux* x86_64-*-linux* } } } " */
+/* { dg-final { scan-assembler-not "setne" { target i?86-*-linux* x86_64-*-linux* } } }" */
+/* { dg-final { scan-assembler "and" { target arm*-*-* } } }" */
+/* { dg-final { scan-assembler-not "moveq" { target arm*-*-* } } }" */