Fix RiscV support - Rendering issue for armv7l

Commit fixes change introduced in RiscV support for M120.

On armv7l (built with ./tizen_src/build/build_standard_armv7l) the
lack of specialized template of SerializedSizeSimple() for size_t
caused rendering issue and usage of illegal instruction when
running chromium-efl for armv7l.

Specialization was originally commented out due to compliation error caused
by gcc bug that does not allow declaration of specialized template
outside of the namespace.

Now the specialization is introduced in template where it will
return appropriate value depending on the type of typename T

Change-Id: If713bd0c0d6c1a0ed91cc2f627c314a20471ceb7
Signed-off-by: Aleksander Świniarski <a.swiniarski@samsung.com>

diff --git a/cc/paint/paint_op_writer.h b/cc/paint/paint_op_writer.h
index f545378..1eae1b9 100644 (file)
--- a/cc/paint/paint_op_writer.h
+++ b/cc/paint/paint_op_writer.h
@@ -118,16 +118,16 @@ class CC_PAINT_EXPORT PaintOpWriter {
   template <typename T>
   static constexpr size_t SerializedSizeSimple() {
     static_assert(!std::is_pointer_v<T>);
-    return base::bits::AlignUp(sizeof(T), kDefaultAlignment);
+    if constexpr (std::is_same_v<T, size_t>) {
+      // size_t is always serialized as two uint32_ts to make the serialized
+      // result portable between 32bit and 64bit processes.
+      return base::bits::AlignUp(2 * sizeof(uint32_t), kDefaultAlignment);
+    } else {
+      static_assert(!std::is_pointer_v<T>);
+      return base::bits::AlignUp(sizeof(T), kDefaultAlignment);
+    }
   }
 
-  // FIXME
-  // size_t is always serialized as two uint32_ts to make the serialized result
-  // portable between 32bit and 64bit processes.
-  // template <>
-  // constexpr size_t SerializedSizeSimple<size_t>() {
-  //   return base::bits::AlignUp(2 * sizeof(uint32_t), kDefaultAlignment);
-  // }
 #endif
  public:
   // SerializedSize() returns the maximum serialized size of the given type or