}
}
+/* Replace all occurrences of REG FROM with REG TO in X, including
+ occurrences with different modes. */
+
+rtx
+ix86_replace_reg_with_reg (rtx x, rtx from, rtx to)
+{
+ gcc_checking_assert (REG_P (from)
+ && REG_P (to)
+ && GET_MODE (from) == GET_MODE (to));
+ if (!reg_overlap_mentioned_p (from, x))
+ return x;
+ rtx ret = copy_rtx (x);
+ subrtx_ptr_iterator::array_type array;
+ FOR_EACH_SUBRTX_PTR (iter, array, &ret, NONCONST)
+ {
+ rtx *loc = *iter;
+ x = *loc;
+ if (REG_P (x) && REGNO (x) == REGNO (from))
+ {
+ if (x == from)
+ *loc = to;
+ else
+ {
+ gcc_checking_assert (REG_NREGS (x) == 1);
+ *loc = gen_rtx_REG (GET_MODE (x), REGNO (to));
+ }
+ }
+ }
+ return ret;
+}
+
/* Return mode for the memcpy/memset loop counter. Prefer SImode over
DImode for constant loop counts. */
extern void ix86_expand_v1ti_shift (enum rtx_code, rtx[]);
extern void ix86_expand_v1ti_rotate (enum rtx_code, rtx[]);
extern void ix86_expand_v1ti_ashiftrt (rtx[]);
+extern rtx ix86_replace_reg_with_reg (rtx, rtx, rtx);
extern rtx ix86_find_base_term (rtx);
extern bool ix86_check_movabs (rtx, int);
extern bool ix86_check_no_addr_space (rtx);
(match_dup 0)))]
{
operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (1)), 0, 0));
- operands[8] = replace_rtx (operands[5], operands[0], operands[1], true);
- operands[9] = replace_rtx (operands[6], operands[0], operands[1], true);
+ operands[8]
+ = ix86_replace_reg_with_reg (operands[5], operands[0], operands[1]);
+ operands[9]
+ = ix86_replace_reg_with_reg (operands[6], operands[0], operands[1]);
})
;; Eliminate a reg-reg mov by inverting the condition of a cmov (#2).
(match_dup 0)))]
{
operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (2)), 0, 0));
- operands[8] = replace_rtx (operands[5], operands[0], operands[1], true);
- operands[9] = replace_rtx (operands[6], operands[0], operands[1], true);
+ operands[8]
+ = ix86_replace_reg_with_reg (operands[5], operands[0], operands[1]);
+ operands[9]
+ = ix86_replace_reg_with_reg (operands[6], operands[0], operands[1]);
})
(define_insn "movhf_mask"
(parallel [(set (match_dup 0)
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))
(clobber (reg:CC FLAGS_REG))])]
- "operands[4] = replace_rtx (operands[2], operands[0], operands[1], true);")
+{
+ operands[4]
+ = ix86_replace_reg_with_reg (operands[2], operands[0], operands[1]);
+})
(define_peephole2
[(set (match_operand 0 "mmx_reg_operand")