i2c: stm32: do not set the STOP condition on error
authorAlain Volmat <alain.volmat@foss.st.com>
Mon, 12 Sep 2022 08:42:00 +0000 (10:42 +0200)
committerPatrick Delaunay <patrick.delaunay@foss.st.com>
Thu, 15 Sep 2022 12:59:22 +0000 (14:59 +0200)
Current function stm32_i2c_message_xfer is sending a STOP
whatever the result of the transaction is.  This can cause issues
such as making the bus busy since the controller itself is already
sending automatically a STOP when a NACK is generated.

Thanks to Jorge Ramirez-Ortiz for diagnosing and proposing a first
fix for this. [1]

[1] https://lore.kernel.org/u-boot/20220815145211.31342-2-jorge@foundries.io/

Reported-by: Jorge Ramirez-Ortiz, Foundries <jorge@foundries.io>
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
drivers/i2c/stm32f7_i2c.c

index 8d680ee..80bd3c4 100644 (file)
@@ -483,9 +483,9 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv *i2c_priv,
                }
        }
 
-       /* End of transfer, send stop condition */
-       mask = STM32_I2C_CR2_STOP;
-       setbits_le32(&regs->cr2, mask);
+       /* End of transfer, send stop condition if appropriate */
+       if (!ret && !(status & (STM32_I2C_ISR_NACKF | STM32_I2C_ISR_ERRORS)))
+               setbits_le32(&regs->cr2, STM32_I2C_CR2_STOP);
 
        return stm32_i2c_check_end_of_message(i2c_priv);
 }